Abstract: A data processing method includes obtaining a plurality of data blocks, determining a first data block and a second data block from the data blocks, where the first data block has a first hash value, and the second data block has a second hash value, where the first hash value is obtained by performing calculation on the first data block based on a hash algorithm and the second hash value is obtained by performing calculation on the second data block based on the hash algorithm, and combining and compressing the first data block and the second data block based on a degree of similarity of the first data block and the second data block.

Abstract: A method and an apparatus for screening TB-scale of incremental data. In the present application, according to the memory capacity of the device, the raw data is divided into a plurality of raw data blocks, and the data is cleaned. By adopting a single-block index sorting algorithm, the de-duplicating ordering in the data blocks is completed without dropping operation, and the processed data blocks and a matrix hash index table are respectively generated and saved as initial data after completion. For the subsequent incremental data, the inter-block index-sorting algorithm is adopted, and the processed data blocks and the matrix hash index table are loaded in turn. The data is preliminarily screened on the basis of the matrix hash index table, and an incremental binary search algorithm is used for fine screening. Finally, the indexing and de-duplication screening of all data are completed.

Abstract: A data storage system uses erasure coding in combination with hashgraph to organize stored data and recover that data in a computing environment.

Abstract: Disclosed herein are techniques for performing memory access. In one embodiment, an integrated circuit includes a port and an access engine. The integrated circuit is coupled with a memory device. The access engine is configured to: receive, from an access requester device, a request to access data stored at a memory device; and based on receiving the request: provide, via the port, a sequential access of a plurality of portions of the data to the access requester device; and access the plurality of portions of the data in a parallel form at the memory device for the access requester device. The sequential access can include a sequential write access or a sequential read access of the plurality of portions of the data.

Abstract: A method includes receiving, at a dynamic random access memory (DRAM) device, a single READ-THEN-CLEAR command. The single READ-THEN-CLEAR command has a column address of a column in an array of memory cells. Particular data content is stored in memory cells associated with the column address. The method also includes, in response to receiving the single READ-THEN-CLEAR command, reading the particular data content and clearing the particular data content after reading the particular data content.

Abstract: An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.

Abstract: Embodiments are directed to a cost-aware object selection for cloud garbage collection that deletes completely dead objects and also selects low-live objects up to a carefully selected liveness threshold value. This threshold is dynamically chosen per cloud garbage collection cycle by balancing costs including egress, input/output operations (IOPs), storage cost of cleaning partial live objects, and the storage cost incurred by leaving behind dead data by not cleaning the object. The threshold value is dynamically calculated to accommodate different cost models for different cloud providers and also caters to different costs for different storage tiers.

Abstract: The described technology is generally directed towards fine-grained data event expiration in a streaming data storage system. An event to append is given an expiration period, and the expiration time for the events in a data stream or segment of a data stream is the largest expiration time among events in the data stream or segment. Different segments can have different expiration times for their events. In a segment comprising a group of events, a subgroup of expired events prior to a stream cut are deleted by an expiration task. For a subgroup of unexpired events prior to a stream cut, the expiration task retains (does not delete) the subgroup of events. If a scaling operation is performed on a segment, the new successor segment or segments inherit the largest expiration time of the predecessor segment or segments.

Abstract: A product, system, and/or method of managing memory media that includes: determining whether the memory system is low on one or more ready-to-use (RTU) Block Stripes needed to form a RTU Block Stripe Set, wherein the memory media has a plurality of Planes in each Die, all the memory media Blocks in each Block Stripe are from the same Die #and the same Plane #, each Block Stripe Set is formed of a plurality of Block Stripes all from the same Die #, and all the Blocks in each RTU Block Stripe Set have been subject to the removal process and the erasure process. The product, system, and/or method includes: establishing a pending request for a removal process and/or an erasure process for one or more determined Die #/Plane #combinations; and prioritizing in the one or more determined Die #/Plane #combinations one or more memory media Blocks for the removal and/or erasure process.

Abstract: Embodiments of methods and apparatuses for defending against speculative side-channel analysis on a computer system are disclosed. In an embodiment, a processor includes a decoder, a cache, address translation circuitry, a cache controller, and a memory controller. The decoder is to decode an instruction. The instruction is to specify a first address associated with a data object, the first address having a first memory tag. The address translation circuitry is to translate the first address to a second address, the second address to identify a memory location of the data object. The comparator is to compare the first memory tag and a second memory tag associated with the second address. The cache controller is to detect a cache miss associated with the memory location.

Abstract: Described in detail herein are systems and methods for single instancing blocks of data in a data storage system. For example, the data storage system may include multiple computing devices (e.g., client computing devices) that store primary data. The data storage system may also include a secondary storage computing device, a single instance database, and one or more storage devices that store copies of the primary data (e.g., secondary copies, tertiary copies, etc.). The secondary storage computing device receives blocks of data from the computing devices and accesses the single instance database to determine whether the blocks of data are unique (meaning that no instances of the blocks of data are stored on the storage devices). If a block of data is unique, the single instance database stores it on a storage device. If not, the secondary storage computing device can avoid storing the block of data on the storage devices.

Abstract: The over-provisioning (OP) of a physical storage device (PSD) may be increased, and the useful life of the PSD increased, by converting uncompressed data stored on the PSD to compressed data. It may be determined that increasing the useful life of the PSD, and the data reduction resulting from the compression, outweigh the benefit of faster I/O response times if the data remains uncompressed. A first portion of the PSD may be initially reserved for compression. A second portion of the PSD may store compressed data. It may be determined whether it is desirable to increase the OP of the PSD to thereby reduce the effective write rate on the PSD. If compression is determined to be desirable, the dynamic portion may be compressed, thereby reducing the amount of storage space consumed by the data, and freeing up storage space that can be used by the PSD for OP.

Abstract: Aspects of the present disclosure relate to data deduplication (dedup) techniques for storage arrays. At least one input/output (IO) operations in an IO workload received by a storage array can be identified. Each of the IOs can relate to a data track of the storage array. a probability of the at least one IO being similar to a previous stored IO can be determined. A data deduplication (dedup) operation can be performed on the at least one IO based on the probability. The probability can be less than one hundred percent (100%).

Abstract: A computer-implemented method is provided for reducing Compare And Swap (CAS) operations in a concurrent marking Garbage Collection (GC) process that operates on objects corresponding to a bit map of multiple blocks. The method includes finding, from among the objects, live objects that belong to a same block in the bit map from among the multiple blocks when traversing object trees of the objects for GC marking. The method further includes loading a latest value of the same block from the bitmap, updating the latest value by setting corresponding marking bits in the bit map, and updating the same block in the bit map with a single CAS operation.

Abstract: A storage device includes: a memory device including a plurality of system blocks for storing system data; and a memory controller configured to control the memory device to store cyclic system data that is cyclically provided from a host, in an open system block among the plurality of system blocks, and control the memory device to perform a garbage collection operation on the plurality of system blocks, when a size of data stored in the open system block reaches a predetermined size. The cyclic system data may include a plurality of data slices provided from the host at predetermined cycles. The predetermined size may be determined based on size of the cyclic system data provided for a period of time corresponding to a common multiple of the predetermined cycles.

Abstract: A method of reducing write amplification in an append-only memory store of data records, by which the store is subdivided into streams, each of which for storing records having an update frequency within a variable range of update frequencies. By defining an update frequency that does not rely on time, statistical methods can be used to select the streams in which data records can be written. The range of update frequencies of each stream can be fixed or variable and based on the stored records. The memory allocated to each stream can be determined based on numerically solving an optimization problem that determines the write amplification resulting from different memory allocations in the streams.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The data storage device supports zoned namespace. The controller is configured to maintain a zone timestamp table that includes a corresponding timestamp for each zone and add a timestamp to each garbage collection block of the memory device. The controller is further configured to scan a garbage collection block from a last physical block address (PBA) entry to a first PBA entry, determine a zone timestamp for the scanned PBA entry, and compare the zone timestamp to a timestamp of the garbage collection block. The controller is further configured to create and maintain a zone timestamp table and create and maintain a zone based defragmentation table.

Abstract: In one example, a processing system may identify a type of data contained in a first dataset that is to be stored in a storage array, wherein the storage array comprises a plurality of storage zones, and wherein the plurality of storage zones includes at least two different types of storage technologies. The processing system may generate a metadata file for the first dataset that contains self-describing information for the first dataset, wherein the metadata file is generated based on the type of the data, and wherein the self-describing information defines a manner, a time, and a location for storing the first dataset. The processing system may send the first dataset to a first storage zone of the plurality of storage zones, wherein the self-describing information includes an instruction to send the first dataset to the first storage zone for at least a defined period of time.

Abstract: A storage system and an access control method thereof are provided. The storage system receives a first I/O request from at least one hypervisor. The first I/O request is used for accessing a first disk file of disk files. The storage system then operates a first I/O operation of a first virtual disk of virtual disks according to the first I/O request since the disk files correspond to the virtual disks. The storage system reads a QoS data of the first disk file and determines a first delay period according to the QoS data. The storage system transmits a first I/O response to the at least one hypervisor after the first delay period.

Abstract: An apparatus is described that has processing circuitry for performing operations, and a communication path employed by the processing circuitry to access a first memory. Switch circuitry, when activated, is connected to the communication path. The processing circuitry issues access commands specifying addresses to be accessed, where each address is mapped to location in a memory system in accordance with a system address map. The memory system comprises at least the first memory and a second memory. When in a particular mode, the processing circuitry performs operations that require access to only a subset of the locations provided in the first memory. The switch circuitry is arranged, whilst the processing circuitry is in the particular mode, to be activated in order to intercept the access commands issued over the communication path that specify addresses mapped by the system address map to locations within the subset of locations.