Patents Examined by David Yi
  • Patent number: 11977662
    Abstract: Systems and methods are provided for implementing one-time programmable features for storage devices. In some embodiments, an Information Handling System (IHS) may include: a processor; and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: initialize a one-time programmable (OTP) security storage device; and transmit a command to the OTP security storage device, where the OTP security device is configured to be set in security or non-security mode in response to the command, and where the OTP security storage device is configured to deny or ignore any subsequent command to set the OTP security storage device in a security mode or a non-security mode.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: May 7, 2024
    Assignee: Dell Products, L.P.
    Inventors: Frank Widjaja Yu, Jonathan Jay Kellen, Gregory M. Allen
  • Patent number: 11977746
    Abstract: A data backup method of a storage device which includes a storage controller, a buffer memory, and a plurality of nonvolatile memory devices, the method including: detecting a power-off event of an external power provided to the storage device; deactivating a host interface of the storage controller in response to the detection of the power-off event; moving data stored in the buffer memory to a static random access memory (SRAM) in the storage controller; blocking or deactivating a power of the buffer memory; setting an interleaving mode of the plurality of nonvolatile memory devices to a minimum power mode; and programming the data moved to the SRAM to at least one of the plurality of nonvolatile memory devices.
    Type: Grant
    Filed: March 24, 2023
    Date of Patent: May 7, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Changsik Kwon
  • Patent number: 11977452
    Abstract: A method for a storage system to process input and output operations. The method includes receiving writes over time to an address at a base virtual volume, storing each of the writes in a physical storage at a new location that is without existing data, tagging each stored write with a different generation number to distinguish between different versions of data written to the address at the base virtual volume, receiving a read of the address at the base virtual volume, and, in response to the read of the address at the base virtual volume, returning one of the stored writes that is tagged with a newer generation number than a remainder of the stored writes.
    Type: Grant
    Filed: January 26, 2023
    Date of Patent: May 7, 2024
    Assignee: Nvidia Corporation
    Inventors: Jin Wang, Siamak Nazari
  • Patent number: 11971788
    Abstract: One example method includes receiving, at an IO journal, a new entry that identifies a respective disk location L, and data X written at that disk location L, and determining whether a location specified in an oldest entry of the IO journal is specified in any other entries in the IO journal. When the location specified in the oldest entry is not specified in any other entries in the IO journal, adding the new entry to the IO journal, and augmenting the new entry with undo data. Or, when the location specified in the oldest entry is specified in at least one other entry in the IO journal, setting data specified in the oldest entry as undo data for the next entry that identifies that location, and adding the new entry to the IO journal, and deleting the oldest entry from the IO journal.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: April 30, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Nadav Azaria, Jehuda Shemer, Saar Cohen
  • Patent number: 11966294
    Abstract: In one embodiment, an apparatus comprises a source system comprising a processing device coupled to memory. The processing device is configured to obtain an IO operation corresponding to an address of the source system. The IO operation comprises first user data. The processing device is further configured to store metadata associated with the IO operation in a first journal barrier of a replication journal of the source system and to close the first journal barrier. The processing device is further configured to determine that the first user data associated with the IO operation is missing from the first journal barrier and to obtain second user data from the address. The processing device is further configured to identify an interval from the first journal barrier to a second journal barrier and to provide the first journal barrier and the interval to a destination system.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: April 23, 2024
    Assignee: EMC IP Holding Company LLC
    Inventors: Adi Bar Shalom, Ivan Rubin, Oren Ashkenazi
  • Patent number: 11966583
    Abstract: The present disclosure provides a data pre-processing method and device and related computer device and storage medium. By storing the target output data corresponding to the target operation into the first memory close to the processor and reducing the time of reading the target output data, the occupation time of I/O read operations during the operation process can be reduced, and the speed and efficiency of the processor can be improved.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: April 23, 2024
    Assignee: CAMBRICON TECHNOLOGIES CORPORATION LIMITED
    Inventors: Shaoli Liu, Xiaofu Meng
  • Patent number: 11966584
    Abstract: Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for managing a storage device. The method includes: determining, based on the frequency of data access to the storage device, whether a data access component of the storage device will move; determining, if it is determined that the data access component will move, a first storage unit in the storage device based on a storage location of previously accessed data in the storage device, wherein the data access component is located at a first spatial location corresponding to the first storage unit; and sending a read request for data in a second storage unit in the storage device that is adjacent to the first storage unit, so as to cause the data access component to move from the first spatial location to a second spatial location corresponding to the second storage unit. The embodiments of the present disclosure can reduce the latency of data access to the storage device.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: April 23, 2024
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Bing Liu, Zheng Li
  • Patent number: 11960726
    Abstract: A media management system including an application layer, a system layer, and a solid state drive (SSD) storage layer. The application layer includes a media data analytics application configured to assign a classification code to a data file. The system layer is in communication with the application layer. The system layer includes a file system configured to issue a write command to a SSD controller. The write command includes the classification code of the data file. The SSD storage layer includes the SSD controller and erasable blocks. The SSD controller is configured to write the data file to one of the erasable blocks based on the classification code of the data file in the write command. In an embodiment, the SSD controller is configured to write the data file to one of the erasable blocks storing other data files also having the classification code.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: April 16, 2024
    Assignee: FUTUREWEI TECHNOLOGIES, INC.
    Inventors: Yiren Huang, Yong Wang, Kui (Kevin) Lin
  • Patent number: 11960758
    Abstract: Rather than use one long folding operation to fold data from single-level cell (SLC) blocks into a multi-level cell (MLC) block, a storage system uses a multi-stage folding operation. By breaking up the folding process into stages, SLC blocks involved in an earlier stage can be released prior to a subsequent stage being performed. This can increase performance of the storage system by releasing SLC source blocks sooner and reducing an SLC block budget requirement.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: April 16, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Bhanushankar Doni Gurudath, Harish Gajula
  • Patent number: 11960742
    Abstract: Techniques are provided for block-level fail atomicity on byte-level non-volatile media. In one technique, an offset table and application data that stores content of a file are stored for a file. The offset table includes multiple entries, each entry being associated with a different offset value and storing a logical block address (LBA) that references a location in the application data. In response to receiving a request, that includes an input buffer and an offset value, to update the file: (a) an entry, in the offset table, that corresponds to the offset value and comprises a first LBA is identified; (b) a second LBA that is considered free is identified; (c) the second LBA is replaced with the first LBA; (d) the input buffer is written to a location, in the application data, that the second LBA references; and (e) the second LBA is added in the entry.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: April 16, 2024
    Assignee: Oracle International Corporation
    Inventors: Ranjit Mario Noronha, Sumanta Chatterjee, Margaret M. Susairaj
  • Patent number: 11960717
    Abstract: Techniques and devices for managing power consumption of a memory system using loopback are described. When a memory system is in a first state (e.g., a deactivated state), a host device may send a signal to change one or more components of the memory system to a second state (e.g., an activated state). The signal may be received by one or more memory devices, which may activate one or more components based on the signal. The one or more memory devices may send a second signal to a power management component, such as a power management integrated circuit (PMIC), using one or more techniques. The second signal may be received by the PMIC using a conductive path running between the memory devices and the PMIC. Based on receiving the second signal or some third signal that is based on the second signal, the PMIC may enter an activated state.
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: April 16, 2024
    Inventors: Thomas H. Kinsley, Matthew A. Prather
  • Patent number: 11954493
    Abstract: A cache system having cache sets, and the cache sets having a first cache set configured to provide a first physical output upon a cache hit and a second cache set configured to provide a second physical output upon a cache hit. The cache system also has a control register and a mapping circuit coupled to the control register to map respective physical outputs of the cache sets to a first logical cache and a second logical cache according to a state of the control register. The first logical cache can be a normal or main cache for non-speculative executions by a processor and the second logical cache can be a shadow cache for speculative executions by the processor.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: April 9, 2024
    Assignee: Micron Technology, Inc.
    Inventor: Steven Jeffrey Wallach
  • Patent number: 11954356
    Abstract: Apparatus, method, and system for efficiently identifying and tracking cold memory pages are disclosed. The apparatus in one embodiment includes one or more processor cores to access memory pages stored in the memory by issuing access requests to the memory and a page index bitmap to track accesses made by the one or more processor cores to the memory pages. The tracked accesses are usable to identify infrequently-accessed memory pages, where the infrequently-accessed memory pages are removed from the memory and stored in a secondary storage.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 9, 2024
    Assignee: Intel Corporation
    Inventors: Qiuxu Zhuo, Anthony Luck
  • Patent number: 11954024
    Abstract: A method includes receiving data objects, determining a predicted lifespan of each data object, and instantiating multiple shard files. Each shard file has an associated predicted lifespan range. The method also includes writing each data object into a corresponding shard file having the associated predicted lifespan range that includes the predicted lifespan of the respective data object and storing the shard files in a distributed system. The method also includes determining whether any stored shard files satisfy a compaction criteria based on a number of deleted data objects in each corresponding stored shard file. For each stored shard file satisfying the compaction criteria, the method also includes compacting the stored shard file by rewriting the remaining data objects of the stored shard file into a new shard file.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: April 9, 2024
    Assignee: Google LLC
    Inventors: Wangyuan Zhang, Sandeep Singhal, Sangho Yoon, Guangda Lai, Arash Baratloo, Zhifan Zhang, Gael Hatchue Njouyep, Pramod Gaud
  • Patent number: 11947837
    Abstract: According to one embodiment, a memory system receives, from a host, a write request including a first identifier associated with one write destination block and storage location information indicating a location in a write buffer on a memory of the host in which first data to be written is stored. When the first data is to be written to a nonvolatile memory, the memory system obtains the first data from the write buffer by transmitting a transfer request including the storage location information to the host, transfers the first data to the nonvolatile memory, and writes the first data to the one write destination block.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: April 2, 2024
    Assignee: Kioxia Corporation
    Inventors: Shinichi Kanno, Hideki Yoshida
  • Patent number: 11941287
    Abstract: A method, computer program product, and computer system for receiving, by a computing device, a Write-Same operation from a host for a range of logical block addresses of a destination. Data may be recorded in a buffer to indicate that the Write-Same operation is complete prior to completing the Write-Same operation. An acknowledgment may be sent to the host that the Write-Same operation is complete prior to flushing to a final destination. The Write-Same operation for the logical block addresses of the destination may be performed after sending the acknowledgment to the host that the Write-Same operation is complete.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: March 26, 2024
    Assignee: EMC IP Holding Company, LLC
    Inventors: Bar David, Ronen Gazit
  • Patent number: 11934672
    Abstract: A computer-implemented method and a computer system for improving cached workload management. A host, which is in a system comprising the host and a storage system, obtains information about classes of applications accessing the storage system. The host determines input/output queues dedicated to respective ones of the classes. The storage system creates, in the storage system, cache partitions dedicated to the respective ones of the classes, based on information about classes. The host creates the input/output queues and sets bit flags for respective ones of the input/output queues. The host pumps inputs/outputs coming from the respective ones of the classes to the respective ones of the input/output queues. The storage system directs the input/output queues to respective ones of the cache partitions.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: March 19, 2024
    Assignee: International Business Machines Corporation
    Inventors: Kushal S. Patel, Ankur Srivastava, Subhojit Roy, Sarvesh S. Patel
  • Patent number: 11934682
    Abstract: A technological approach to management of data lifecycle includes protecting data. Datasets from distinct computing environments of an organization can be scanned to identify data elements subject to protection, such as sensitive data. Data lineage associated with the identified data elements can be determined including relationships amongst other data and linkages between computing environments or systems. The identified elements can be automatically protected based at least in part on the lineage such as by masking, encryption, or tokenization. Further, the datasets can be monitored to create audit trails for interactions with the datasets.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: March 19, 2024
    Assignee: Wells Fargo Bank, N.A.
    Inventors: Kaushik Kishanlal Bhatt, Swapnil Sharma
  • Patent number: 11934275
    Abstract: A synthetic full backup of a source volume representing a state of the volume at a current time is retrieved, the synthetic full having been generated by merging a full backup of the volume performed at an initial time with an incremental backup of the volume performed at the current time, after the initial time. A bitmap tracking changes to the volume made between the initial and current times is accessed. The bitmap is used to identify a location on the volume having changes made between the initial and current times. First data written to the location on the volume is read. Second data written to the same location on the synthetic full backup is read. First and second checksums are generated based on the first and second data, respectively. The checksums are compared and if any do not match, an indication is generated that the synthetic full is corrupt.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: March 19, 2024
    Assignee: Dell Products L.P.
    Inventors: Sunil Yadav, Shelesh Chopra
  • Patent number: 11928345
    Abstract: Provided are a computational storage system, computational storage processor, solid-state drive (SSD) and data storing method. The method may include receiving a first storing instruction based on a storage object, generating a second storing instruction based on a flash memory address according to information carried by the first storing instruction and SSD resource information maintained locally, and sending the generated second storing instruction to the SSD. The SSD resource information may include resource occupation information in the SSD. Generating the second storing instruction may include parsing an identification of a storage object, data length information and a starting source address of entire data, allocating a flash memory address or addresses in one or more SSDs for storing data of the storage object according to the data length information and the resource occupancy information in the SSD, and generating the second storing instructions for each SSD.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: March 12, 2024
    Assignee: BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
    Inventors: Jin Dai, Yunsen Zhang