Patents Examined by David Yi
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Patent number: 11934275Abstract: A synthetic full backup of a source volume representing a state of the volume at a current time is retrieved, the synthetic full having been generated by merging a full backup of the volume performed at an initial time with an incremental backup of the volume performed at the current time, after the initial time. A bitmap tracking changes to the volume made between the initial and current times is accessed. The bitmap is used to identify a location on the volume having changes made between the initial and current times. First data written to the location on the volume is read. Second data written to the same location on the synthetic full backup is read. First and second checksums are generated based on the first and second data, respectively. The checksums are compared and if any do not match, an indication is generated that the synthetic full is corrupt.Type: GrantFiled: December 28, 2021Date of Patent: March 19, 2024Assignee: Dell Products L.P.Inventors: Sunil Yadav, Shelesh Chopra
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Patent number: 11928345Abstract: Provided are a computational storage system, computational storage processor, solid-state drive (SSD) and data storing method. The method may include receiving a first storing instruction based on a storage object, generating a second storing instruction based on a flash memory address according to information carried by the first storing instruction and SSD resource information maintained locally, and sending the generated second storing instruction to the SSD. The SSD resource information may include resource occupation information in the SSD. Generating the second storing instruction may include parsing an identification of a storage object, data length information and a starting source address of entire data, allocating a flash memory address or addresses in one or more SSDs for storing data of the storage object according to the data length information and the resource occupancy information in the SSD, and generating the second storing instructions for each SSD.Type: GrantFiled: May 5, 2023Date of Patent: March 12, 2024Assignee: BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGYInventors: Jin Dai, Yunsen Zhang
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Patent number: 11921589Abstract: Any point in time backups for distributed consistency is disclosed. IOs from a consistency group are received by multiple aggregators and stored in corresponding journals. In response to a bookmark, the multiple journals are synthesized to create a do stream or to add the multiple journals to the do stream. A full synchronization operation can be performed simultaneously with replication operations.Type: GrantFiled: June 23, 2020Date of Patent: March 5, 2024Assignee: EMC IP HOLDING COMPANY LLCInventors: Jehuda Shemer, Valerie Lotosh, Saar Cohen, Erez Sharvit
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Patent number: 11922199Abstract: An in-guest agent in a virtual machine (VM) operates in conjunction with a replication module. The replication module performs continuous data protection (CDP) by saving images of the VM as checkpoints at a disaster recovery site over time. Concurrently, the in-guest agent monitors for behavior in the VM that may be indicative of the presence of malicious code. If the in-guest agent identifies behavior (at a particular point in time) at the VM that may be indicative of the presence of malicious code, the replication module can tag a checkpoint that corresponds to the same particular point in time as a security risk. One or more checkpoints generated prior to the particular time may be determined to be secure checkpoints that are usable for restoration of the VM.Type: GrantFiled: March 2, 2020Date of Patent: March 5, 2024Assignee: VMware, Inc.Inventors: Sunil Hasbe, Shirish Vijayvargiya
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Patent number: 11914866Abstract: One example method includes performing delta operations to protect data. During a delta operation, a primary map and a secondary map are processed using bit logic. The bit logic determines how to handle data stored at a location on the volume associated with an entry in the primary map and included in the current delta operation when a new write for the same location is received as the corresponding entry in the primary map is processed.Type: GrantFiled: October 27, 2021Date of Patent: February 27, 2024Assignee: EMC IP HOLDING COMPANY LLCInventors: Jehuda Shemer, Ravi Vijayakumar Chitloor
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Patent number: 11914892Abstract: A storage device includes a non-volatile memory including memory blocks, and a storage controller including a history buffer including plural history read level storage areas corresponding to the memory blocks. The storage controller dynamically adjusts a number of the history read level storage areas allocated to one or more of the plurality of memory blocks based on reliabilities of the memory blocks during runtime of the storage device. The storage controller increases a number of history read level storage areas allocated to a first memory block among the memory blocks that has a relatively low reliability with respect to the reliabilities of remaining ones of the memory blocks.Type: GrantFiled: May 11, 2022Date of Patent: February 27, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Kwangwoo Lee, Sangjin Yoo, Yeonji Kim, Jeongkeun Park, Jeongwoo Lee
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Patent number: 11914889Abstract: A current cycle count associated with a memory sub-system is determined. The current cycle count is compared to a set of cycle count threshold levels to determine a current lifecycle stage of the memory sub-system. A temperature associated with the memory sub-system is measured. The temperature is compared to a set of temperature levels to determine a current temperature level of the memory sub-system. A write-to-read delay time corresponding to the current lifecycle stage and the current temperature level is determined.Type: GrantFiled: November 30, 2022Date of Patent: February 27, 2024Assignee: Micron Technology, Inc.Inventors: Murong Lang, Tingjun Xie, Wei Wang, Frederick Adi, Zhenming Zhou, Jiangli Zhu
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Patent number: 11915022Abstract: Mechanisms for reducing memory inconsistencies between two synchronized computing devices are provided. A first hypervisor module of a first computing device iteratively determines that content of a memory page of a plurality of memory pages has been modified. The content of the memory page is sent to a second hypervisor module on a second computing device. At least one other memory page of the plurality of memory pages is identified, and a verification value based on the content of the at least one other memory page is generated. The verification value and a memory page identifier that identifies the at least one other memory page is sent to the second hypervisor module on the second computing device.Type: GrantFiled: April 14, 2016Date of Patent: February 27, 2024Assignee: Red Hat, Inc.Inventor: David A. Gilbert
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Patent number: 11914530Abstract: Memory having internal processors, and methods of data communication within such a memory are provided. In one embodiment, an internal processor may concurrently access one or more banks on a memory array on a memory device via one or more buffers. The internal processor may be coupled to a buffer capable of accessing more than one bank, or coupled to more than one buffer that may each access a bank, such that data may be retrieved from and stored in different banks concurrently. Further, the memory device may be configured for communication between one or more internal processors through couplings between memory components, such as buffers coupled to each of the internal processors. Therefore, a multi-operation instruction may be performed by different internal processors, and data (such as intermediate results) from one internal processor may be transferred to another internal processor of the memory, enabling parallel execution of an instruction(s).Type: GrantFiled: July 14, 2022Date of Patent: February 27, 2024Inventors: Robert M. Walker, Dan Skinner, Todd A. Merritt, J. Thomas Pawlowski
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Patent number: 11907076Abstract: The present disclosure relates to a data snapshot method and apparatus, a computer device and a storage medium. The method includes: acquiring the capacity of to-be-written data after snapshot, and comparing the capacity of the to-be-written data with a preset capacity; when the capacity of the to-be-written data is greater than or equal to the preset capacity, writing the to-be-written data into a snapshot volume in a Redirect On Write manner; when the capacity of the to-be-written data is less than the preset capacity, writing the to-be-written data into a solid state drive in a Redirect On Write manner; and when a background write-back thread detects that there is data writing into the solid state drive, writing corresponding data in a source volume into the snapshot volume in a Copy On Write manner, and writing the to-be-written data in the solid state drive into the source volume.Type: GrantFiled: February 24, 2021Date of Patent: February 20, 2024Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventor: Bin Hou
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Patent number: 11907569Abstract: A host stores “context” metadata for logical block addresses (LBAs) in a manner tied to physical location. Notwithstanding log-structured or copy on write processes, the host is then provided with immediate context when the host is called upon to assist a memory controller with data identified by physical location, for example, for memory reconfiguration, garbage collection, wear leveling or other processes. The metadata for example can provide the host with insight as to which data may be moved to enhance performance optimization and where that data can be placed. In one embodiment, the host writes back one or more references that span multiple layers of indirection in concert with write of the underlying data; in another embodiment, the context can point to other metadata.Type: GrantFiled: September 19, 2022Date of Patent: February 20, 2024Assignee: Radian Memory Systems, Inc.Inventors: Alan Chen, Craig Robertson, Robert Lercari, Andrey V. Kuzmin
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Patent number: 11899984Abstract: A message that includes a queue identifier (ID) is received from a first hardware functional module. A virtual queue is selected from a plurality of virtual queues in a shared queue structure based at least in part on the queue ID and configurable message handling settings(s). The message is stored in the selected virtual queue and a message recipient is selected from a plurality of potential message recipients based at least in part on the configurable message handling setting(s), where the plurality of potential message recipients includes the second hardware functional module and the processor module. The message is provided to the selected message recipient.Type: GrantFiled: May 10, 2023Date of Patent: February 13, 2024Inventors: Priyanka Nilay Thakore, Chen Xiu, Zhikai Chen, Lyle E. Adams
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Patent number: 11899980Abstract: An operation method of a UFS device including: determining, by a host, area information for write data, wherein in a turbo read the write data is stored in a non-pinned or pinned buffer area and in a normal read the write data is stored in a user storage; transferring, by the host, a first command UFS protocol information unit (UPIU); transferring, by the UFS device, an RTT UPIU to the host, transferring, by the host, a DATA OUT UPIU to the UFS device; mapping, by UFS device, a first logical block address with a physical address of an area corresponding to the area information; transferring, by the host, a second command UPIU; and performing the turbo read on the area to read data corresponding to the first logical block address when the area corresponding to the area information is the pinned or non-pinned turbo write buffer.Type: GrantFiled: October 20, 2022Date of Patent: February 13, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Hyunsoo Cho, Dong-Min Kim, Kyoung Back Lee
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Patent number: 11899957Abstract: Data protection operations including replication operations are disclosed. Virtual machines, applications, and/or application data are replicated according to at least one strategy. The replication strategy can improve performance of the recovery operation.Type: GrantFiled: May 19, 2020Date of Patent: February 13, 2024Assignee: EMC IP HOLDING COMPANY LLCInventors: Bing Liu, Jehuda Shemer, Kfir Wolfson, Jawad Said
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Patent number: 11893240Abstract: Various embodiments include methods and devices for reducing latency in pseudo channel based memory systems. Embodiments may include a first pseudo channel selection device configured to selectively communicatively connect one of a plurality of pseudo channels to a first input/output (IO), and a second pseudo channel selection device configured to selectively communicatively connect one of the plurality of pseudo channels to a second IO, in which the first pseudo channel selection device and the second pseudo channel selection device may be operable to communicatively connect a first pseudo channel of the plurality of pseudo channels to the first IO and to the second IO concurrently. Embodiments may include the pseudo channel based memory system configured to receive a memory access command targeting the first pseudo channel, and use a first pseudo channel data bus and a second pseudo channel data bus to implement the memory access command.Type: GrantFiled: October 28, 2021Date of Patent: February 6, 2024Assignee: QUALCOMM IncorporatedInventors: Shyamkumar Thoziyoor, Pankaj Deshmukh, Jungwon Suh, Subbarao Palacharla
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Patent number: 11886361Abstract: A memory controller having an improved operating speed controls a memory device in response to a request from a host. The memory controller includes: a processor for driving firmware for controlling communication between the host and the memory device; a map data receiver for receiving map data including a plurality of mapping entries including physical block addresses, for operations to be performed on the memory device from the memory device under the control of the processor; and a map data controller for checking a mapping entry corresponding to the request, which are received from the map data receiver, snooping the detected mapping entry and outputting the detected mapping entry to the processor.Type: GrantFiled: September 9, 2019Date of Patent: January 30, 2024Assignee: SK hynix Inc.Inventors: Young Jo Kim, Sung Yeob Cho
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Patent number: 11886714Abstract: Methods and systems for using a hierarchical consistency group (CG) in a storage system are provided. A parent CG is associated with at least a first child CG having a plurality of storage volumes. An atomic application programming interface (API) provisions the parent CG and the first child CG by allocating storage and storing policies for the parent CG and the first CG. A storage service selected from a backup service, a replication service and a cloning service for the parent CG and the first CG is executed based on the stored policies.Type: GrantFiled: November 18, 2022Date of Patent: January 30, 2024Assignee: NETAPP, INC.Inventors: Dean Alan Kalman, Srikumar Natarajan
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Patent number: 11886305Abstract: A method and apparatus for expanding cloud volume, and a device and a readable medium are provided. The method includes: determining whether there is an request of a host in a cloud volume and confirming a snapshot started during cloud backup (S1); in response to there being no IO request, expanding a snapshot volume of the snapshot started during the cloud backup and the cloud volume (S2); expanding a bitmap of the snapshot started during the cloud backup, and setting a bitmap obtained by expanding as a first preset value (S3); after completion of a cloud backup task, expanding a snapshot volume of an another snapshot that is not started in the cloud backup (S4); and expanding a bitmap of the another snapshot that is not started in the the present cloud backup, and setting a bitmap obtained by expanding as a second preset value (S5).Type: GrantFiled: October 29, 2021Date of Patent: January 30, 2024Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Pengfei Wang, Xianwei Meng
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Patent number: 11868233Abstract: A system for read-access of a regulated system, the system comprising a specialized data store, at least one memory, and a flexible reader. The specialized data store able to receive at least a portion of a set of procedures that define a respective set of systematic data and executable operations. The at least one memory including at least one set of data related to the set of procedures.Type: GrantFiled: November 9, 2022Date of Patent: January 9, 2024Assignee: GE Aviation Systems LLCInventors: Joachim Karl Ulf Hochwarth, Terrell Michael Brace, Víctor Mario Leal Herrera, Antonio Lugo Trejo
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Patent number: 11868246Abstract: According to one embodiment, a memory system includes a nonvolatile memory, configuration unit, address translation unit, write unit and control unit. The configuration unit assigns write management areas included in the nonvolatile memory to spaces. The write management area is a unit of an area which manages the number of write. The address translation unit translates a logical address of write data into a physical address of a space corresponding to the write data. The write unit writes the write data to a position indicated by the physical address in the nonvolatile memory. The control unit controls the spaces individually with respect to the nonvolatile memory.Type: GrantFiled: April 19, 2022Date of Patent: January 9, 2024Assignee: Kioxia CorporationInventor: Shinichi Kanno