Abstract: A nanowire structure includes a substrate, a patterned mask layer, and a nanowire. The patterned mask layer includes an opening through which the substrate is exposed. Further, the patterned mask layer has a thermal conductivity greater than 2 ? 0 ? W m * K . The nanowire is on the substrate in the opening of the patterned mask layer. By providing the patterned mask layer with a thermal conductivity greater than 2 ? 0 ? W m * K , the patterned mask layer is able to maintain a temperature of the surface thereof to a desired level when the nanowire is provided. This prevents undesired parasitic growth on the patterned mask layer, thereby improving the performance of the nanowire structure.

Abstract: Machine learning analysis of mass spectrometry spectra from human sweat samples is used to determine characteristics of interest such as age, ethnicity, gender drug use and disease state directly from the m/z data. This avoids the difficult problem of performing a full chemical analysis of human sweat samples to determine the characteristics of interest.

Abstract: A quantum computer, quantum logic circuit, material for forming qubits, and method of operating a quantum computer is described. The material is formed from a quasicrystal or quasicrystalline approximant. In some examples, topological quantum computing is performed based on the quasicrystal or quasicrystalline approximant materials. Quasicrystals and quasicrystalline approximate materials have materials properties that can be adapted to perform quantum computing. In one example, the material is a Tsai-type quasicrystalline approximant with a material structure selected to permit qubits to be generated.

Abstract: A non-volatile memory structure capable of storing layers of a deep neural network (DNN) and perform an inferencing operation within the structure is presented. A stack of bonded die pairs is connected by through silicon vias. Each bonded die pair includes a memory die, having one or more memory arrays onto which layers of the neural network are mapped, and a peripheral circuitry die, including the control circuits for performing the convolution or multiplication for the bonded die pair. The multiplications can either be done in-array on the memory die or in-logic on the peripheral circuitry die. The arrays can be formed into columns along the vias, allowing an inferencing operation to be performed by propagating an input up and down the columns, with the output of one level being the input of the subsequent layer.

Abstract: A non-volatile memory structure capable of storing layers of a deep neural network (DNN) and perform an inferencing operation within the structure is presented. A stack of bonded die pairs is connected by through silicon vias. Each bonded die pair includes a memory die, having one or more memory arrays onto which layers of the neural network are mapped, and a peripheral circuitry die, including the control circuits for performing the convolution or multiplication for the bonded die pair. The multiplications can either be done in-array on the memory die or in-logic on the peripheral circuitry die. The arrays can be formed into columns along the vias, allowing an inferencing operation to be performed by propagating an input up and down the columns, with the output of one level being the input of the subsequent layer.

Abstract: At an artificial intelligence system, a baseline set of informational content elements pertaining to an item for presentation to one or more potential item consumers is identified. One or more optimization iterations are implemented. In a particular iteration, a data set comprising interaction records of a target audience with the baseline set and with one or more variants of the baseline set is collected. Using the data set as input to a machine learning model, effectiveness metrics of the different informational elements are determined. A particular content element set to be presented to an audience is identified using the effectiveness metrics.

Abstract: A method of forming a textured surface layer along a substrate that includes disposing a plurality of polymer spheres on a surface of the metal substrate, and electroplating the metal substrate at a current density to deposit a metal layer along a body of each of the plurality of polymer spheres disposed on the surface of the metal substrate. The metal layer does not extend above a top surface of the plurality of polymer spheres. The method further includes removing the plurality of polymer spheres from the metal layer to form the textured surface defined by a size and shape of the plurality of polymer spheres.

Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.

Abstract: A heat dissipation structure and a manufacturing method thereof and a display device. The heat dissipation structure includes: a heat dissipation plate body, including an evaporation part and a condensation part; a plurality of micro-cavity structures, disposed in the heat dissipation plate body, two ports of each of the micro-cavity structures being sealed, and the micro-cavity structures being filled with liquid. Each of the micro-cavity structures extends from the evaporation part to the condensation part, and after the liquid absorbs heat at the evaporation part to change into vapor, the vapor moves toward the condensation part, and the vapor moved to the condensation part is condensed and liquefied and moves toward the evaporation part to achieve heat dissipation.

Abstract: The SPAD device comprises a single-photon avalanche diode and a further single-photon avalanche diode having breakdown voltages, the single-photon avalanche diodes being integrated in the same device. The breakdown voltages are equal or differ by less than 10%. The single-photon avalanche diode is configured to enable to induce triggering or to have a dark count rate that is higher than the dark count rate of the further single-photon avalanche diode.

Abstract: A device and method for fabricating the same is disclosed. For example, the device includes a sensor having a front side and a back side, a metal interconnect layer formed on the front side of the sensor, an anti-reflective coating formed on the back side of the sensor, a composite etch stop mask layer formed on the anti-reflective coating wherein the composite etch stop mask layer includes a hydrogen rich layer and a compressive high density layer, and a light filter formed on the composite etch stop mask layer.

Abstract: A method for forming a three-dimensional memory device includes disposing a material layer over a substrate, forming a plurality of channel-forming holes and a plurality of sacrificial holes around the plurality of channel-forming holes in an array-forming region of the material layer, and forming a plurality of semiconductor channels based on the channel-forming holes and at least one gate line slit (GLS) based on at least one of the plurality of sacrificial holes. A location of the at least one GLS overlaps with the at least one of the plurality of sacrificial holes.

Abstract: A multiplication layer on a semiconductor substrate of n-type contains Al atoms. An electric field control layer on the multiplication layer is of p-type, and includes a high-concentration area, and a low-concentration area lower in impurity concentration than the high-concentration area which is formed outside the high-concentration area. An optical absorption layer on the electric field control layer is lower in impurity concentration than the high-concentration area. A window layer of n-type formed on the optical absorption layer is larger in band gap than the optical absorption layer. A light-receiving area of p-type is formed apart from an outer edge of the window layer, and at least partly faces the high-concentration area through the window layer and the optical absorption layer. The guard ring area of p-type which the window layer separates from the light-receiving area penetrates through the window layer to extend into the optical absorption layer.

Abstract: A display panel repair device and a display panel repair method are disclosed. The display panel repair device includes an ultrasonic generator and a beam control device. The ultrasonic generator is configured to generate ultrasonic; and the beam control device is configured to direct the ultrasonic to emit to a pre-determined position, so as to be able to repair a display panel to be repaired by the ultrasonic.

Abstract: A high temperature optoelectronic isolator for power electronics operating above 250 degrees Celcius.

Abstract: Some examples described herein provide for three-dimensional (3D) thermal management apparatuses for thermal energy dissipation of thermal energy generated by an electronic device. In an example, an apparatus includes a thermal management apparatus that includes a primary base, a passive two-phase flow thermal carrier, and fins. The thermal carrier has a carrier base and one or more sidewalls extending from the carrier base. The carrier base and the one or more sidewalls are a single integral piece. The primary base is attached to the thermal carrier. The carrier base has an exterior surface that at least a portion of which defines a die contact region. The thermal carrier has an internal volume aligned with the die contact region. A fluid is disposed in the internal volume. The fins are attached to and extend from the one or more sidewalls of the thermal carrier.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodiode structures and methods of manufacture. The structure includes: a charge region having a first doping concentration and a variable width; a multiplication region adjacent to the charge region; and an absorption region adjacent to the variable width charge region.

Abstract: A method for manufacturing a semiconductor device of an embodiment includes: dividing a semiconductor wafer including a plurality of chip areas each having a columnar electrode and dicing areas, along the dicing areas to form a plurality of semiconductor chips; sticking a first resin film on the plurality of semiconductor chips while filling parts of the first resin film in gaps each present between adjacent ones of the plurality of semiconductor chips; forming trenches narrower in width than the gaps in the first resin film filled in the gaps; and sequentially picking up the plurality of semiconductor chips each having the first resin film, and mounting the picked semiconductor chip on a substrate.

Abstract: Embodiments relate to a method for fabricating a light-emitting-diode (LED). A metal layer is deposited on a p-type semiconductor. The p-type semiconductor is on an n-type semiconductor. The metal layer is patterned to define a p-metal. The p-type semiconductor is etched using the p-metal as an etch mask. Similarly, the n-type semiconductor is etched using the p-metal and the p-type semiconductor as an etch mask to define individual LEDs.

Abstract: Various embodiments for quantum-like mechanical elastic systems and related methods thereof including an approach for the tunability of a phase in quantum-like mechanical elastic systems are disclosed.