Abstract: Some embodiments provide a program that receives a first set of data and a first greenhouse gas emission value. The program stores, in a cache, the first set of data and the first greenhouse gas emission value. The program receives a second set of data and a second greenhouse gas emission value. The program stores, in the cache, the second set of data and the second greenhouse gas emission value. The program receives a third set of data and a third greenhouse gas emission value. The program determines one of the first and second sets of data to remove from the cache based on the first and second greenhouse gas emission values. The program replaces, in the cache, one of the first and second sets of data and the corresponding first or second greenhouse gas emission value with the third set of data and the third greenhouse gas emission value.

Abstract: A semiconductor device includes a memory partition. The semiconductor device further includes a plurality of registers. A first register of the plurality of registers, when in operation, controls an operation associated with the memory partition. The semiconductor device additionally includes a memory controller. When in operation, the memory controller accesses a first location of the memory partition concurrently with accessing the first register.

Abstract: Embodiments of the present disclosure provide a data processing method, a controller, a storage device, and a storage system. The controller adds an execution time of an IO request to the IO request, and the execution time is used to instruct the storage device to complete the IO request before the execution time expires. The controller sends, to the storage device, the IO request to which the execution time is added. When receiving the IO request, the storage device can execute the IO request based on the execution time of the IO request.

Abstract: Methods, systems, and devices for cache management in a memory subsystem are described. An interface controller may include a first buffer and a second buffer. The interface controller may use the first and second buffers to facilitate operating a volatile memory as a cache for a non-volatile memory. During an access operation, the interface controller may use the buffer to transfer data between the volatile memory, non-volatile memory, and another device. In response to the access operation, the interface controller may use the second buffer to transfer second data from the volatile memory to the non-volatile memory.

Abstract: A storage device including a non-volatile memory device which receives an operating command and performs an operation corresponding to the operating command, a voltage generating circuit which generates an operating voltage according to the operating command, and a flag generating circuit which receives a busy signal indicative of the non-volatile memory device performing the operation and a pump enable signal instructing pumping of the operating voltage, and outputs a flag signal based on the busy signal and the pump enable signal. The busy signal has a first level when the non-volatile memory device performs the operation, and the flag signal transitions from a second level to the first level in response to the operating voltage becoming equal to or higher than a first reference voltage while the busy signal is at the first level.

Abstract: Embodiments herein describe memories in a processor system in an integrated circuit (IC) that can be assigned to either a cache coherent domain or an I/O domain, rather than being statically assigned by a designer of the IC. That is, the user or customer can assign the memories to domain that best suits their desires. Further, the memories can be reassigned to a different domain if the user later changes her mind.

Abstract: Systems and methods are provided for efficient post-processing of object-based snapshots of block-storage volumes, which post-processing may include garbage collection, validation, or resource usage auditing for the snapshots. An object-based snapshot can be logically represented by a set of objects stored on an object storage service, which objects collectively represent a copy of the data of a corresponding block-storage volume at a given point in time. Each snapshot can further be represented by a full manifest that includes a full listing the set of objects representing the block-storage volume, and a differential manifest that includes a listing of objects unique to the snapshot relative to a prior snapshot of the same volume. Full manifests enable each snapshot to remain independently represented, while differential manifests enable efficient post-processing by reducing the amount of data retrieved and processed to identify an aggregate of all objects referenced across a group of snapshots.

Abstract: A data storage device including a non-volatile memory device including one or more non-volatile memory sets and one or more endurance groups. Each of the endurance groups includes at least one of the non-volatile memory sets. The data storage device includes a controller coupled to the non-volatile memory device. The controller is configured to receive a pending command message from a host interface, where the received pending command message includes a command configured to be executed by a first endurance group of the number of endurance groups. The controller is further configured to determine an assigned command slot for storing the command, where the assigned command slot is selected form one of a private command slot pool associated with the first endurance group or a shared command slot pool, fetch the command from the host device, and store the fetched command in the assigned command slot.

Abstract: A computer-implemented method according to one embodiment includes receiving a request to perform a transaction in persistent memory at a first node; implementing the transaction within a volatile transaction cache at the first node; determining parity data for the transaction at the first node; sending the parity data from the first node to a parity node; and transferring results of the transaction from the volatile transaction cache to the persistent memory at the first node.

Abstract: A three-phase full quorum commit method enabling backing up of network devices that do not offer direct hooks in order to have application consistent protection. Devices are verified to be ready to perform a backup, and a condition of reaching and maintaining a full quorum of devices within a maximum time period is required before the system can be backed up. The three phase backup process reduces the chance of changes to network devices from corrupting consistency among the saved states of the different and disparate network devices. Multiple devices of different makes and models participate together as a unified backup as a network partition and all devices are verified as being in a ready state. The device configuration data is moved from device memory to local disk, and can then be tiered to secondary storage.

Abstract: According to one embodiment, when it is determined that a first storage device of a plurality of storage devices is to be removed and an additional storage device is connected to a storage controller, the storage controller writes update data portions corresponding to data portions already written to the first storage device to any storage device selected from remaining one or more storage devices of the plurality of storage devices except for the first storage device and the additional storage device. Further, the storage controller writes update data portions corresponding to data portions already written to the remaining one or more storage devices to any storage device selected from the remaining one or more storage devices and the additional storage device.

Abstract: Devices and techniques for arbitrating operation of memory devices in a managed NAND memory system to conform the operation to a power budget. In an example, a method can include enabling a subset of memory die of a memory system having multiple memory die, starting an active timer for each active memory die, initializing execution of a buffered memory command at each active die based on a timestamp associated with the buffered memory command, and disabling a first memory die of the subset of memory die when the active timer for the first die expires to maintain compliance with a power budget of the memory system.

Abstract: Techniques disclosed herein provide improved techniques for generating backup copies associated with applications. For example, a method comprises managing synchronous generation of a backup copy of an application comprised of two or more application components respectively executed on two or more host devices, wherein each host device has a storage system associated therewith, by controlling the creation of a backup copy of each application component executed on each host device on its associated storage system within the same time period.

Abstract: Examples described herein include systems and methods for efficiently and effectively applying upgrade bundles to an SDDC. The upgrade bundles can update various software components of the SDDC. A version-compliance configuration matrix provides version-compliance information across various software components to ensure that all components function properly after upgrading. Each upgrade bundle can include metadata that provides information sufficient to utilize the configuration matrix. A super bundle can include multiple upgrade bundles, as well as instructions for applying the multiple upgrade bundles in a particular order to avoid compatibility issues. The super bundle can be used to upgrade multiple software components of an SDDC without disrupting the functionality of the SDDC.

Abstract: A cloud-based data protection service is disclosed. In an embodiment, the data protection service may support backup of data sets from one or more sites associated with one or more organizations. In an embodiment, deduplication of backup data across multiple sites of an organization and/or multiple sites associated with different organizations may be supported. In an embodiment, backup data may be post-processed in the cloud to insert fingerprints corresponding to data blocks that did not change since a previous backup was performed, to scan the backup for security threats such as viruses, other malware, personally identifiable information, etc. In an embodiment, restore may be supported from the cloud, where restore blocks may be larger than backup data blocks. In another embodiment, restore may be based on blocks that have changed since the most recent backup (or a user-selected backup).

Abstract: Techniques for selectively executing a lock instruction speculatively or non-speculatively based on lock address prediction and/or temporal lock prediction. including methods an devices for locking an entry in a memory device. In some techniques, a lock instruction executed by a thread for a particular memory entry of a memory device is detected. Whether contention occurred for the particular memory entry during an earlier speculative lock is detected on a condition that the lock instruction comprises a speculative lock instruction. The lock is executed non-speculatively if contention occurred for the particular memory entry during an earlier speculative lock. The lock is executed speculatively if contention did not occur for the particular memory entry during an earlier speculative lock.

Abstract: Heterogeneous memory management and services. A memory metadata service obtains memory configuration information that identifies one or more sharable load-store memory segments available on each of a plurality of computing devices. The memory metadata service generates a memory metadata repository that comprises memory metadata that identifies, for each computing device of the plurality of computing devices, the one or more sharable load-store memory segments available on the computing device and, for each sharable load-store memory segment, a memory size of the sharable load-store memory segment and at least one memory attribute. The memory metadata service receives, from a first requesting computing device, a first memory allocation request that requests a first quantity of load-store memory. The memory metadata service sends, to the first requesting computing device, memory allocation information that identifies a first sharable load-store memory segment based on the memory metadata repository.

Abstract: A method and system of translating addresses is disclosed that includes receiving an effective address for translation, providing a processor and a translation buffer where the translation buffer has a plurality of entries, wherein each entry contains a mapping of an effective address directly to a corresponding real address, and information on a corresponding intermediate virtual address. The method and system further include determining whether the translation buffer has an entry matching the effective address, and in response to the translation buffer having an entry with a matching effective address, providing the real address translation from the entry having the matching effective address.

Abstract: An information processing system that is capable of accurately predicting a lifetime of a semiconductor device that carries out communications related to reading and writing of data from and to a storage device. The information processing system has an image forming apparatus having a nonvolatile memory and a first controller that controls reading and writing of data from and to the nonvolatile memory. The information processing system also has a server that monitors a lifetime of the first controller. The server has a receiving I/F that receives information indicating a communication data size of reading and writing of data from and to the nonvolatile memory, and a second controller that predicts the lifetime of the first controller based on the received information indicating the communication data size.

Abstract: Apparatus and methods for operation of a memory controller, memory device and system are described. During operation, the memory controller transmits a read command which specifies that a memory device output data accessed from a memory core. This read command contains information which specifies whether the memory device is to commence outputting of a timing reference signal prior to commencing outputting of the data. The memory controller receives the timing reference signal if the information specified that the memory device output the timing reference signal. The memory controller subsequently samples the data output from the memory device based on information provided by the timing reference signal output from the memory device.