Abstract: A method is described for low temperature curing of silicone structures, including the steps of providing patterning photoresist structures on a substrate. The photoresist structures define at least one open region that can be at least partially filled with a condensation cure silicone system. Vapor phase catalyst deposition is used to accelerate the cure of the condensation cure silicone, and the photoresist structure is removed to leave free standing or layered silicone structures. Phosphor containing silicone structures that are coatable with a reflective metal or other material are enabled by the method.

Abstract: A silicon carbide crystal includes a seed layer, a bulk layer and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.

Abstract: A growth substrate and the display panel include a substrate, including chip growth regions arranged at intervals and in an array and a non-growth region located among chip growth regions. The growth substrate includes a refraction structure disposed on the substrate. An orthographic projection of the refraction structure on the substrate covers the non-growth region without overlapping with at least parts of the chip growth regions. The refraction structure is configured to refract light corresponding to the non-growth region to positions corresponding to the chip growth regions. The substrate has a first surface and a second surface and light emitting chips are grown in the chip growth regions of the first surface. The refraction structure is disposed on the second surface, an orthographic projection on the substrate covers the non-growth region, and one side, away from the substrate, of the refraction structure is a light incident side.

Abstract: A vertical semiconductor device and a method for fabricating the same may include forming an alternating stack of dielectric layers and sacrificial layers over a lower structure, forming an opening by etching the alternating stack, forming a non-conformal blocking layer on the alternating stack in which the opening is formed, adsorbing a deposition inhibitor on a surface of the blocking layer to convert the non-conformal blocking layer into a conformal blocking layer on which the deposition inhibitor is adsorbed, and forming a charge storage layer on the conformal blocking layer.

Abstract: A method of manufacturing a covering member includes: providing a first light-reflective member comprising a through-hole, the through-hole having first and second openings; arranging a light-transmissive resin containing a wavelength-conversion material within the through-hole; distributing the wavelength-conversion material predominantly on a side of the first opening of the through-hole within the light-transmissive resin; and after the step of distributing the wavelength-conversion material, removing a portion of the light-transmissive resin from a side of the second opening of the through-hole.

Abstract: A pixel includes a semiconductor substrate, a low-? dielectric, and a photodiode region in the semiconductor substrate. The semiconductor substrate has a substrate top surface that forms a trench. The trench extends into the semiconductor substrate and has a trench depth relative to a planar region of the substrate top surface surrounding the trench. The low-? dielectric is in the trench between the trench depth and a low-? depth with respect to the planar region. The low-? depth is less than the trench depth. The photodiode region is in the semiconductor substrate and includes (i) a bottom photodiode section beneath the trench and (ii) a top photodiode section adjacent to the trench. The top photodiode section begins at a photodiode depth, with respect to the planar region, that is less than the low-? depth, and extends toward and adjoining the bottom photodiode section.

Abstract: A semiconductor light-emitting element includes: an n-type clad layer of an n-type AlGaN-based semiconductor material; an active layer including a planarizing layer of an AlGaN-based semiconductor material provided on the n-type clad layer, a barrier layer of an AlGaN-based semiconductor material provided on the planarizing layer, and a well layer of an AlGaN-based semiconductor material provided on the barrier layer; and a p-type semiconductor layer provided on the active layer. The active layer emits deep ultraviolet light having a wavelength of 360 nm or shorter, and a ground level of a conduction band of the planarizing layer is lower than a ground level of a conduction band of the barrier layer and higher than a ground level of a conduction band of the well layer.

Abstract: A light-emitting diode (LED) chip structure with a cup-like reflective element is provided. The LED chip structure comprises a substrate, an isolation element and a mesa including an LED surrounded by the isolation element. The isolation element comprises an upper isolation part and a lower isolation part. The lower isolation part is positioned in the substrate and the upper isolation part protrudes from a surface of the substrate. A reflective layer is disposed on a sidewall of the upper isolation part, and a bottom of the reflective layer does not contact the mesa. The cup-like reflective element at least includes the isolation element with the reflective layer.

Abstract: An interconnect apparatus and a method of forming the interconnect apparatus is provided. Two integrated circuits are bonded together. A first opening is formed through one of the substrates. A multi-layer dielectric film is formed along sidewalls and a bottom of the first opening. A second opening is formed extending from the first opening to pads in the integrated circuits. A dielectric liner is formed, and the opening is filled with a conductive material to form a conductive plug.

Abstract: A spherical LED chip, a method for manufacturing the same, and a display panel, and a method for spherical LED chip transfer are provided. The spherical LED chip includes a first electrode, a second electrode surrounding the first electrode and having magnetism, and a first insulating protective layer arranged at the outside of the first electrode. The first insulating protective layer and the second electrode form an LED housing configured to wrap the first electrode and with a spherical outer contour.

Abstract: A micro light emitting diode (LED) display device includes a substrate, micro LED dies, a protection layer, and a funnel-tube structure array. The micro LED dies are located on the substrate. The protection layer covers the micro LED dies and the substrate. The funnel-tube structure array is located on the protection layer and includes funnel-tube structures. Each of the funnel-tube structures has a top surface facing away from the protection layer. The funnel-tube structures respectively overlap the micro LED dies in a vertical direction, and widths of the funnel-tube structures are gradually increased from the protection layer to the top surfaces of the funnel-tube structures.

Abstract: A method for manufacturing a linear light source includes: providing a base having a first surface defining recesses in an array in a first direction, and a second surface having a curved contour in a cross section orthogonal to the first direction and a straight contour in a cross section parallel to the first direction; providing light sources each having a top surface and a bottom surface including electrodes; placing the light sources at positions overlapping the recesses in a plan view with the top surface of the light source facing a bottom surface of the recess; placing a first reflective member to cover the light sources and the first surface so that the electrodes of the light sources are exposed; placing a second reflective member on the second surface; and cutting the base along the first direction to define a third surface continuous with the first and second surfaces.

Abstract: Described are light emitting diode (LED) devices comprising a plurality of mesas defining pixels, each of the mesas comprising semiconductor layers, an N-contact material in a space between each of the plurality of mesas, a dielectric material which insulates sidewalls of the P-type layer and the active region from the metal. A current spreading layer is on the P-type layer, the current spreading layer having a first portion and a second portion; a hard mask layer above the second portion of the current spreading layer, the hard mask layer comprising sidewalls defining a hard mask opening; a liner layer conformally-deposited in the hard mask opening above the first portion of the current spreading layer and on the sidewalls of the hard mask layer; a P-metal material plug on the liner layer; a passivation layer on the hard mask layer; and an under bump metallization layer on the passivation layer.

Abstract: A method for manufacturing a light-emitting element includes dividing a semiconductor structure into a plurality of light-emitting portions by removing a portion of the semiconductor structure so as to form an exposed region, a first surface being exposed from under the semiconductor structure in the exposed region; etching protrusions formed in the exposed region; bonding a light-transmitting body to a second surface so as to form a bonded body; forming a plurality of modified regions along the exposed region inside the substrate by irradiating a laser beam on the exposed region from the first surface side; removing a portion of the light-transmitting body that overlaps the plurality of modified regions in a plan view; and singulating the bonded body along the modified regions.

Abstract: In an embodiment, a Group III nitride device includes a multilayer Group III nitride structure and a first ohmic contact arranged on and forming an ohmic contact to the multilayer Group III nitride device structure. The first ohmic contact includes a base portion having a conductive surface, the conductive surface including a peripheral portion and a central portion, the peripheral portion and the central portion being substantially coplanar and being of differing composition, a conductive via positioned on the central portion of the conductive surface and a contact pad positioned on the conductive via.

Abstract: Disclosed are a display device and a manufacturing method thereof. The display device includes a plurality of pixels, a light emitting device provided in each of the plurality of pixels, the light emitting device having a first surface and a second surface, which are opposite to each other, a first electrode electrically connected to the first surface of the light emitting device, a second electrode electrically connected to the second surface of the light emitting device, and a metal oxide pattern interposed between the second surface of the light emitting device and the second electrode. The metal oxide pattern is provided to cover a portion of the second surface and to expose a remaining portion of the second surface. The second electrode is electrically connected to the exposed remaining portion of the second surface, and the metal oxide pattern includes single-crystalline or polycrystalline alumina.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a first region, and a first insulating layer. The first electrode includes a first electrode portion. The first region contains Ga and N. The first region includes a first subregion, a second subregion, and a third subregion. The first subregion and the third subregion contain at least one first element selected from the group consisting of Ar, B, P, N, and Fe. The first subregion is located between the first electrode portion and the second subregion in a first direction. The second subregion does not contain the first element, or concentration of the first element in the second subregion is lower than concentration of the first element in the first subregion and lower than concentration of the first element in the third subregion. The first insulating layer is provided between the first electrode and the first region.

Abstract: There is provided a method of manufacturing an imaging device including a plurality of imaging elements in an imaging area, where each imaging element includes a photoelectric conversion unit in a substrate and a wire grid polarizer arranged at a light-incident side of the photoelectric conversion unit. The method generally includes forming the wire grid polarizer that includes a plurality of stacked strip-shaped portions, where each of the plurality of stacked strip-shaped portions includes a portion of a light-reflecting layer and a portion of a light-absorbing layer. The light-reflecting layer may include a first electrical conducting material that is electrically connected to at least one of the substrate or the photoelectric conversion unit. The light-absorbing layer may include a second electrical conducting material, where at least a portion of the light-absorbing layer is in contact with the light-reflecting layer.

Abstract: There is provided a light emitting device including: a substrate; a laminated structure provided on the substrate and having a plurality of first columnar portions and a plurality of second columnar portions; and a first electrode and a second electrode, in which the first columnar portion includes a first semiconductor layer, a second semiconductor layer having a conductivity type different from the first semiconductor layer, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, light generated in the light emitting layer propagates through the plurality of first columnar portions and the plurality of second columnar portions, a height of the second columnar portion is equal to or larger than a sum of a thickness of the first semiconductor layer and a thickness of the light emitting layer, and is lower than a height of the first columnar portion, the first semiconductor layer is provided between the substrate and the light emitting layer, the first elec

Abstract: A method for producing a nitride compound semiconductor component is disclosed. In an embodiment the method includes providing a growth substrate, growing a nucleation layer of an aluminum-containing nitride compound semiconductor onto the growth substrate, growing a tension layer structure for generating a compressive stress, wherein the tension layer structure comprises at least a first GaN semiconductor layer and a second GaN semiconductor layer, and wherein an Al(Ga)N interlayer for generating the compressive stress is disposed between the first GaN semiconductor layer and the second GaN semiconductor layer and growing a functional semiconductor layer sequence of the nitride compound semiconductor component onto the tension layer structure, wherein a growth of the second GaN semiconductor layer is preceded by a growth of a first 3D AlGaN layer on the Al(Ga)N interlayer in such a way that it has nonplanar structures.