Patents Examined by Hsin-Yi Hsieh
  • Patent number: 11616164
    Abstract: A method for producing a nitride compound semiconductor component is disclosed. In an embodiment the method includes providing a growth substrate, growing a nucleation layer of an aluminum-containing nitride compound semiconductor onto the growth substrate, growing a tension layer structure for generating a compressive stress, wherein the tension layer structure comprises at least a first GaN semiconductor layer and a second GaN semiconductor layer, and wherein an Al(Ga)N interlayer for generating the compressive stress is disposed between the first GaN semiconductor layer and the second GaN semiconductor layer and growing a functional semiconductor layer sequence of the nitride compound semiconductor component onto the tension layer structure, wherein a growth of the second GaN semiconductor layer is preceded by a growth of a first 3D AlGaN layer on the Al(Ga)N interlayer in such a way that it has nonplanar structures.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: March 28, 2023
    Assignee: OSRAM OLED GMBH
    Inventors: Philipp Drechsel, Werner Bergbauer, Thomas Lehnhardt, Jürgen Off, Joachim Hertkorn
  • Patent number: 11610868
    Abstract: The invention relates to various aspects of a ?-LED or a ?-LED array for augmented reality or lighting applications, in particular in the automotive field. The ?-LED is characterized by particularly small dimensions in the range of a few ?m.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: March 21, 2023
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Peter Brick, Jean-Jacques Drolet, Hubert Halbritter, Laura Kreiner, Thomas Schwarz, Julia Stolz
  • Patent number: 11581197
    Abstract: This method for producing a semiconductor device comprises: a first step wherein a plurality of semiconductor chips are affixed onto a supporting substrate such that circuit surfaces of the semiconductor chips face the supporting substrate; a second step wherein a plurality of sealed layers are formed at intervals by applying the sealing resin onto the semiconductor chips by three-dimensional modeling method, each sealed layer containing one or more semiconductor chips embedded in a sealing resin; a third step wherein the sealed layers are cured or solidified; and a fourth step wherein sealed bodies are obtained by separating the cured or solidified sealed layers from the supporting substrate.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: February 14, 2023
    Assignee: MITSUI CHEMICALS, INC.
    Inventors: Jun Kamada, Kaichiro Haruta, Yasuhisa Kayaba, Kazuo Kohmura, Yoichi Kodama
  • Patent number: 11574944
    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes a first opening, a second opening, and a third opening which are formed by performing first etching and second etching. By the first etching, the first insulator is etched for forming the first opening, the second opening, and the third opening. By the second etching, the first metal oxide, the second insulator, the third insulator, the fourth insulator, the second metal oxide, and the fifth insulator are etched for forming the first opening; the first metal oxide, the second insulator, and the third insulator are etched for forming the second opening; and the first metal oxide is etched for forming the third opening.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: February 7, 2023
    Inventors: Motomu Kurata, Ryota Hodo, Yuta Iida
  • Patent number: 11557702
    Abstract: A method for manufacturing a light-emitting device includes providing a transparent member having a protrusion formed at an upper surface of the transparent member. A first resin portion is placed on the protrusion in which the first resin portion has a solid form and is made from a first resin material of which the viscosity decreases when heated. A light-emitting element is placed on the first resin portion, the light-emitting element is caused to be self-aligned with respect to the protrusion by reducing a viscosity of the first resin portion by heating to a first temperature. The first resin portion is solidified by cooling.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: January 17, 2023
    Assignee: NICHIA CORPORATION
    Inventor: Toru Hashimoto
  • Patent number: 11538767
    Abstract: An integrated circuit includes a lead frame, a first die, and a second die. The first die is bonded to and electrically connected to the lead frame. The second die is electrically connected to and spaced apart from the first die.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: December 27, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Barry Jon Male, Paul Merle Emerson, Kurt Peter Wachtler
  • Patent number: 11538962
    Abstract: A light-emitting element includes: a first n-type nitride semiconductor layer; a first light-emitting layer located on the first n-type nitride semiconductor layer; a p-type GaN layer located on the first light-emitting layer; an n-type GaN layer located on the p-type GaN layer and doped with an n-type impurity at an impurity concentration higher than that of the first n-type nitride semiconductor layer; a non-doped GaN layer located between the p-type GaN layer and the n-type GaN layer, a thickness of the non-doped GaN layer being not more than a width of a depletion layer formed by the n-type and p-type GaN layers; a second n-type nitride semiconductor layer located on the n-type GaN layer and doped with an n-type impurity; a second light-emitting layer located on the second n-type nitride semiconductor layer; and a p-type nitride semiconductor layer located on the second light-emitting layer and doped with a p-type impurity.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: December 27, 2022
    Assignee: NICHIA CORPORATION
    Inventor: Seiichi Hayashi
  • Patent number: 11527674
    Abstract: A method includes: bonding a surface of a first wafer on a side having a semiconductor layer to a surface of a second wafer on a side having a first electrode to electrically connect the semiconductor layer and the first electrode; etching a silicon substrate such that a first portion of the silicon substrate remains in a region overlapping with the first electrode in a plan view; etching the semiconductor layer using the first portion as a mask such that a portion of the semiconductor layer between the first portion and the first electrode remains as at least one light-emitting portion; forming a resin layer to cover a lateral surface of the first portion and a lateral surface of the light-emitting portion with the resin layer; removing the first portion to expose the light-emitting portion; and forming a light-transmissive electrically conductive film on or above the light-emitting portion.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: December 13, 2022
    Assignee: NICHIA CORPORATION
    Inventor: Hirofumi Nishiyama
  • Patent number: 11522109
    Abstract: A light emitting package structure and a method of manufacturing the light emitting package structure are provided. The method includes: a preparation process: mounting a light emitting unit on a substrate; a dispensing process: coating a sealant on a first joint area of the substrate; a cover-enclosing process: disposing a cover element having a second joint area on the substrate, the first joint area and the second joint area joined to each other by the sealant; a vacuum process: reducing an ambient pressure to a first pressure lower than the original ambient pressure; a pressure-adjusting process: adjusting the ambient pressure around the package structure to a second pressure higher than the first pressure; and a curing process: curing the sealant.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: December 6, 2022
    Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATION
    Inventors: Wei-Te Cheng, Kuo-Ming Chiu, Kai-Chieh Liang, Jie-Ting Tsai
  • Patent number: 11511467
    Abstract: The present invention relates to the field of automotive lamps, particularly a method for manufacturing a light emitting device (10) for use in automotive lamps. The method comprises: providing a base substrate (11) with a LED die (12) and one or more electrical components (13) attached thereon into a first mold; melting and injecting an optical transparent material over the LED die (12) to form an optical structure (14); removing the base substrate (11) from the first mold once the optical transparent material is partially solidified; providing the base substrate (11) into a second mold different from the first mold; and melting and injecting a thermally conductive material into the second mold while the optical transparent material is not fully solidified, such that an intimate connection is formed between the thermally conductive material and the optical transparent material. The present invention further discloses the light emitting device (10) per se.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: November 29, 2022
    Assignee: Lumileds LLC
    Inventors: Nan Chen, Paul Scott Martin, Chao Ding, Luke Cheng
  • Patent number: 11495606
    Abstract: A semiconductor device includes a layer having a semiconductive material. The layer includes an outwardly-protruding fin structure. An isolation structure is disposed over the layer but not over the fin structure. A first spacer and a second spacer are each disposed over the isolation structure and on sidewalls of the fin structure. The first spacer is disposed on a first sidewall of the fin structure. The second spacer is disposed on a second sidewall of the fin structure opposite the first sidewall. The second spacer is substantially taller than the first spacer. An epi-layer is grown on the fin structure. The epi-layer protrudes laterally. A lateral protrusion of the epi-layer is asymmetrical with respect to the first side and the second side.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: November 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun Po Chang, Chen-Ming Lee, Fu-Kai Yang, Mei-Yun Wang, Wei-Yang Lee, Tzu-Hsiang Hsu
  • Patent number: 11495494
    Abstract: An integrated circuit includes a substrate, an isolation feature disposed over the substrate, a fin extending from the substrate alongside the isolation feature such that the fin extends above the isolation feature, and a dielectric layer disposed over the isolation feature. A top surface of the dielectric layer is at a same level as a top surface of the fin or below a top surface of the fin by less than or equal to 15 nanometers.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: November 8, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun Lee, Chen-Ming Lee, Fu-Kai Yang, Yi-Jyun Huang, Sheng-Hsiung Wang, Mei-Yun Wang
  • Patent number: 11495652
    Abstract: An organic light emitting diode display device includes a substrate, a driving transistor, a switching transistor, a first light absorbing layer, an organic insulating layer, and a sub-pixel structure. The substrate includes a first region and a second region. The driving transistor is disposed in the first region on the substrate. The switching transistor is disposed in the second region on the substrate, and includes a metal-oxide-based semiconductor. The first light absorbing layer is disposed on the driving and switching transistors. The organic insulating layer is disposed directly on the first light absorbing layer. The sub-pixel structure is disposed on the organic insulating layer.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: November 8, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Junhee Lee, Dongwon Kim, Deokhoi Kim, Injun Bae, Hyemin Lee, Jihee Kim
  • Patent number: 11489098
    Abstract: The light emitting device includes a light emitting element having an electrode-formed surface on which electrode posts are formed; a covering member covering the electrode-formed surface and lateral surfaces of the light emitting element while forming an exposure portion of each of the electrode posts which are exposed from the covering member; a pair of electrode layers provided on a surface of the covering member and electrically connected to the exposed portions of the electrode posts; and a pair of electrode terminals which are respectively electrically connected to the electrode layers, having a surface area larger than a surface area of the electrode posts, and having an outer edge positioned at an end portion of the covering member; and an insulating member provided between the pair of the electrode terminals while being in contact with lateral surfaces of the pair of electrode terminals.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: November 1, 2022
    Assignee: NICHIA CORPORATION
    Inventors: Shinichi Daikoku, Toru Hashimoto
  • Patent number: 11482534
    Abstract: Some embodiments include a method of forming vertically-stacked memory cells. An opening is formed through a stack of alternating insulative and conductive levels. Cavities are formed to extend into the conductive levels. Regions of the insulative levels remain as ledges which separate adjacent cavities from one another. Material is removed from the ledges to thin the ledges, and then charge-blocking dielectric and charge-storage structures are formed within the cavities. Some embodiments include an integrated structure having a stack of alternating insulative levels and conductive levels. Cavities extend into the conductive levels. Ledges of the insulative levels separate adjacent cavities from one another. The ledges are thinned relative to regions of the insulative levels not encompassed by the ledges. Charge-blocking dielectric and charge-storage structures are within the cavities.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: October 25, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Fatma Arzum Simsek-Ege, Meng-Wei Kuo, John D. Hopkins
  • Patent number: 11476258
    Abstract: A semiconductor device includes a semiconductor substrate having a main surface, a gate electrode formed on the main surface of the semiconductor substrate, a side-wall oxide film formed on a side wall of the gate electrode, a first insulating layer formed on the gate electrode and containing silicon nitride, and a second insulating layer formed between the gate electrode and the first insulating layer and containing silicon oxide.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: October 18, 2022
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yukio Maki
  • Patent number: 11476304
    Abstract: A phase change memory device with reduced programming disturbance and its operation are described. The phase change memory includes an array with word lines and bit lines and voltage controlling elements coupled to bit lines adjacent to an addressed bit line to maintain the voltage of the adjacent bit lines within an allowed range.
    Type: Grant
    Filed: December 12, 2016
    Date of Patent: October 18, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Fabio Pellizzer, Antonino Rigano
  • Patent number: 11437550
    Abstract: An optoelectronic component that emits electromagnetic radiation from a radiation exit surface of the optoelectronic component includes a radiation-emitting semiconductor chip that produces electromagnetic radiation, and a marker element applied to the radiation exit surface of the optoelectronic component, the marker element including a dye substance that can be removed from the radiation exit surface using a solvent and/or is permeable to the electromagnetic radiation of the optoelectronic component, wherein the dye substance includes a resin into which fluorescent particles are introduced that convert electromagnetic radiation of a first wavelength range into electromagnetic radiation of a second wavelength range, the first wavelength range and the second wavelength range being within the ultraviolet spectral range.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: September 6, 2022
    Assignee: OSRAM OLED GmbH
    Inventors: Isabel Otto, Holger Klassen, Berthold Hahn
  • Patent number: 11430923
    Abstract: An embodiment of the present invention provides a micro light emitting diode (LED) array and its manufacturing method. The micro-LED includes a substrate, an epitaxial layer formed on the substrate, and a conversion film formed on the epitaxial layer. Pixels can be defined through lithography, and the pixel size can be very small. This method is characterized in that a mass transfer is not required.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: August 30, 2022
    Assignee: National Taiwan University
    Inventors: Ching-Fuh Lin, Chun-Yu Lin, Yi-Shan Lin, Jung-Kuan Huang
  • Patent number: 11410996
    Abstract: A transistor that is formed with a transition metal dichalcogenide material is provided. The transition metal dichalcogenide material is formed using a direct deposition process and patterned into one or more fins. A gate dielectric and a gate electrode are formed over the one or more fins. Alternatively, the transition metal dichalcogenide material may be formed using a deposition of a non-transition metal dichalcogenide material followed by a treatment to form a transition metal dichalcogenide material. Additionally, fins that utilized the transition metal dichalcogenide material may be formed with sidewalls that are either perpendicular to a substrate or else are sloped relative to the substrate.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: August 9, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yee-Chia Yeo, Ling-Yen Yeh, Yuan-Chen Sun