Abstract: Disclosed herein is a system for improving the user experience in the face of a regression by returning resources that offer a service to a “last known good” upgrade. In other words, the state of the resources is reconfigured to scale back from recent upgrade(s), the deployments of which likely caused the regression, to a previous upgrade that is known to have little or no effect on the user experience. To identify a problem, the system collects performance data from different resource units that make up a cloud-based platform. The performance data is collected for each upgrade event in a sequence of upgrade events that are currently deployed or being deployed. The system continually tracks and analyzes qualification data collected for each of the deployed upgrade events. The system can tag an upgrade event as the last known good upgrade event when the collected qualification data satisfies predefined qualifications.

Abstract: A cache of a processor includes a cache controller to implement a cache management policy for the insertion and replacement of cache lines of the cache. The cache management policy assigns replacement priority levels to each cache line of at least a subset of cache lines in a region of the cache based on a comparison of a number of accesses to a cache set having a way that stores a cache line since the cache line was last accessed to a reuse distance determined for the region of the cache, wherein the reuse distance represents an average number of accesses to a given cache set of the region between accesses to any given cache line of the cache set.

Abstract: A solid state drive having a drive aggregator configured to interface with a host system, and a plurality of component solid state drives connected to the drive aggregator. Each of the component solid state drives has a controller capable of processing commands from host systems. The drive aggregator is configured to receive commands from the host system and transmit commands to the component solid state drives to implement the commands received from the host system.

Abstract: A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a plurality of fetch requests, determine a first number of requests, second number of requests, and a third number of requests of the plurality of fetch requests, and balance an execution of the first number of requests, the second number of requests, and the third number of requests so that a first ratio of the data requests to the PRP requests and a second ratio of the data requests to the HMB requests is about 1. The plurality of fetch requests includes PRP requests, HMB requests, and data requests. The first number of requests corresponds to a number of the PRP requests. The second number of requests corresponds to a number of the HMB requests. The third number of requests corresponds to a number of the data requests.

Abstract: A solid state drive having a drive aggregator configured with multiple host interfaces for parallel and/or redundant connections to one or more host systems. The solid state drive has a plurality of component solid state drives connected to the drive aggregator. Each of the component solid state drives has a controller capable of processing commands from host systems. The drive aggregator is configured to receive commands in the host interfaces concurrently and implement the commands received from the host system using the plurality of component solid state drives.

Abstract: A method for controlling a redundant storage system is proposed. A write request to a redundant storage system is received (310). A dataset that is to be written into the redundant storage system by the write request is determined (320). A portion of the dataset is logged into the redundant storage system for data recovery in case that a fault occurs in the redundant storage system (330). Thus, only a portion of the dataset is logged and the amount of the logged data may be reduced compared with the conventional redundant storage system. Further, the redundant storage system may be recovered in response to a fault occurring in the redundant storage system.

Abstract: The disclosure is related to systems and methods for data detection and device optimization. In one example, a device may include an interface circuit for data transmission, and an interface detection module adapted to determine a characteristic of a data transfer over the interface circuit. The device may implement an optimization profile for the device based upon the determined characteristic. Further, a device may be configured to measure a data transfer rate, determine an interface type based on the data transfer rate, and implement an optimization profile based on the interface type. The optimization profile may optimize a system for power consumption, performance, or other benefits.

Abstract: A Software Defined Network Attached Storage (SDNAS) executes on a storage system to provide access to shared file systems, referred to as “shares”, on the storage system. Users access the shares using protocol clients. To enable the SDNAS to provide differentiated prioritization between the various shares, a share priority table is maintained by the SDNAS. As shares are created, or optionally after the shares have been created, each share is assigned a share priority which is stored in the share priority table. When an IO operation is received from a protocol client on a share, the SDNAS process determines a share priority value of the share from the share priority table. The share priority value is used to specify an IO priority which used by the operating system scheduling mechanism to schedule the IO operation and to establish a CPU priority for the IO operation.

Abstract: A method for storing data, comprising: obtaining, from a metadata node and by file system client executing on a client application node, a data layout, generating, by the client application node, an error detection value (EDV) for the data stored on the client application node; generating, by a memory hypervisor module executing on the client application node, at least one input/output (I/O) request specifying a location in a storage pool, wherein the location is determined using the data layout; issuing, by the memory hypervisor module, the at least one I/O request to the storage pool, wherein processing the at least one I/O request results in at least a portion of the data being stored at the location; and after issuing the at least one I/O request to the storage pool, transmitting the EDV to the metadata node, wherein the metadata node stores the EDV.

Abstract: Techniques for storage optimization in a distributed object store are described. A storage optimization service of a provider network monitors changes to data objects in a distributed object store that are part of a data lake and are referenced by a table index. The storage optimization service determines whether particular storage optimizations involving the data objects would be beneficial, prioritizes the ordering of these optimizations with a focus on performing impactful optimizations first, while intelligently scheduling the optimizations to avoid overutilization of available resources.

Abstract: Systems and processes for managing memory compression security to mitigate security risks related to compressed memory page access are disclosed herein. A system for managing memory compression security includes a system memory and a memory manager. The system memory includes an uncompressed region configured to store a plurality of uncompressed memory pages and a compressed region configured to store a plurality of compressed memory pages. The memory manager identifies a memory page in the uncompressed region of the system memory as a candidate for compression and estimate a decompression time for a compressed version of the identified memory page. The memory manager determines whether the estimated decompression time is less than a constant decompression time. The memory manager, based on a determination that the estimated decompression time is less than the constant decompression time, compresses the memory page and writes the compressed memory page in the compressed region.

Abstract: A communication device is configured to exchange regular data bidirectionally with counterpart communication device via a regular interface; and to exchange additional data bidirectionally with the counterpart device via an additional interface. The device has a regular pinout corresponding to the regular interface that enables communication of regular data with the counterpart device; and an additional pinout with at least one additional pin, corresponding to the additional interface that enables communication of additional data with the counterpart device. The device has default data handling circuitry communicatively coupled to the additional pin, and configured, in a default mode, to transmit and receive additional default data via the additional pin. The first device has additional function data handling circuitry communicatively coupled to the additional pin and configured, in an active mode, to transmit and receive additional function data via the additional interface.

Abstract: Methods, systems, and devices supporting switchable lane directions between a host system and a memory system are described. A host system may communicate with a memory system using a set of lanes, where each lane may send information (e.g., commands, operations, data) in a specific direction. In some cases, the host system and memory system may support one or more switchable lanes, where both systems include transmit and receive modules for the lane. According to a bandwidth condition associated with a specific direction satisfying a threshold for reconfiguring a lane, the host system and the memory system may switch a direction configured for a lane. Switching the lane direction may increase the supported bandwidth in a specific direction, for example, from the host system to the memory system (e.g., in a “write optimized” configuration) or from the memory system to the host system (e.g., in a “read optimized” configuration).

Abstract: Examples herein include a computer system and methods. Some computer systems comprise two or more devices (each device comprises at least one processing circuit), where each computing device comprises or is communicatively coupled to one or more optical network interface controller (O-NIC) cards. Each O-NIC card comprises at least two bidirectional optical channels to transmit data and to receive additional data from each O-NIC card communicatively coupled to a device, over a channel. The system also includes one or more interfaces and a memory. Program instructions execute a method on one or more processors in communication with a memory, and the method includes modifying, during runtime of at least one application, a pairing over a given bidirectional optical channel of an interface of the interfaces to a given device.

Abstract: The present invention discloses a series circuit and a computing device, including: a power supply terminal for providing voltage for a plurality of chips disposed on the computing device; a ground terminal disposed at one end of each of the plurality of chips relative to the power supply terminal; and a first connection line for separately connecting a first predetermined number of chips of the plurality of chips in series, wherein a communication line is connected between adjacent chips of the first predetermined number of chips, a portion of the communication line is connected to a target connection point, which is disposed on the first connection line and adapted to the adjacent chips, via a third connection line, and the voltage at the target connection point is greater than or equal to the minimum voltage required for communication between the adjacent chips.

Abstract: Systems and methods for automated tuning of Quality of Service (QoS) settings of volumes in a distributed storage system are provided. According to one embodiment, responsive to a predetermined event, information regarding a multiple QoS settings assigned to a volume of a distributed storage system that is being utilized by a client are obtained. A difference between a first QoS setting of the multiple QoS settings and a second QoS setting of the multiple QoS settings is determined. Responsive to determining the difference is less than a threshold a new value of the first QoS setting or a third QoS setting of the multiple QoS settings that is greater than a respective current value of the first QoS setting or the third QoS setting is determined and assigned to the volume for the client.

Abstract: A data managing method, a memory controlling circuit unit, and a memory storage device are provided. The method includes: receiving a write command for writing a plurality of first data into a rewritable non-volatile memory module; when the plurality of first data are continuous data, writing the plurality of first data respectively into a plurality of first physical erasing units by using a single-page programming mode, and recording first management information corresponding to the plurality of first physical erasing units; and when the plurality of first data are not the continuous data, writing the plurality of first data respectively into a plurality of second physical erasing units by using the single-page programming mode.

Abstract: The disclosure relates to detecting phase slips that may occur in a multi-lane serial datalink. Phase slips may occur when a lane experiences lane skew, which may introduce a phase slip with respect to another lane. To detect phase slippage, the system may select a reference lane from among the lanes. The system may generate a pre-deskew delta value based on a difference between the FIFO filling level of the reference lane before a deskew and the FIFO filling level of a second lane before the deskew. The system may generate a post-deskew delta value based on a difference between the FIFO filling level of the reference lane after the deskew and the FIFO filling level of the second lane after the deskew. The system may use a difference between the post-deskew delta and the pre-deskew delta to detect phase slip on the second lane relative to the reference lane.

Abstract: An apparatus comprises at least one processing device that includes a processor coupled to a memory, and is configured to monitor latencies associated with processing of input-output operations in a plurality of storage nodes of a distributed storage system, to detect an unbalanced condition between the storage nodes based at least in part on the monitored latencies, and responsive to the detected unbalanced condition, to adjust an assignment of slices of a logical address space of the distributed storage system to the storage nodes. Adjusting the assignment of slices of the logical address space of the distributed storage system to the storage nodes responsive to the detected unbalanced condition illustratively comprises increasing a number of the slices assigned to one or more of the storage nodes having relatively low latencies and decreasing a number of slices assigned to one or more of the storage nodes having relatively high latencies.

Abstract: A memory allocation manager and a method performed thereby for managing memory allocation, within a data centre, to an application are provided. The data centre comprises at least a Central Processing Unit, CPU, pool and at least one memory pool. The method comprises receiving (210) information associated with a plurality of instances associated with an application to be initiated, wherein individual instances are associated with individual memory requirements, the information further comprising information about an internal relationship between the instances; and determining (230) for a plurality of instances, a minimum number of memory blocks and associated sizes required based on the received information, by identifying parts of memory blocks and associated sizes that may be shared by two or more instances based on their individual memory requirements and/or the internal relationship between the instances.