Abstract: An electronic printed circuit board structure for mitigating conductive anodic filament growth. The structure includes at least two conductive layers and a dielectric layer sandwiched between the conductive layers. At least one hole extends through the dielectric layer, and a layer of nonconductive material covers the at least one hole, wherein the nonconductive material is glass-free. A conductive plate layer is disposed over the nonconductive material layer to form a via connection in the structure.

Abstract: Provided are a circuit apparatus, a manufacturing method thereof, and a circuit system. The circuit apparatus includes a flexible circuit board, a flexible packaging material layer and an electronic device. The flexible circuit board has at least one hollow pattern, wherein the flexible circuit board has an inner region and a peripheral region surrounding the inner region, and has a first surface and a second surface opposite to each other. The flexible packaging material layer is disposed in the at least one hollow pattern. The electronic device is disposed on the first surface of the flexible circuit board and electrically connected with the flexible circuit board.

Abstract: A multilayer resin substrate includes a base material including stacked resin layers including an opening resin layer, a conductor pattern, and an interlayer connection conductor. A concave portion is provided in the base material. The opening resin layer is closer to a first main surface than other resin layers. The concave portion includes a first opening portion provided by a cutting process from one surface of the opening resin layer, and another resin layer. The interlayer connection conductor is provided by filling a conductor in a second opening portion provided by a cutting process from an opposite surface of the opening resin layer. The end portion of the one surface of the first opening portion is not in contact with the conductor pattern.

Abstract: An electronic component includes a substrate and side wires. The substrate includes a first major surface, a second major surface, and a side surface. The side wires are on the side surface of the substrate and spaced apart from each other in a direction along an outer periphery of the substrate when viewed in plan in a thickness direction of the substrate. At least a portion of each of the side wires is provided indirectly on the side surface of the substrate. The electronic component further includes an electrically insulating layer interposed between the side surface of the substrate and the at least a portion of each of the side wires. Each of the side wires includes a bent portion bent when viewed in plan in the thickness direction of the substrate.

Abstract: A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes a wiring substrate including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers and having a cavity penetrating through a portion of the plurality of insulating layers, a passive component disposed in the cavity and including an external electrode electrically connected to at least one of the plurality of wiring layers, and a bridge disposed on the passive component in the cavity and including one or more circuit layers electrically connected to the external electrode.

Abstract: A sample holder includes a base comprising a support structure and a printed circuit board (PCB) in contact with the base. The PCB includes: a dielectric; a front-surface ground (GND) formed on a front surface of the dielectric; a back-surface GND formed on a back surface of the dielectric; a through hole penetrating from the front-surface GND to the back-surface GND, the through hole in which a chip is disposed, and a conductor that electrically connects the front-surface GND and the back-surface GND on an end face of the through hole. At least a part of the base below the through hole has a cavity. The support structure that supports a surface of the chip and is electrically connected to the base. The support structure is disposed in the cavity.

Abstract: A join is provided that has an electrically insulating component and two joining partners secured to one another and electrically insulated from one another by the electrically insulating component. The electrically insulating component has a surface that extends between the two joining partners. The surface defines a structure selected from a group consisting of an elevation, a depression, and any combinations thereof. The structure elongates a direct path along the surface. The structure completely surrounds at least one of the two joining partners. The electrically insulating component and/or the structure includes a glass that is at least partially crystallized.

Abstract: A display panel includes a substrate including a display area and a pad area, a plurality of pad electrodes disposed on the pad area, and an insulating layer disposed between adjacent ones of the plurality of pad electrodes and including a heat absorbing particle. A laser is irradiated to heat the insulating layer, and the heat absorbing particle in the insulating layer absorbs the heat and cures an anisotropic conductive film by heat transfer to electrically connect the plurality of pad electrodes to a plurality of bump electrodes.

Abstract: A flexible printed circuit board includes: a base film having a hole for forming a through hole; and a coil-shaped wiring layer layered on at least one surface side of the base film, wherein the wiring layer includes a land portion arranged at an inner peripheral surface of the hole and at a peripheral portion of the hole of the base film, and a winding portion arranged in a spiral shape with the land portion as an inside end portion or an outside end portion, wherein the winding portion includes a first winding portion that is an outermost circumference and a second winding portion that is inside relative to the outermost circumference, and wherein a ratio of an average thickness of the land portion to an average thickness of the second winding portion is 1.1 or more and 5 or less.

Abstract: A second main surface of the copper plate is opposite a first main surface of the copper plate, and is bonded to a silicon nitride ceramic substrate by the bonding layer. A first portion and a second portion of an end surface of the copper plate form an angle of 135° to 165° on an outside of the copper plate. An extended plane of the first portion and the second main surface form an angle of 110° to 145° a side where the second portion is located. A distance from the second main surface to an intersection of the first portion and the second portion in a direction of a thickness of the copper plate is 10 to 100 ?m. The second main surface extends beyond the extended plane of the first portion by a distance of 10 ?m or more.

Abstract: A phase-locked loop circuit comprises a voltage-controlled oscillator with at least one resonator circuit for driving the oscillator to an output frequency which is a multiple of the resonator frequency. The voltage-controlled oscillator is connected to a phase-locked loop comprising frequency control means for controlling the output frequency of the oscillator. According to the invention the resonator circuit comprises at least one adjustable component and the frequency control means are coupled into the resonator circuit for controlling the resonator frequency of the resonator circuit. The invention moreover relates to a voltage-controlled oscillator as used in this phase-locked loop circuit.

Abstract: An A/D converter has at least one converter stage which, respectively, has a sample and hold circuit for sampling an analog input signal. The converter stage also includes a comparator unit that compares the analog input signal with a reference value in order to produce a digital output value from the converter stage, a digital/analog converter for converting the digital output value into an analog signal, a subtractor for subtracting the analog signal from the sampled input signal, a signal amplifier for amplifying the output signal which is output by the subtractor with a particularl singal gain factor for the next converter stage, and a weighting unit for multiplying the digital output value by a multiplier for addition to further weighted output values from converter stages to produce the digital output value from the A/D converter.

Abstract: The present invention correctly decodes data encoded with a variable-length encoding method that improves the compression ratio. The variable-length encoding method encodes a unit data composed of a plurality of sub-data while referencing a parameter table, and includes: an initialization step in which the parameter table is set to initial values; a parameter table information encoding step in which information related to the initialized parameter table is encoded; a parameter obtaining step in which encoding parameters to be used in the encoding of sub-data are obtained from the parameter table; a sub-data encoding step in which variable-length encoding of the sub-data is performed with reference to the obtained encoding parameters; and an encoded information placement step in which the encoded information is placed in a position in which the information can be obtained before the encoded unit data.

Abstract: In order to improve an arithmetic decoder, the method of arithmetically decoding an arithmetically-encoded information signal into an information signal including a serial sequence of n-bit symbols is adapted to decode two subsequent symbols of the information signal in one decoding cycle if the first symbol to be decoded has the most probable symbol value.

Abstract: The present invention relates to a method of source decoding of a variable-length codeword sequence, the decoding being based on an associated codeword table. It is characterized in that it comprises the steps of: creating a tree with tree-paths (T-PTH) and branches (B), decoding a received sequence (SQr), the step comprising the sub-steps of: extending the best tree-paths (BT_PTH) in the tree by computing first cumulative metrics (CM_LPTH) of the succeeding branches (B), selecting the codewords (CWDi) corresponding to the best tree-paths (BT_PTH), and saving corresponding data in paths (PTH), the corresponding data comprising second cumulative metrics (CM_STCK), reordering the saved paths (PTH) in accordance with their second cumulative metrics (CM_STCK), testing a priori conditions on top path (TOP_PTH), and if they are verified, outputting said top path, or otherwise returning to the extension sub-step.

Abstract: A method and apparatus for reducing imbalances among the outputs of a plurality of driver devices connected in a parallel configuration to drive a common load. One driver is designated as the master, and suitable servo circuitry is provided to each of the other slave drivers, each servo being operative to force the output of its associated slave driver to accurately track the output of the designated master driver. The servo circuitry may be disposed to equalize either the output voltages or output currents of the several drivers to ensure load balancing among the drivers, to reduce cross-conduction currents and attendant power wastage and improve dynamic performance. The plurality of drivers may either operate in an open-loop configuration, or be enclosed within an overall negative feedback loop under the control of a separate controller that itself may be an amplifier.

Abstract: A method for decoding using a general purpose processor, comprising the steps of extracting a bit field from a data stream; extracting one or more properties from the data stream; matching the one or more properties with one or more tags in a content addressable memory; and generating a new address in response to the content addressable memory.

Abstract: A semiconductor integrated circuit including an A/D converter capable of converting an analog signal accepted through an external terminal into a digital signal. The A/D converter includes: a ladder-type resistor for generating a reference voltage; a set of first operational amplifiers, each accepts an output voltage of the ladder-type resistor; a set of first switches, each capable of short-circuiting an input terminal and an output terminal of corresponding one of the first operational amplifiers thereby to allow an offset correction of the corresponding first operational amplifier to be made; and a comparator circuit for comparing an output voltage of each of the first operational amplifiers with the analog signal. The A/D converter can reduce a current output from the ladder-type resistor and speed up charge and discharge of the sampling capacitor.

Abstract: An apparatus for processing a digital signal that generates a one-bit output signal using a delta-sigma modulation apparatus, which includes a quantizer for quantizing an integrated output of a sixth integrator to generate a one-bit output signal that is send to respective integrators through an adder under feedback processing to output the one-bit output signal to the outside of a six-order Delta-sigma modulator, and a control unit for generating a control signal that controls the feedback loop signal from the quantizer so as to change the signal level of a signal component of the audio frequency band of the one-bit output signal. The control unit receives an integrated output from a second integrator being an input side integrator of the six-order delta-sigma modulator.

Abstract: Multiple switching circuits and current source circuits are arranged to operate as part of a compact unary DAC cell. The compact unary DAC cell can be combined with additional compact unary DAC cells to provide a scalable unary DAC system that may be segmented, non-segmented, single-ended, differential, or some other DAC topology that may employ one or more unary DAC cells. Each unary DAC cell is preferably comprised of transistors of a single type such that the maximum circuit density can be achieved. The current source circuits may each have equal current magnitudes. The total output current from the unary DAC cell corresponds to the combined currents from each of the current sources that are enabled.