Abstract: A chip package including a substrate, a first conductive structure, and an electrical isolation structure is provided. The substrate has a first surface and a second surface opposite the first surface), and includes a first opening and a second opening surrounding the first opening. The substrate includes a sensor device adjacent to the first surface. A first conductive structure includes a first conductive portion in the first opening of the substrate, and a second conductive portion over the second surface of the substrate. An electrical isolation structure includes a first isolation portion in the second opening of the substrate, and a second isolation portion extending from the first isolation portion and between the second surface of the substrate and the second conductive portion. The first isolation portion surrounds the first conductive portion.

Abstract: An organic light-emitting display apparatus includes a substrate, pixels, a pixel defining layer (PDL), a first via layer, a second via layer, first lines, and a second line. The pixels are arranged on the substrate in a first direction (D1) and a second direction (D2) intersecting one another, and include organic light-emitting diodes (OLEDs). The OLEDs include pixel electrodes (PEs). The PDL covers edges of the PEs and defines light-emitting regions via openings partially exposing the PEs. The first and second via layers are between the PEs and the substrate. The first lines extend in the D2 between the first via layer and the substrate. The second line is between the second and first via layers. The second line at least partially extends around the light-emitting regions. The second line contacts the first lines through via holes. Each via hole is provided every two pixels arranged in the D2.

Abstract: A display apparatus may include a first plurality of pixels, a substrate, a first signal line, and a load matching device. The substrate may include a first opening, a first non-display area, and a main display area. The first non-displaying area may at least partially surround the first opening. The main display area may support the first plurality of pixels. The first signal line may be electrically connected to the first plurality of pixels, may overlap the main display area, and may overlap the first non-display area. The load matching device may overlap the first non-display area and may provide a first electrical load to the first signal line.

Abstract: The invention relates to an optoelectronic component, comprising: at least two optoelectronic semiconductor chips, which are designed to emit electromagnetic radiation during operation; at least one connecting element, which is electrically conductive, flexible and extensible; and a shaped body, which surrounds the at least two optoelectronic semiconductor chips and the at least one connecting element at least in some locations, wherein the optoelectronic semiconductor chips are each arranged on a carrier. The invention further relates to a method for producing an optoelectronic component.

Abstract: Disclosed herein is a display substrate comprising: a support; a pixel on the support and with a thin-film transistor (TFT) therein; and a barrier on the support, surrounding the pixel, and separated from the pixel by a trench; wherein the barrier comprises a protrusion extending from the support and configured to retard invasion of moisture and oxygen into the pixel; wherein the protrusion comprises a layer coplanar with a layer of the TFT. Also disclosed herein are a display panel with this display substrate and a system with this display panel.

Abstract: A display device includes a substrate including pixels including a first pixel and a second pixel, a driver of the first pixel disposed on the substrate, a driver of the second pixel disposed on the substrate, a first pixel electrode overlapping the driver of the first pixel and electrically connected to the driver of the first pixel, a second pixel electrode overlapping the driver of the first pixel and the driver of the second pixel and electrically connected to the driver of the second pixel, an emission layer disposed on the first pixel electrode and the second pixel electrode, and a common electrode disposed on the emission layer, wherein the second pixel electrode includes a first opening overlapping the driver of the first pixel.

Abstract: An image sensor package includes a glass substrate configured to focus incident light, a first redistribution layer and a second redistribution layer both disposed under the glass substrate while being horizontally spaced apart from each other by a first distance, an image sensor disposed such that an upper surface thereof is vertically spaced apart from both a lower surface of the first redistribution layer and a lower surface of the second redistribution layer by a second distance, and a first connector that connects both the first redistribution layer and the second redistribution layer to the image sensor. The thickness of the glass substrate is 0.6 to 0.8 mm. The first distance is smaller than the horizontal length of the image sensor by 50 ?m to 1 mm. The second distance is equal to or less than 0.1 mm.

Abstract: A display panel and a display device are provided. The display panel includes a display region including a first region and a second region and a frame region. The display panel also includes a frame adhesive located in the second region, and a padding metal located in the second region. Along a direction perpendicular to a plane where the display panel is located, the padding metal at least partially overlaps the frame adhesive. In addition, the display panel includes a cathode signal line located in the first region. Moreover, the display panel includes a cathode layer located in the display region and connected to the cathode signal line. Further, the display panel includes at least one connecting part connected to the padding metal. The connecting part is located on a side of the padding metal adjacent to the first region, and is connected to the cathode signal line.

Abstract: A display panel includes: a substrate comprising a first area, a second area, and a third area between the first area and the second area; a stack structure in the second area and comprising a pixel electrode, an opposite electrode, and an intermediate layer between the pixel electrode and the opposite electrode; a groove in the third area and separating at least one organic material layer included in the intermediate layer; and at least one metal layer in the third area and comprising a first opening overlapping the groove, wherein the groove is defined in a multi-layered film including an organic layer and an inorganic layer on the organic layer, and the at least one metal layer is between the substrate and the multi-layered film.

Abstract: Provided is a display panel, and the display panel includes a base substrate, a first signal line, a planarization layer, a light-emitting element and a pixel spacer layer. The first signal line is disposed on the base substrate, where the first signal line includes a first sub signal line and a second sub signal line which are electrically connected to each other and are disposed in different layers, and the first sub signal line is disposed on one side of the second sub signal line facing toward the base substrate. The planarization layer is disposed on one side of the first signal line facing away from the base substrate. The light-emitting element and the pixel spacer layer are disposed on one side of the planarization layer facing away from the base substrate. The planarization layer includes a first opening.

Abstract: A liner is formed laterally-outside of individual channel-material strings in one of first tiers and in one of second tiers. The liners are isotropically etched to form void-spaces in the one second tier above the one first tier. Individual of the void-spaces are laterally-between the individual channel-material strings and the second-tier material in the one second tier. Conductively-doped semiconductive material is formed against sidewalls of the channel material of the channel-material strings in the one first tier and that extends upwardly into the void-spaces in the one second tier. The conductively-doped semiconductive material is heated to diffuse conductivity-increasing dopants therein from the void-spaces laterally into the channel material laterally there-adjacent and upwardly into the channel material that is above the void-spaces.

Abstract: A display panel is provided including a substrate including a display area comprising first pixels and a sensor area including second pixels and a transmission portion. A display element layer is disposed on the substrate, the display element layer comprising the first pixels electrically connected to a first thin film transistor and the second pixels electrically connected to a second thin film transistor. A conductive layer is disposed between the second thin film transistor and the substrate, the conductive layer having two or more steps at an edge thereof.

Abstract: A display device includes a substrate including a display area and a non-display area, a first power supply line in the non-display area and applying a first supply voltage to the display area, and a driving voltage line which is in the display area and connects the display area to the first power supply line. The first power supply line includes a first sub-power supply line, and a second sub-power supply line which is on the first sub-power supply line. The second sub-power supply line includes a same material as the driving voltage line.

Abstract: A display device comprising: first and second pixels; a first data line connected to the first pixel and configured to have data voltages applied thereto; and a second data line connected to the second pixel, the second data line being adjacent to the first data line, and configured to have the data voltages applied thereto, wherein the first data line includes a 1A-th data line which is in a first data layer, and the second data line includes a 2B-th data line which is in a second data layer different from the first data layer.

Abstract: The invention relates to a radiation-emitting semiconductor chip comprising a semiconductor layer sequence having at least two active regions which generate electromagnetic radiation during operation and at least one reflective outer surface which is arranged to the side of each active region wherein the reflective outer surface includes an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip. The invention also relates to a method for producing a radiation-emitting semiconductor chip.

Abstract: Provided is a semiconductor memory device and method of fabricating the semiconductor memory device. A semiconductor memory device includes a gate stack and a plurality of channel structures. The gate stack includes a plurality of stacked conductive patterns spaced apart from each other. The plurality of the channel structures is formed through the gate stack. Each of the channel structures includes a first channel pillar, a second channel pillar and a gate insulation layer. The first channel pillar is formed through the conductive patterns except for an uppermost conductive pattern. The second channel pillar is formed through the uppermost conductive pattern. The second channel pillar is configured to make contact with the first channel pillar. The gate insulation layer is interposed between the uppermost conductive pattern and the first and second channel pillars.

Abstract: A photodetector includes a first semiconductor layer, an absorption structure, a second semiconductor layer, and a barrier structure. The absorption structure is located on the first semiconductor layer, and having a first conduction band, a first valence band, and a first band gap. The second semiconductor layer is located on the absorption structure, and having a second conduction band, a second valence band, and a second band gap. The barrier structure is located between the absorption structure and the second semiconductor layer, and having a third conduction band, a third valence band, and a third band gap. The third conduction band is greater than the second conduction band or the third valence band is less than the second valence band.

Abstract: A display device and a manufacturing method thereof are disclosed. The display device includes a base substrate and at least one pixel circuit provided on the base substrate. The pixel circuit includes a driving transistor, a first transistor, and a second transistor; the driving transistor includes a control electrode, a first electrode, and a second electrode; a direction from a first electrode of the first transistor to a second electrode of the first transistor is a first direction, a direction from a first electrode of the second transistor to a second electrode of the second transistor is a second direction, a direction from the first electrode of the driving transistor to the second electrode of the driving transistor is a fourth direction, and at least one of the first direction and the second direction intersects with the fourth direction.

Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.

Abstract: The present invention provides a display panel and manufacturing method thereof, the method including following steps: providing a driving backplane and a light-emitting substrate, and bonding the driving backplane and the light-emitting substrate; patterning the light-emitting substrate to form a pixel array; forming a thin film packaging layer on an outside of the pixel array, the thin film packaging layer completely covering the pixel array; forming quantum dots on top of the thin film packaging layer to form a multi-color display; forming a reflective array between two adjacent quantum dots to avoid optical crosstalk between the pixel arrays. The display panel and the method of the present invention break through the physical limit of the high PPI, high-precision metal mask, which can realize the display of 2000 and higher PPI, and can prevent the optical crosstalk between the pixel arrays.