Patents Examined by Neel D Shah
  • Patent number: 11802904
    Abstract: An electronic component testing apparatus is used for testing a device under test (DUT). The electronic component testing apparatus includes: a socket unit that is electrically connected to the DUT; a first wiring board; and a tester that comprises a test head in which the first wiring board is mounted. The socket unit includes a first socket and a second socket. The second socket includes a base and a test antenna unit. The tester tests the DUT by transmitting and receiving radio waves between a device antenna unit of the DUT and the test antenna unit while the DUT is electrically connected to the first socket and the first socket is electrically connected to the test head through the second socket.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: October 31, 2023
    Assignee: ADVANTEST Corporation
    Inventors: Natsuki Shiota, Hiroyuki Mineo
  • Patent number: 11796566
    Abstract: A wafer probe device is provided, including a holder and a probe card. The holder is configured to hold a wafer. The probe card is disposed on the ground, between the holder and the ground, and under the holder. The probing side of the probe card faces away from the ground. The holder moves the wafer toward the probe card, and a probed surface of the wafer contacts the probe card.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: October 24, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventor: Ting-Ming Fu
  • Patent number: 11789063
    Abstract: A conduction inspection jig includes a first member having first openings, a second member having second openings and formed to be positioned above the first member, a third member formed to be positioned between the first member and the second member such that the third member forms a space between the first member and the second member and at least substantially surrounds the space, and a probe formed to pass through one of the first openings and one of the second openings such that the probe extends through the space formed between the first member and the second member.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: October 17, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Takayuki Mori, Taishi Takeda
  • Patent number: 11791919
    Abstract: Various devices and techniques help to reduce the entry of unwanted radio waves into an enclosure and reduce the reflection of radio waves inside the enclosure. Such devices and techniques enable a test environment inside the enclosure that provides high-quality functionality and performance testing.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: October 17, 2023
    Assignee: Promptlink Communications, Inc.
    Inventors: Foad Towfiq, Mohammad Ostadkar, Adib Towfiq
  • Patent number: 11782072
    Abstract: The invention relates to a probe card (PC) for use with an automatic test equipment (ATE), wherein the probe card (PC) comprises a probe head (PH) on a first side thereof, and wherein the probe card (PC) is adapted to be attached to an interface (IF) and wherein the probe card (PC) comprises a plurality of contact pads on a second side in a region opposing at least a region of the interface (IF), arranged to contact a plurality of contacts of the interface (IF), and wherein the probe card (PC) comprises one or more coaxial connectors (CCPT) arranged to mate with one or more corresponding coaxial connectors (CCPT) of the interface (IF). The invention relates further to pogo tower (PT) for connecting a wafer probe interface (WPI) of an automatic test equipment with the probe card (PC).
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: October 10, 2023
    Assignee: Advantest Corporation
    Inventors: José Moreira, Zhan Zhang, Hubert Werkmann, Fabio Pizza, Paolo Mazzucchelli
  • Patent number: 11768226
    Abstract: Provided are an inspection jig and an inspection apparatus in which a configuration for bending a plurality of contacts in the same direction can be simplified. The inspection jig includes a plurality of contacts each of which has a rod shape, a first support portion that supports the first end portion side of the plurality of contacts, and a second support portion that supports the second end portion side of the plurality of contacts. The first support portion includes a facing support plate that is disposed to face the second support portion in a manner separated from the second support portion and has a plurality of through holes through which the plurality of contacts are inserted, and a cross section of each of the through holes has an elliptical shape whose major axis extends in a predetermined specific direction along a plane direction of the facing support plate.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: September 26, 2023
    Assignee: NIDEC READ CORPORATION
    Inventors: Kohei Tsumura, Takanori Furukawa, Jyun Yamanouchi
  • Patent number: 11768223
    Abstract: A testing device and probe elements thereof are provided. The testing device includes a circuit substrate, a plurality of probe elements, a first housing and a second housing. The plurality of probe elements are independent of each other and arranged at fixed intervals. Each probe element comprises a body, a first contact section and a second contact section. The body is provided with a plurality of strip-shaped perforations, and the body includes a first lateral side and a second lateral side opposite to each other. The first contact section is connected to the first lateral side, and the second contact section is connected to the second lateral side. The extension direction of the first contact section relative to the body and the extension direction of the second contact section relative to the body are distinct from each other.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: September 26, 2023
    Assignee: TECAT TECHNOLOGIES (SUZHOU) LIMITED
    Inventor: Choon Leong Lou
  • Patent number: 11761984
    Abstract: A probe card device includes a printed circuit board (PCB), a space transformer, and a high-speed flexible printed circuit (FPC). The PCB includes a plurality of first connecting bodies coupled to a tester, and a plurality of second connecting bodies. The space transformer includes a plurality of connecting bodies disposed on a first surface of the space transformer and coupled to the plurality of second connecting bodies of the printed circuit board, a plurality of general contact pads disposed on a second surface of the space transformer and contacted with a plurality of first probes, and a plurality of high-speed contact pads disposed on the second surface of the space transformer and contacted with a plurality of second probes. The high-speed FPC has a first connecting terminal coupled to the tester, and a second connecting terminal coupled to the plurality of high-speed contact pads.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: September 19, 2023
    Assignee: TECAT TECHNOLOGIES (SUZHOU) LIMITED
    Inventor: Choon Leong Lou
  • Patent number: 11763710
    Abstract: A display device including: a substrate including a display area and a peripheral area peripheral to the display area; a plurality of pads disposed in a pad area, wherein the pad area is disposed in the peripheral area and the pad area includes an integrated circuit (IC); and a first crack detecting line connected to a first pad and a second pad at a first node, and a third pad at a second node, wherein the first crack detecting line is disposed in the peripheral area between the first node and the second node.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: September 19, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kwang Sae Lee, Ji-Hyun Ka, Won Kyu Kwak, Ki Myeong Eom, Hai-Jung In
  • Patent number: 11747394
    Abstract: A probe apparatus includes a chuck configured to support a wafer, a track surrounding the chuck, a tester disposed on the track and having a probe. The tester is configured to move around the wafer along a circumferential direction. The probe apparatus also includes a processing unit in communication with the tester and configured to control a movement of the tester.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: September 5, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Yi-Ju Chen, Jui-Hsiu Jao
  • Patent number: 11747365
    Abstract: An object is to enhance the durability of substrates of a probe substrate and/or the probe substrate and a member to be joined.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: September 5, 2023
    Assignees: KABUSHIKI KAISHA NIHON MICRONICS, TANAKA KIKINZOKU KOGYO K.K.
    Inventors: Toshinori Omori, Kazuya Goto, Yasuaki Osanai, Takashi Akiniwa, Takeki Sugisawa, Takeshi Kondo, Shintaro Abe, Maki Watanabe
  • Patent number: 11733292
    Abstract: A testing apparatus for Devices Under Test (DUTs) includes at least one intake damper and at least one exhaust damper. At least one fan moves recirculated fluid and exterior fluid across one or more DUTs inside the testing apparatus. In one aspect, the testing apparatus includes a door to provide access to a chamber and the door includes at least one channel. At least a portion of the fluid flows through the at least one channel of the door. In another aspect, the door is configured to provide access to a chamber from the front of the chamber and the fluid is moved in a direction across the one or more DUTs substantially from the front of the chamber towards a rear of the chamber.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: August 22, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ba Duong Phan, Alireza Daneshgar
  • Patent number: 11733269
    Abstract: A semiconductor fabricating apparatus may include a probe card, a test head, a support and a chamber wall. The probe card may include a plurality of probing needles. The probe card may be installed at the test head. The support may be configured to receive a wafer including a plurality of test pads making contact with the probing needles. The chamber wall may be configured to receive the support. The chamber wall may define a chamber in which a probe test may be performed. At least one of the probe card and the support, the probe card and the test head, and the test head and the chamber wall may be combined with each other by a magnetic module.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: August 22, 2023
    Assignee: SK hynix Inc.
    Inventor: Jun-Kyu Cho
  • Patent number: 11733266
    Abstract: The present disclosure provides a probe cable assembly comprising a probe interface configured to couple to a measurement interface and to receive a differential signal, a measurement output interface configured to output the differential signal, and a cable arrangement electrically arranged between the probe interface and the measurement output interface and configured to conduct the differential signal between the probe interface and the measurement output interface, the cable arrangement comprising a cable, a plurality of magnetic elements arranged around at least a section of the length of the cable, wherein each magnetic element is separated by a gap from adjacent magnetic elements, and a plastically deformable guiding element configured to fix the cable arrangement with a predetermined relative position between the probe interface and the measurement output interface.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: August 22, 2023
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Franz Strasser, Andreas Ziegler
  • Patent number: 11726111
    Abstract: A test device for a high-speed/high-frequency test. The test device includes: a conductive block which includes a probe hole; at least one signal probe which is supported in an inner wall of the probe hole without contact, includes a first end to be in contact with a testing contact point of the object to be tested, and is retractable in a lengthwise direction; and a coaxial cable which includes a core wire to be in electric contact with a second end of the signal probe. With this test device, the coaxial cable is in direct contact with the signal probe, thereby fully blocking out noise in a test circuit board.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: August 15, 2023
    Inventors: Changhyun Song, Jaehwan Jeong
  • Patent number: 11726138
    Abstract: A method includes providing a test structure above a tester, wherein the test structure includes a load board including a first and second connectors, a first socket electrically connected to the first and second connectors of the load board, and a second socket electrically isolated from the first connector of the load board and electrically connected to the second connector of the load board. A first and second semiconductor dies are disposed respectively on the first and second sockets. A test signal to the first semiconductor die and the second semiconductor die through the second connector of the load board are simultaneously applied by using the tester. A first signal of the first semiconductor die through the first connector is read by using the tester. Whether the first semiconductor die is disturbed by the second semiconductor die is determined according to the first signal.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: August 15, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Tse Yu Cheng
  • Patent number: 11719740
    Abstract: A test fixture for PCB components is described herein. The test fixture comprises a shim with an aperture configured to direct RF energy from a component of a PCB, via an end of the PCB, and to a top clamp of the test fixture. The end of the PCB may correspond to a cut line of a destructive test. The test fixture also comprises the top clamp with a test port and a taper configured to direct the RF energy from the aperture to the test port. The test fixture also comprises a bottom clamp attached to the top clamp to retain the PCB between the top and bottom clamps for testing. The test fixture allows for quick mounting of the PCB and testing of the component without modifying a design of the PCB or requiring specific drilling of the PCB.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: August 8, 2023
    Assignee: Aptiv Technologies Limited
    Inventors: Biswadeep Das Gupta, Syed An Nazmus Saqueb, Ridhwan Khalid Mirza, Sophie Macfarland
  • Patent number: 11714106
    Abstract: Provided is a technique capable of improving test efficiency of semiconductor devices. A test apparatus includes a probe card having a plurality of measurement sites that contact with a plurality of semiconductor devices formed on a semiconductor wafer; a control unit configured to generate map information, probe-card form information, and contact-position information, the map information including position information and peculiar information of the semiconductor devices on the semiconductor wafer, the probe-card form information including arrangement information of the measurement sites, the contact-position information indicating a contact position that is a range of the semiconductor device tested at one time by the probe card based on constrained-condition information of limiting contact with the probe card; and a position control unit configured to control a relative position between the probe card and the semiconductor wafer based on the contact-position information.
    Type: Grant
    Filed: December 16, 2021
    Date of Patent: August 1, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Kazuhiro Sakaguchi
  • Patent number: 11709197
    Abstract: Example devices and methods for compensating for monitoring a surge protection device are provided. In some embodiments, a device is configured to couple to a surge protection device. The device comprises a processor that is capable of sending a DC current signal. A serial data interface is electrically connected to the processor and includes at least one shift register. The device also comprises a multiplexer coupled to the serial data interface. The serial data interface is operable to direct the DC current through the multiplexer. The device also comprises an analog to digital converter (optionally embedded within the processor) that is operable to output a digital signal corresponding to a voltage induced by the DC current signal. Returned DC signals represent surge protection device's health and a multitude of other surge module information.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: July 25, 2023
    Assignee: ASCO Power Technologies, L.P.
    Inventors: Glenn Edward Wilson, Matthew Arthur Scott, Daniel George Buchanan
  • Patent number: 11693029
    Abstract: Evaluation board (EVB) assemblies or stacks utilized in tuning electronic modules are disclosed, as are methods for tuning such modules. In embodiments, the module testing assembly includes an EVB and an EVB baseplate. The EVB includes, in turn, an EVB through-port extending from a first EVB side to a second, opposing EVB side; and a module mount region on the first EVB side and extending about a periphery of the EVB through-port. The module mount region is shaped and sized to accommodate installation of a sample electronic module provided in a partially-completed, pre-encapsulated state fabricated in accordance with a separate thermal path electronic module design. A baseplate through-port combines with the EVB through-port to form a tuning access tunnel providing physical access to circuit components of the sample electronic module through the EVB baseplate from the second EVB side when the sample electronic module is installed on the module mount region.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: July 4, 2023
    Assignee: NXP USA, Inc.
    Inventors: Joshua Bennett English, Lu Wang