Abstract: Systems and methods for tracking changes and performing backups to a storage device are provided. For virtual disks of a virtual machine, changes are tracked from outside the virtual machine in the kernel of a virtualization layer. The changes can be tracked in a lightweight fashion with a bitmap, with a finer granularity stored and tracked at intermittent intervals in persistent storage. Multiple backup applications can be allowed to accurately and efficiently backup a storage device. Each backup application can determine which block of the storage device has been updated since the last backup of a respective application. This change log is efficiently stored as a counter value for each block, where the counter is incremented when a backup is performed. The change log can be maintained with little impact on I/O by using a coarse bitmap to update the finer grained change log.

Abstract: A method to maintain write operation atomicity where a write operation crosses a data storage medium track boundary. The method supplies a storage controller comprising a host adapter, a processor, and a NVS. The host adapter receives from a host computer a write request and data. The method determines if the write request will cross a data storage medium track boundary. If the write request will cross a data storage medium track boundary, the method indicates to the host adapter that the write request comprises a two-track transfer, and writes the data to the NVS as the data is received. If the host computer fails prior to providing all the data to the storage controller, the method discards the data written to the NVS to ensure write operation atomicity.

Abstract: This document discloses one-time-programmable (“OTP”) memory emulation and methods of performing the same. OTP memory can be emulated by managing reads and writes to a memory array in response to an instruction to write data to a OTP memory location and selectively setting a security flag that corresponds to the memory locations. The memory array can be a NAND Flash memory array that includes multiple pages of memory. The memory array can be defined by memory blocks that can include multiple pages of memory. When an OTP write instruction is received, previously stored data can be read from a first page of memory, combined with the new data and stored to a target page of memory. A security flag can be set to prevent the target page from being reprogrammed prior to an erase.

Abstract: A storage controller includes a memory controller that interfaces with memory that stores data. A first receive logic interface provides an interface to a host. A second receive logic interface provides an interface to a storage device. A power save module has a power save mode in which at least a clock of the memory controller is turned off while a clock for operating the first receive logic interface and the second receive logic interface is kept on.

Abstract: Even when a host does not give a write time to write data, consistency can be kept among data stored in secondary storage systems. The present system has plural primary storage systems each having a source volume and plural secondary storage systems each having a target volume. Once data is received from a host, each of the plural storage systems creates write-data management information having sequential numbers and reference information and sends, to one of the primary storage systems, the data, sequential number and reference information. Each of the secondary storage systems records reference information corresponding to the larges sequential number among serial sequential numbers and stores, in a target volume in an order of sequential numbers, data corresponding to reference information having a value smaller than the reference information based on the smallest value reference information among reference information recorded in each of the plural secondary storage systems.

Abstract: A device, method and system is directed to fast data storage on a block storage device. New data is written to an empty write block. A location of the new data is tracked. Meta data associated with the new data is written. A lookup table may be updated based in part on the meta data. The new data may be read based the lookup table configured to map a logical address to a physical address.

Abstract: A memory is disclosed comprising a first memory portion, a second memory portion, and an interface, wherein the memory portions are electrically isolated from each other and the interface is capable of receiving a row command and a column command in the time it takes to cycle the memory once. By interleaving access requests (comprising row commands and column commands) to the different portions of the memory, and by properly timing these access requests, it is possible to achieve full data bus utilization in the memory without increasing data granularity.

Abstract: A storage device and a method of accessing a status thereof are provided. The storage device is disposed in a host. The device data structure field of the storage device is adapted to record the status of the non-volatile memory. The control module is adapted to access the status according to a control signal from the host. Therefore, the operating system or the application of the host is capable of getting the status of the non-volatile memory to ensure the safety of the stored data.

Abstract: The present invention takes advantage of unused storage space within the ESS cells to provide for the efficient and cost effective storage of downloadable content. Specifically, the system of the present invention generally includes a download grid manager that communicates with the ESS cells. Content to be replicated to the ESS cells, and characteristics corresponding thereto, are received on the download grid manager from a content owner (or the like). Based on the characteristics, a storage policy, and storage information previously received from the ESS cells, the download grid manager will replicate the downloadable content to unused storage space within the ESS cells.

Abstract: Data in less than all of the pages of a non-volatile memory block are updated by programming the new data in unused pages of either the same or another block. In order to prevent having to copy unchanged pages of data into the new block, or to program flags into superceded pages of data, the pages of new data are identified by the same logical address as the pages of data which they superceded and a time stamp is added to note when each page was written. When reading the data, the most recent pages of data are used and the older superceded pages of data are ignored. This technique is also applied to metablocks that include one block from each of several different units of a memory array, by directing all page updates to a single unused block in one of the units.

Abstract: An invention is provided for performing flush cache in a non-volatile memory. The invention includes maintaining a plurality of free memory blocks within a non-volatile memory. When a flush cache command is issued, a flush cache map is examined to obtain a memory address of a memory block in the plurality of free memory blocks within the non-volatile memory. The flush cache map includes a plurality of entries, each entry indicating a memory block of the plurality of free memory blocks. Then, a cache block is written to a memory block at the obtained memory address within the non-volatile memory. In this manner, when a flush cache command is received, the flush cache map allows cache blocks to be written to free memory blocks in the non-volatile memory without requiring a non-volatile memory search for free blocks or requiring erasing of memory blocks storing old data.

Abstract: A method for flash memory management comprises providing a head pointer configured to define a first location in a flash memory, and a tail pointer configured to define a second location in a flash memory. The head pointer and tail pointer define a payload data area. Payload data is received from a host, and written to the flash memory in the order it was received. The head pointer and tail pointer are updated such that the payload data area moves in a circular manner within the flash memory.

Abstract: Technologies are described for implementing a migration mechanism in a data storage system containing multiple tiers of storage with each tier having different cost and performance parameters. Access statistics can be collected for each territory, or storage entity, within the storage system. Data that is accessed more frequently can be migrated toward higher performance storage tiers while data that is accessed less frequently can be migrated towards lower performance storage tiers. Each tier can be associated with a range of ILM statistics referred to as the bucket for that tier. A pivot table may be provided that relates the tiers and the buckets. Operations on the pivot table can provide counts of how many territories may be promoted or demoted between any two pairs of tiers.

Abstract: Object relocation often involves a multi-word copy of the object from a source memory to a destination memory, followed by updating the references (e.g., pointers) to the object. However, during the relocation, other threads may write to portions of the object that have already been relocated, and the updates may be lost when the references are updated to point to the destination memory. The object relocation may therefore mark the words of the object during relocation with a relocation value to indicate transfer to the destination memory without locking the threads. The threads may be configured to check the value the source memory during object access, and to access the corresponding word of the destination memory if the source memory word comprises the relocation value. While the probability of a large (e.g., 64-bit) relocation value appearing in the object is small, safety measures are provided to detect and mitigate conflicts.

Abstract: A method, system and computer program product for visualizing memory fragmentation in a data processing system includes determining a mobility status of plural memory pages and generating a map display depicting the plural memory pages and the mobility status.

Abstract: Even when a host does not give a write time to write data, consistency can be kept among data stored in secondary storage systems. The present system has plural primary storage systems each having a source volume and plural secondary storage systems each having a target volume. Once data is received from a host, each of the plural storage systems creates write-data management information having sequential numbers and reference information and sends, to one of the primary storage systems, the data, sequential number and reference information. Each of the secondary storage systems records reference information corresponding to the largest sequential number among serial sequential numbers and stores, in a target volume in an order of sequential numbers, data corresponding to reference information having a value smaller than the reference information based on the smallest value reference information among reference information recorded in each of the plural secondary storage systems.

Abstract: A processor and cache is coupled to a system memory via a system interconnect. A first buffer circuit coupled to the cache receives one or more data words and stores the one or more data words in each of one or more entries. The one or more data words of a first entry are written to the cache in response to error free receipt. A second buffer circuit coupled to the cache has one or more entries for storing store requests. Each entry has an associated control bit that determines whether an entry formed from a first store request is a valid entry to be written to the system memory from the second buffer circuit. Based upon error free receipt of the one or more data words, the associated control bit is set to a value that invalidates the entry in the second buffer circuit based upon the error determination.

Abstract: In one embodiment, the present invention includes a method for receiving a cache coherency message in an interconnect router from a caching agent, mapping the message to a criticality level according to a predetermined mapping, and appending the criticality level to each flow control unit of the message, which can be transmitted from the interconnect router based at least in part on the criticality level. Other embodiments are described and claimed.

Abstract: Provided are a method, system, and article of manufacture, wherein a request to write data to a storage medium is received. The data requested to be written to the storage medium is stored in a cache. A writing of the data is initiated to the storage medium. A periodic determination is made as to whether the stored data in the cache is the same as the data written to the storage medium.

Abstract: A memory interleave system for providing memory interleave for a heterogeneous computing system is provided. The memory interleave system effectively interleaves memory that is accessed by heterogeneous compute elements in different ways, such as via cache-block accesses by certain compute elements and via non-cache-block accesses by certain other compute elements. The heterogeneous computing system may comprise one or more cache-block oriented compute elements and one or more non-cache-block oriented compute elements that share access to a common main memory. The cache-block oriented compute elements access the memory via cache-block accesses (e.g., 64 bytes, per access), while the non-cache-block oriented compute elements access memory via sub-cache-block accesses (e.g., 8 bytes, per access).