Patents Examined by Robert T Huber
  • Patent number: 10937657
    Abstract: A technology capable of reducing contamination of a semiconductor substrate above which a nickel film is disposed is provided. A semiconductor device includes: a semiconductor substrate; an aluminum alloy film disposed on at least one of a front surface and a back surface of the semiconductor substrate; a catalyst metal film disposed above the aluminum alloy film and exhibiting catalytic activity for autocatalytic reaction that deposits nickel; an electroless nickel plating film disposed on the catalyst metal film; and a reactant layer disposed between the aluminum alloy film and the catalyst metal film and containing metal of the catalyst metal film.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: March 2, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Ryuji Ueno, Masatoshi Sunamoto
  • Patent number: 10930797
    Abstract: A Schottky barrier diode includes: an n? type layer disposed on a first surface of an n+ type silicon carbide substrate; a p+ type region and a p type region disposed on the n? type layer and separated from each other; an anode disposed on the n? type layer, the p+ type region, and the p type region; and a cathode disposed on a second surface of the n+ type silicon carbide substrate. The p type region is in plural, has a hexagonal shape on the plane, and is arranged in a matrix shape, and the n? type layer disposed between the p+ type region and the p type region has a hexagonal shape on the plane and encloses the p type region.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: February 23, 2021
    Assignee: HYUNDAI MOTOR COMPANY, LTD.
    Inventors: Dae Hwan Chun, Youngkyun Jung, Nack Yong Joo, Junghee Park, Jong Seok Lee
  • Patent number: 10923684
    Abstract: An organic light-emitting display device and a method of fabricating the same. The organic light-emitting display device includes a substrate including a plurality of subpixels and an overcoat layer disposed in light-emitting areas of the plurality of subpixels. The overcoat layer includes microlenses composed of a plurality of concave portions or a plurality of convex portions. Organic electroluminescent devices are disposed on the overcoat layer. At least one subpixel of the plurality of subpixels includes first microlenses and second microlenses of the microlenses, the second microlenses being different from the first microlenses.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: February 16, 2021
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Hansun Park, KangJu Lee, SeungRyong Joung, Seongsu Jeon, Wonhoe Koo
  • Patent number: 10923448
    Abstract: A bond pad with micro-protrusions for direct metallic bonding. In one embodiment, a semiconductor device comprises a semiconductor substrate, a through-silicon via (TSV) extending through the semiconductor substrate, and a copper pad electrically connected to the TSV and having a coupling side. The semiconductor device further includes a copper element that projects away from the coupling side of the copper pad. In another embodiment, a bonded semiconductor assembly comprises a first semiconductor substrate with a first TSV and a first copper pad electrically coupled to the first TSV, wherein the first copper pad has a first coupling side. The bonded semiconductor assembly further comprises a second semiconductor substrate, opposite to the first semiconductor substrate, the second semiconductor substrate comprising a second copper pad having a second coupling side. A plurality of copper connecting elements extend between the first and second coupling sides of the first and second copper pads.
    Type: Grant
    Filed: June 19, 2017
    Date of Patent: February 16, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Aibin Yu, Wei Zhou, Zhaohui Ma
  • Patent number: 10903139
    Abstract: Example superlattice structures and methods for thermoelectric devices are provided. An example structure may include a plurality of superlattice periods. Each superlattice period may include a first material layer disposed adjacent to a second material layer. For each superlattice period, the first material layer may be formed of a first material and the second material layer may be formed of a second material. The plurality of superlattice periods may include a first superlattice period and a second superlattice period. A thickness of a first material layer of the first superlattice period may be different than a thickness of a first material layer of the second superlattice period.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: January 26, 2021
    Assignee: The Johns Hopkins University
    Inventors: Rama Venkatasubramanian, Jonathan M. Pierce, Geza Dezsi
  • Patent number: 10886153
    Abstract: Micro pick-and-bond heads, assembly methods, and device assemblies. In, embodiments, micro pick-and-bond heads transfer micro device elements, such as (micro) LEDs, en masse from a source substrate to a target substrate, such as a LED display substrate. Anchor and release structures on the source substrate enable device elements to be separated from a source substrate, while pressure sensitive adhesive (PSA) enables device elements to be temporarily affixed to pedestals of a micro pick-and bond head. Once the device elements are permanently affixed to a target substrate, the PSA interface may be defeated through peeling and/or thermal decomposition of an interface layer.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: January 5, 2021
    Assignee: Intel Corporation
    Inventors: Peter L. Chang, Chytra Pawashe, Michael C. Mayberry, Jia-Hung Tseng
  • Patent number: 10868165
    Abstract: A gallium nitride transistor includes a substrate on which a source region, a drain region, a drift region and a gate region are defined. The drift region extends between the source region and the drain region. The gate region includes a combination of enhancement-mode and depletion-mode devices that are positioned across the drift region and are used together to control charge density and mobility of electrons in the drift region with a relatively low threshold voltage (Vth). Enhancement-mode devices are formed using a P-type layer disposed on the substrate and coupled to a gate electrode.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 15, 2020
    Assignee: NAVITAS SEMICONDUCTOR LIMITED
    Inventors: Pil Sung Park, Maher J. Hamdan, Santosh Sharma, Daniel M. Kinzer
  • Patent number: 10861756
    Abstract: A semiconductor device comprises a power device, a sensor which measures a physical state of the power device to transmit a signal according to the physical state, and a main electrode terminal through which a main current of the power device flows. The semiconductor device further comprises a sensor signal terminal connected to the sensor for receiving a signal from the sensor, a driving terminal which receives driving power for driving the power device, and an open bottomed case which houses the power device, the sensor, the main electrode terminal, the sensor signal terminal and the driving terminal. The first and second terminals electrically conduct with each other to form a double structure. Also, the sensor signal terminal and the driving terminal each have a first terminal and a second terminal which are not embedded within the case.
    Type: Grant
    Filed: February 6, 2019
    Date of Patent: December 8, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Motonobu Joko, Rei Yoneyama
  • Patent number: 10854699
    Abstract: Discussed is an organic light emitting display device with auxiliary electrode and method of manufacturing the same according to the embodiments. The present disclosure is directed to provide a top emission type transparent organic light emitting display device and a method of manufacturing the same, which provides an area of an auxiliary electrode that effectively reduces a resistance of a cathode electrode, and decreases the number of masks, thereby simplifying the manufacturing process.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: December 1, 2020
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Joonsuk Lee, SeJune Kim
  • Patent number: 10847657
    Abstract: A thin film transistor 100 according to the invention includes a gate electrode 20, a channel 44, and a gate insulating layer 34 provided between the gate electrode 20 and the channel 44 and made of oxide (possibly containing inevitable impurities; this applies to oxide hereinafter) containing lanthanum and zirconium. The channel 44 is made of channel oxide including first oxide containing indium, zinc, and zirconium (Zr) having an atomic ratio of 0.015 or more and 0.075 or less relative to indium assumed to be 1 in atomic ratio, second oxide containing indium and zirconium (Zr) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, or third oxide containing indium and lanthanum having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: November 24, 2020
    Assignee: JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Tatsuya Shimoda, Satoshi Inoue, Tue Trong Phan, Takaaki Miyasako, Jinwang Li
  • Patent number: 10811465
    Abstract: Provided are a display panel and a display device. The display panel includes a display region having a first steplike edge. The display region is provided with a plurality of sub-pixel groups. Each sub-pixel group includes a first sub-pixel unit, a second sub-pixel unit and a third sub-pixel unit. The first sub-pixel unit, the second sub-pixel unit and the third sub-pixel unit have different luminous colors. Along a connecting line of step apex angles of the first steplike edge, the display region is provided with a plurality of first sub-pixel groups and a plurality of second sub-pixel groups. The first sub-pixel unit in each first sub-pixel group is disposed at a step apex angle of the first steplike edge, and the second sub-pixel unit in each second sub-pixel group is disposed at the step apex angle of the first steplike edge.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: October 20, 2020
    Assignee: Shanghai Tianma AM-OLED Co., Ltd.
    Inventors: Yuan Li, Xian Chen, Lijing Han, Kaihong Huang
  • Patent number: 10811482
    Abstract: A display device includes a first circuit substrate and an overlapping second circuit. At least one connection pin is disposed in an opening in a base substrate which is disposed between the first circuit substrate and the second circuit substrate and the at least one connection pin is configured to connect the first circuit substrate to the second circuit substrate through the opening in the base substrate.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: October 20, 2020
    Assignee: SAMSUMG DISPLAY CO., LTD.
    Inventors: Kang-Min Kim, Sooyon Moun, Namheon Kim, Hasook Kim, Joohyung Lee
  • Patent number: 10803285
    Abstract: A display device includes a base substrate, a pixel defining layer, a spacer layer and a photosensitive circuit. The pixel defining layer is on the substrate and includes a pixel region and a pixel gap region; the spacer layer is on the pixel gap region of the pixel defining layer and at a side of the pixel defining layer away from the base substrate; and the photosensitive circuit is at a side of the pixel defining layer away from the spacer layer. The spacer layer is lightproof, a first opening is in the spacer layer, the first opening and the photosensitive circuit are overlapped with each other in a direction perpendicular to the base substrate, and the photosensitive circuit is configured to detect light passing through the first opening.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: October 13, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Meng Zhao, Lei Wang
  • Patent number: 10797113
    Abstract: One object of this invention is to provide a novel light-emitting device with low power consumption. The light-emitting device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first electrode, a second electrode, and a light-emitting layer. The second light-emitting element includes the first electrode, a third electrode, and the light-emitting layer. The second electrode comprises only a first conductive film, and the third electrode comprises a second conductive film and a third conductive film. The first electrode has a function of reflecting light. The second conductive film has functions of reflecting light and transmitting light. The first conductive film and the third conductive film each have a function of transmitting light.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: October 6, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Nobuharu Ohsawa, Satoshi Seo, Toshiki Sasaki
  • Patent number: 10790386
    Abstract: A silicon carbide semiconductor device includes an n-type silicon carbide semiconductor substrate, a drain electrode electrically connected to a rear face, an n-type semiconductor layer having a second impurity concentration lower than the first impurity concentration, a p-type first semiconductor region, an n-type second semiconductor region, and an n-type third semiconductor region. A trench is formed having a gate electrode therein in which the bottom face of the trench contacts the p-type semiconductor region. A metal layer is electrically connected to the third semiconductor region, and a source electrode electrically connects the second semiconductor region and the metal layer to each other.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: September 29, 2020
    Assignee: HITACHI, LTD.
    Inventors: Yuan Bu, Hiroshi Miki, Naoki Tega, Naoki Watanabe, Digh Hisamoto, Takeru Suto
  • Patent number: 10749043
    Abstract: A semiconductor device having first through third layers. The first layer has a first conductivity type. The second layer has a second conductivity type different from the first conductivity type. The third layer has a first portion having the second conductivity type and a second portion having the first conductivity type. A trench structure is located in the first portion and is completely surrounded by the first portion in an area extending from a first surface of the third layer to a second surface of the third layer.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: August 18, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Katsumi Nakamura
  • Patent number: 10748955
    Abstract: An image sensor and a method of manufacturing the image sensor are provided. The image sensor includes: a substrate comprising a pixel area, a first side, and a second side opposite to the first side, wherein the pixel area includes pixels and light is incident to the second side; a photodiode arranged in each of the pixels of the substrate; a pixel separation structure arranged in the substrate to separate the pixels from each other and including a conductive layer therein; and a voltage-applying wire layer spaced apart from the conductive layer and arranged to surround at least a portion of an outer portion of the pixel area. The conductive layer has a mesh structure that is a single unitary structure, and the voltage-applying wire layer is electrically connected to the conductive layer through at least one contact.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: August 18, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-sun Oh, Dong-hyuk Park, Hee-sang Kwon
  • Patent number: 10734471
    Abstract: The present disclosure discloses an organic light emitting display device having a substrate including an active area configured to display an image and an inactive area configured to surround the active area; a power supply line in the inactive area; a first planarization layer on a layer where the power supply line is disposed on; a first metal layer on the first planarization layer and in contact with the power supply line; a second planarization layer configured to planarize an upper portion of the first metal layer; and a second metal layer, on the second planarization layer, and in contact with the first metal layer and a cathode of an organic light emitting diode, so that an improved arrangement of signals lines in the inactive area where conductive lines are efficiently arranged in a limited space at an edge portion of the substrate in order to realize a narrow bezel configuration and have a signal line structure capable of supplying stable power to various components.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: August 4, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: JongChan Park, JinHwan Kim
  • Patent number: 10720596
    Abstract: The organic light emitting display panel includes a first electrode formed on a substrate, an organic light emitting layer formed on the first electrode, a second electrode formed on the organic light emitting layer, a front sealing layer formed on the second electrode, wherein the front sealing layer is formed by alternately laminating an inorganic barrier layer and an organic barrier layer at least once, and at least one capping layer formed between the lowest layer closest to the second electrode among a plurality of thin films of the front sealing layer and the second electrode and having a higher index of refraction than an index of refraction of the lowest layer.
    Type: Grant
    Filed: July 9, 2013
    Date of Patent: July 21, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: Young-Dock Cho, Kwang-Yeon Lee, Heui-Dong Lee, Eun-Jung Park, Hong-Je Yun, Sang-Kyoung Moon
  • Patent number: 10707321
    Abstract: A power device, which has a Field Stop (FS) layer based on a semiconductor substrate between a collector region and a drift region in an FS-IGBT structure. The FS layer includes multiple implants for improved functionality of the power device.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: July 7, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Kyu-hyun Lee, Se-kyeong Lee, Doo-seok Yoon, Soo-hyun Kang, Young-chul Choi