Patents Examined by Thomas Lee
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Patent number: 9830456Abstract: A trusted processor is pre-booted using a secure pre-boot loader integrated with the trusted processor. The trusted processor verifies whether an external boot loader is valid, and when valid, the trusted processor is booted using the external boot loader, thereby enabling trusted operation of the trusted processor. The trusted processor verifies whether a firmware image for a field programmable device is valid, and when valid, a firmware image loading process for the field programmable device is triggered. When the firmware image loading process is triggered, the firmware image is loaded into the field programmable device and the field programmable device is released to execute of the firmware image. The field programmable device verifies whether an external boot loader for an untrusted processor is valid, and when valid, the untrusted processor is booted using the external boot loader for the untrusted processor, thereby enabling trusted operation of the untrusted processor.Type: GrantFiled: October 21, 2013Date of Patent: November 28, 2017Assignee: Cisco Technology, Inc.Inventors: Anthony H. Grieco, Chirag Shroff
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Patent number: 9826677Abstract: Data is collected from sensors related to the opener assembly for seeders, such as for discs and hoe drills, in order to better determine how the opener assembly reacts while operating in various conditions and to more precisely control operation of the opener assembly. Accordingly, a control system and a sensor array are utilized to provide automatic and continuous down pressure adjustments (according to a certain user specified range) at various speeds to substantially maintain a relatively constant seed depth. The sensor array could also be monitored and controlled by an operator to control settings (such as with respect to seed depth and/or opener down pressure) of the seeding implement from the cab to provide manual down pressure adjustments at various speeds. In various aspects, seeding speed and/or tractor speed may also be parameters controlled via the sensor feedback according to a certain user specified range of sensor variation.Type: GrantFiled: December 16, 2014Date of Patent: November 28, 2017Assignee: CNH Industrial Canada, Ltd.Inventors: Joel Gervais, James W Henry
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Patent number: 9823724Abstract: In one embodiment, a mobile client system may determine its location. The mobile client system may store the location in a location history in a memory of the mobile client system, where the location history comprises one or more geographic locations and one or more time stamps corresponding to each of the geographic locations. The mobile client system may detect its current status based at least in part on whether the mobile client system is stationary. The mobile client system may send the location history to a location server of an online social network based at least in part on the current status of the mobile client system and a power requirement for sending the location history to the location server.Type: GrantFiled: July 3, 2014Date of Patent: November 21, 2017Assignee: Facebook, Inc.Inventors: Andrea Vaccari, Yuntao Jia, Tushar Bisht, Jun Ge, Pierre Moreels
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Patent number: 9824056Abstract: The timing of the synchronous interface is controlled by a dock signal driven by a controller. The clock is toggled in order to send a command to a memory device via the interface. If there are no additional commands to be sent via the interface, the controller suspends the clock signal. When the memory device is ready, the memory device drives a signal back to the controller. The timing of this signal is not dependent upon the clock signal. Receipt of this signal by the controller indicates that the memory device is ready and the clock signal should be resumed so that a status of the command can be returned via the interface, or another command issued via the interface.Type: GrantFiled: October 29, 2010Date of Patent: November 21, 2017Assignee: Rambus Inc.Inventor: Yuanlong Wang
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Patent number: 9823722Abstract: A method for adjusting a voltage of a supercapacitor is disclosed, the method, which is used to retard aging of the supercapacitor and extend a service life of the supercapacitor, includes: acquiring information that carries a system service volume; configuring a size of an available capacity value of the Cache according to the information; and adjusting a working voltage of the supercapacitor according to the configured size of the available capacity value of the Cache.Type: GrantFiled: February 13, 2015Date of Patent: November 21, 2017Assignee: Huawei Technologies Co., Ltd.Inventor: Weijian Liu
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Patent number: 9820235Abstract: A method for reducing power consumption in a communication device. The method includes determining, by the communication device, that a packet transmitted on a communication medium is not intended for the communication device and estimating a length of the packet. If the length is greater than a first threshold but less than a second threshold, selecting a first group of components of the communication device to which to reduce power. If the length is greater than the second threshold, selecting a second group of components of the communication device to which to reduce power. The second group of components includes the first group of components. The method includes reducing power to the selected group of components.Type: GrantFiled: July 13, 2016Date of Patent: November 14, 2017Assignee: QUALCOMM IncorporatedInventors: Xiaoru Zhang, James Simon Cho, Tao-Fei Samuel Ng, Sreepathy Laxmanbabu Aida
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Patent number: 9817432Abstract: Problem A sub clock for a sleep mode in a a microcomputer is retained to be operable with high accuracy. Solution A sub clock 20 counts oscillating pulses of a CR oscillating circuit 21 by a loop counter 22, and outputs a clock signal each time the oscillating pulses reach a target count Pm. A CPU 11 counts oscillating pulses of the CR oscillating circuit 21 in a predetermined time measured by a time counter 25 in response to a clock signal of a main clock 13 by a crystal oscillator, and corrects the target count Pm according to a pulse count P thereof. Since the real count state is obtained based upon the clock signal of the main clock having high frequency accuracy without the estimation of the sub clock 20, the high accuracy of the sub clock is retained even if environmental changes such as temperatures occur.Type: GrantFiled: November 11, 2014Date of Patent: November 14, 2017Assignee: Calsonic Kansei CorporationInventor: Hiroshi Miyasaka
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Patent number: 9817434Abstract: A memory system including a controller that generates a processor clock, and a plurality of memory devices each including an internal clock generator that generates an internal clock in synchronization with the processor clock, and a memory that performs a peak current generation operation in synchronization with the internal clock, wherein at least two of the memory devices generate their respective internal clocks at different times such that the corresponding peak current generation operations are performed at different times.Type: GrantFiled: January 6, 2016Date of Patent: November 14, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Bo-Geun Kim, Kye-Hyun Kyung, Jae-Yong Jeong, Seung-Hun Choi, Seok-Cheon Kwon, Chul-Ho Lee
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Patent number: 9815161Abstract: A backlash automatic detection system comprises a control device and a machine tool. The machine tool comprises a servo driver, a lead screw, a nut seat and a platform. The method comprises: entering an initial state and outputting a control command to the servo driver through the control device; driving the lead screw by the servo driver to move the nut seat towards a first direction and changing the movement direction of the nut seat towards a reverse second direction by the servo driver; defining a backlash phenomenon period according to one time point at which the nut seat starts to move towards the second direction and another time point at which the platform is driven to move by the nut seat; defining the displacement of the nut seat corresponding to the backlash phenomenon period as a backlash value.Type: GrantFiled: December 26, 2014Date of Patent: November 14, 2017Assignee: Industrial Technology Research InstituteInventors: Yi-Ying Lin, Shih-Je Shiu, Che-Wei Hsu, Po-Hsun Wu, Chien-Yi Lee
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Patent number: 9811064Abstract: Embodiments may include a method of curtailing an output level of an EG system. The method may include receiving, at a processor, a first dynamic control signal. The first dynamic control signal may include an instruction to adjust an output level of an EG system to a first output level. The method may also include maintaining the output level of the EG system at the first output level for a predetermined period. The method may further include determining, by the processor, whether a second dynamic control signal is received during the predetermined period. If a second dynamic control signal is not received during the predetermined period, the method may include ramping down the output level at a predetermined rate after the predetermined period until a predetermined failsafe output level is achieved. The predetermined failsafe output level may be maintained until a third dynamic control signal is received by the processor.Type: GrantFiled: April 27, 2015Date of Patent: November 7, 2017Assignee: SolarCity CorporationInventors: Eric Daniel Carlson, Nathan Murthy
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Patent number: 9811143Abstract: Apparatus, systems, and methods provide dynamic spatial power steering among a plurality of power domains in the computer system on a per phase basis of a particular application. Dynamic spatial power steering may include, for example, determining a plurality of phases corresponding to an application comprising tasks for execution on a processing node. determining a spatial power distribution between a plurality of power domains on the processing node based on a performance metric for each phase, monitoring the application to detect a current phase, and applying the spatial power distribution correspond to the current phase to the plurality of power domains.Type: GrantFiled: December 23, 2014Date of Patent: November 7, 2017Assignee: INTEL CORPORATIONInventors: Jonathan M. Eastep, Rohit Banerjee, Richard J. Greco, Ilya Sharapov, David N. Lombard, Hari K. Nagpal
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Patent number: 9811348Abstract: The present disclosure provides an information processing apparatus effective in detecting an unauthorized use or misuse of the information processing apparatus from when the OS is shut down to when the OS is started. An information processing apparatus controlled by an operating system comprises: an operation history generating section which creates an operation history of the information processing apparatus after the operating system is shut down before the operating system is started; and a storage unit which stores information including the created operation history.Type: GrantFiled: September 10, 2013Date of Patent: November 7, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventor: Shunsuke Saito
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Patent number: 9811150Abstract: A method for managing a processor, the processor comprising a common supply rail and processor cores being connected to the common supply rail, wherein each processor core comprises a core unit, wherein the method comprises detecting idle state exits indicated by the core units; and delaying a command execution of at least one of the core units indicating an idle state exit when the number of idle state exits exceeds a predetermined threshold idle state exit number may reduce voltage droops due to several processor cores leaving the idle state at the same time.Type: GrantFiled: November 10, 2015Date of Patent: November 7, 2017Assignee: International Business Machines CorporationInventors: Malcolm S. Allen-Ware, Alan James Drake, Michael Stephen Floyd, Charles Robert Lefurgy, Karthick Rajamani, Tobias Webel
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Patent number: 9812863Abstract: An electrical power source includes a power converter and either an electrical generator or an electrical energy storage device. Power flow is controlled through control of the power converter based on a voltage source and resistance model of the electrical power source. A power converter for an electrical generator is controlled to synthesize a constant voltage of the voltage source and a variable value of the resistance. The resistance value is controlled to deliver a maximum available output power to the electrical microgrid over a range of microgrid voltages up to a voltage below a maximum allowable voltage of the electrical microgrid. For an electrical energy storage device, the power converter is controlled to synthesize a resistance value of the resistance that is dependent upon a phase angle between the voltage at the microgrid side of the electrical power source and current of the electrical energy storage device.Type: GrantFiled: December 18, 2014Date of Patent: November 7, 2017Assignee: SOLANTRO SEMICONDUCTOR CORP.Inventors: James Benson Bacque, Raymond Kenneth Orr, Edward Patrick Keyes
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Patent number: 9811110Abstract: A system and a method of sampling an event signal using multiple clocking signals each provided in a separate candidate clock domain each of which also receives points in time from a master clock. From each candidate clock domain, clocked by the individual clocking signals, pairs of a received point in time and event signal value are fed to a master clock domain. In the master clock domain, the values of the event signal may be determined over time as a function of master clock time. This may be used for synchronizing operation in the master clock domain of e.g. packet time stamping with an overall time defined by the event signal. Using multiple clocking signals for the sampling, a much more precise sampling of the event signal is facilitated.Type: GrantFiled: October 28, 2015Date of Patent: November 7, 2017Assignee: Napatech A/SInventors: René Krog Josiassen, Søren Kragh
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Patent number: 9804661Abstract: A power control method of an electronic device is provided. The electronic device transmits power change information containing a power control value of an application to another electronic device, and receives and stores power control information about the application transmitted from the another electronic device. If a power level of the electronic device is lower than a predetermined power change level when the application is executed, the electronic device executes the application with power control data of the application in the power control information stored in the electronic device.Type: GrantFiled: April 22, 2015Date of Patent: October 31, 2017Assignee: Samsung Electronics Co., LtdInventors: Sangwon Chae, Hyoungil Kim, Jungeun Lee
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Patent number: 9798602Abstract: A watchdog timer circuit for use in microcomputer monitor systems is disclosed. This circuit includes a timer circuit responsive to receipt of a count clock signal for counting it up, and a timer control circuit which loads an externally inputted data signal (stn) in sync with a timer refresh instruction (prun) and holds therein a sequentially loaded latest multi-bit data signal as reference data. When the reference data agrees with a predefined pattern and simultaneously another prespecified condition is met, the timer control circuit interrupts the clock signal counting operation of the timer circuit. During interruption of the counting operation, when the reference data does not agree with the predefined pattern or when the above-stated another prespecified condition becomes unsatisfied, the control circuit allows the timer circuit to restart the clock signal counting operation.Type: GrantFiled: November 29, 2015Date of Patent: October 24, 2017Assignee: Renesas Electronics CorporationInventors: Toshiaki Furuya, Osamu Watanabe, Satoshi Kondo
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Patent number: 9791914Abstract: It is an object to enable a request received from an outside to be automatically processed immediately before shifting to a power saving state such as a suspend state. On the way of a shift from a normal state to the suspend state and in a state where the shift cannot be interrupted, when a predetermined request such as a print job is received from an external interface, an MFP reserves a return to the normal state by turning on a wake-up reservation flag and continues a suspend process. When shifting to the suspend state, if the wake-up reservation flag is ON, a power supply control unit performs a return (resume) to the normal state even if no wake-up factor occurs.Type: GrantFiled: June 12, 2014Date of Patent: October 17, 2017Assignee: CANON KABUSHIKI KAISHAInventor: Kenji Hara
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Patent number: 9792249Abstract: A system and method for provisioning of modular compute resources within a system design are provided. In one embodiment, a node card or a system board may be used.Type: GrantFiled: June 29, 2015Date of Patent: October 17, 2017Assignee: III HOLDINGS 2, LLCInventors: David Borland, Arnold Thomas Schnell, Mark Davis
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Patent number: 9785220Abstract: A power management technique utilizing a method for accurately and rapidly estimating the change in the statistical distribution of data at each block in a communication system leading to or originating from a memory that is experiencing voltage scaling induced errors is disclosed. An appropriate memory supply voltage that maximizes power savings is found by exploiting the available SNR slack while keeping system performance within a required margin.Type: GrantFiled: December 30, 2013Date of Patent: October 10, 2017Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIAInventors: Ahmed M. Eltawil, Fadi J. Kurdahi, Muhammad Abdelghaffar, Amr M. A. Hussein, Amin Khajeh