Patents Examined by Thomas Lee
  • Patent number: 9785184
    Abstract: Embodiments of an apparatus for implementing a display port interface are disclosed. The apparatus may include a source processor and a sink processor coupled through an interface. The interface may include a primary link, an auxiliary link, and a hot plug detect link. The source processor may be operable to send a wake-up command to the sink processor via the auxiliary link. The source processor may send initialization parameters to the sink processor via the primary link. The initialization parameters may include a clock data recovery lock parameter and an idle parameter. Following the initialization parameters, the source processor may send a synchronization signal to the sink processor via the primary link. The source processor may then send a sleep command via the primary link to the sink processor.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: October 10, 2017
    Assignee: Apple Inc.
    Inventor: Brijesh Tripathi
  • Patent number: 9785211
    Abstract: The feature size of semiconductor devices continues to decrease in each new generation. Smaller channel lengths lead to increased leakage currents. To reduce leakage current, some power domains within a device may be powered off (e.g., power collapsed) during periods of inactivity. However, when power is returned to the collapsed domains, circuitry in other power domains may experience significant processing overhead associated with reconfiguring communication channels to the newly powered domains. Provided in the present disclosure are exemplary techniques for isolating power domains to promote flexible power collapse while better managing the processing overhead associated with reestablishing data connections.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: October 10, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Christopher Edward Koob, Xufeng Chen, Robert Allan Lester, Manojkumar Pyla, Peixin Zhong
  • Patent number: 9778935
    Abstract: The present disclosure discloses a startup method and a wireless handheld device. The present disclosure relates to the field of communications technologies. The startup method includes: when a wireless handheld device is started, if it is detected that a Kth Android installation package file in a data application directory is undergoing installation or updating, decompressing a library file of the Kth Android installation package file to a preset subdirectory in the data application directory, where K is an integer greater than zero. A corresponding wireless handheld device is further provided. By adopting the present disclosure, a startup speed of the wireless handheld device can be improved.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: October 3, 2017
    Assignee: Huawei Device Co., Ltd.
    Inventor: Xuegang Zhang
  • Patent number: 9778732
    Abstract: An assembly includes a cabinet having an interior and a door to gain access to the interior. An intelligent electronic device (IED) is within the interior of the cabinet and includes inputs providing electrical connections to the IED, pushbuttons to provide user input to the IED, a display module including a display, a component, and a timer circuit. The timer circuit powers the component OFF or places it in a reduced power state when not in use after a certain amount of time. A switch is associated with the door and is electrically connected to at least one of the inputs so that when the display module is powered OFF or in the reduced power state and when the door is opened, the switch causes a signal to be sent to the timer circuit to cause the timer circuit to power the component fully ON.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: October 3, 2017
    Assignee: ABB Schweiz AG
    Inventors: Harshavardhan M. Karandikar, Douglas Voda, Cleber Angelo, K. Brent Binkley, Indrajit Jadhav
  • Patent number: 9778731
    Abstract: A method for performing system power budgeting within an electronic device and an associated apparatus are provided. The method includes the steps of: utilizing a power consumption index generator positioned in a specific subsystem to generate a power consumption index corresponding to the specific subsystem, where the electronic device includes a plurality of subsystems, and the specific subsystem is one of the plurality of subsystems; and performing configuration adjustment on at least one portion of the electronic device according to the power consumption index corresponding to the specific subsystem.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: October 3, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chia-Lin Lu, Hui-Hsuan Wang, I-Pu Niu, Yu-Chung Chang
  • Patent number: 9778722
    Abstract: A system and method for controlling power consumption is described herein. A computer system includes an enclosure. The enclosure is configured to contain a plurality of removable compute nodes. The enclosure includes a power controller configured to individually control an amount of power consumed by each of the plurality of removable compute nodes. The power controller provides a plurality of power control signals. Each power control signal is provided to and controls the power consumption of one of the plurality of removable compute nodes.
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: October 3, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Darren J. Cepulis, Chanh V. Hua, Yasir Q. Hashmany, Scott T. Christensen
  • Patent number: 9778677
    Abstract: A bus interface, for allowing a plurality of devices to communicate with one another via the bus, includes a bit timing symmetrization component for symmetrizing the bit stream. For an incoming bit stream, the bit timing symmetrization component further includes an input delay filter for delaying recessive to dominant edges for a given received bit stream and sampling the delayed input signal at the sample point. In one embodiment, bit timing synchronization may still be performed with the undelayed recessive to dominant edges. For an outgoing bit stream, the bit timing symmetrization component transmits a recessive bit, that followed a previously transmitted dominant bit, before the start of the next bit time, and transmits a dominant bit, that followed a previously transmitted recessive bit, with a delay of a configurable amount of time.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: October 3, 2017
    Assignee: Infineon Technologies AG
    Inventor: Achim Vowe
  • Patent number: 9778894
    Abstract: According to an embodiment, an electronic device is configured to output extended display identification data (EDID) to another electronic device, and to receive image data corresponding to the EDID from the other electronic device. The electronic device includes a memory and a controller. The memory is configured to store therein a plurality of distinct types of EDID. The controller is configured to detect a condition of a power source supplied to the electronic device, and to select an EDID corresponding to the condition.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: October 3, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Ichiro Tomoda
  • Patent number: 9772857
    Abstract: The present invention discloses a low-power startup method and a user equipment. The method includes: running, by a user equipment UE, a first subprogram in a boot load program bootloader, so as to determine whether the UE is charged through a universal serial bus interface USB; if the UE is charged through the USB and battery power is lower than a starting threshold, initializing, by the UE, the USB; when the USB successfully enumerates the UE, running, by the UE, a second subprogram in the bootloader to initialize an off-chip random memory in the UE; running, by the UE, a third subprogram in the bootloader to read a system mirror from an off-chip flash memory in the UE and load the system mirror to the off-chip random memory; and running, by the UE, the system mirror to complete a startup.
    Type: Grant
    Filed: September 16, 2014
    Date of Patent: September 26, 2017
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Yingguo Chen, Shilin Pan
  • Patent number: 9766900
    Abstract: A method includes identifying, from among nodes within a multi-node system, a node that has a security setting satisfying a security setting criteria, booting the multi-node system with the identified node as the primary node, and operating the multi-node system using the security setting of the identified node. Accordingly, the method may provide dynamic selection of a primary node based upon the security setting criteria and the security settings of the nodes within the multi-node system. Optionally, the security setting of each node is stored in a trusted platform module. In non-limiting examples, the security setting criteria may be the highest security setting among all nodes within the multi-node system or a predetermined minimum security setting, such as a trusted execution technology setting.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: September 19, 2017
    Assignee: Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
    Inventors: Raghuswamyreddy Gundam, Shiva R. Dasari
  • Patent number: 9760383
    Abstract: An electronic device receives data associated with at least one biometric detected by a sensor of a remote control device that is operable to transmit one or more instructions to the electronic device. A profile for a user associated with the data is determined out of a number of profiles for the user based on the data. The electronic device is then be configured in one or more ways according to the determined user profile. A user may have any number of different profiles for the electronic device, each associated with a different biometric or combination of biometrics. In this way, a user may easily access different experiences with the same device that may each be fully personalized in a different way and/or for a particular purpose.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: September 12, 2017
    Assignee: Apple Inc.
    Inventors: Michael DiVincent, Nicole J. Hollopeter, Ruben Caballero
  • Patent number: 9760157
    Abstract: A method for operating an apparatus, such as a video signal receiver, having first and second stand-by modes when the apparatus is in an off state, wherein the first stand-by mode provides a different start-up time and consumes a different amount of power than the second stand-by mode, is capable of saving power without requiring a user to wait a long time for a start-up sequence.
    Type: Grant
    Filed: August 18, 2010
    Date of Patent: September 12, 2017
    Assignee: THOMSON LICENSING
    Inventor: Emanuel Kleiber
  • Patent number: 9753878
    Abstract: A system of extending functionalities of a host device using a smart flash storage device comprises the host device having a host interface and configured to perform a specific function to generate a first set of data. The host device is coupled with a flash storage device. The flash storage device is configured to conform to a flash memory interface. A set of data generated by the host device is to be stored in flash memory storage of the flash storage device. A processor of the flash storage device is configured to run one or more user applications to process the set of data. The processor is to operate using power supplied by the host device.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: September 5, 2017
    Assignee: Intel Corporation
    Inventors: Randolph Y. Wang, Shaojun Wei, Leibo Liu, Eugene Tang, Jiqiang Song, Sun Chan, Dawei Wang, Jesse Fang, Paul Peng, Shouyi Yin
  • Patent number: 9753526
    Abstract: Apparatus, systems, and methods provide an interface between a plurality of hardware resources of a node and a power manager. The interface is configured to define one or more resource groups to expose to the power manager for power measurement and control, assign the plurality of hardware resources to the one or more resource groups, and provide a power allowance to each resource group.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: September 5, 2017
    Assignee: INTEL CORPORATION
    Inventors: Federico Ardanaz, Jonathan M. Eastep, Richard J. Greco, Ramkumar Nagappan, Alan B. Kyker
  • Patent number: 9753485
    Abstract: A data processing method and apparatus are provided. The data processing apparatus includes a converter module and a control module. The converter module receives a clock signal through a pin, and decides a bit value of the first data according to a length of a corresponding period of the clock signal. The control module determines whether to perform a bit writing operation for writing the bit value into a memory according to the clock signal and the first data.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: September 5, 2017
    Assignee: Novatek Microelectronics Corp.
    Inventor: Pao-Yen Lin
  • Patent number: 9753519
    Abstract: Methods and systems may include a human interface device (HID) and logic to place the HID in a blocked state in response to a request to power off the system. The logic can also use a speculative start-up heuristic to establish one or more subsequent operating states for the system while the HID is in the blocked state, wherein the background automatic state transitions may maximize battery life when a user is not present. In addition, the HID may be removed from the blocked state in response to a request to power on the system. Accordingly, the speculative start-up heuristic can make system “ready-to-use” before the user actually interacts with any inputs (e.g. power button, or touch screen) of the system.
    Type: Grant
    Filed: October 14, 2011
    Date of Patent: September 5, 2017
    Assignee: Intel Corporatoin
    Inventors: Antonio S. Cheng, Faraz A. Siddiqi
  • Patent number: 9753525
    Abstract: Systems, methods, and devices are disclosed for mitigating voltage droop in a computing device. An example apparatus includes a plurality of threshold registers to store respective voltage droop thresholds, and an interface to receive a license grant message indicating a license mode for a processor core or domain. The license mode corresponds to a selected set of execution units in the processor core or domain. The apparatus also includes a voltage droop correction module to, based on the license mode indicated in the license grant message, select one of the voltage droop thresholds from the plurality of voltage droop registers, and compare a voltage droop in the processor core or domain with the selected voltage droop threshold. Based on the comparison, the apparatus triggers a voltage droop correction process.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: September 5, 2017
    Assignee: INTEL CORPORATION
    Inventors: Nazar S. Haider, Dean Mulla, Allen W. Chu
  • Patent number: 9753874
    Abstract: Multi-step programming of heat-sensitive non-volatile memory (NVM) in processor-based systems, and related methods and systems are disclosed. To avoid relying on programmed instructions stored in heat-sensitive NVM during fabrication, wherein the programmed instructions can become corrupted during thermal packaging processes, the NVM is programmed in a multi-step programming process. In a first programming step, a boot loader comprising programming instructions is loaded into the NVM. The boot loader may be loaded into the NVM after the thermal processes during packaging are completed to avoid risking data corruption in the boot loader. Thereafter, the programmed image can be loaded quickly into a NV program memory over the peripheral interface using the boot loader to save programming time and associated costs, as opposed to loading the programmed image using lower transfer rate programming techniques. The processor can execute the program instructions to carry out tasks in the processor-based system.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: September 5, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Adam Edward Newham, Rashid Ahmed Akbar Attar, Seung Hyuk Kang, Jung Pill Kim, Sungryul Kim, Taehyun Kim
  • Patent number: 9747114
    Abstract: A SBSP writes a log into a spad in a log processor and the writing of the log from the spad to a serial port is performed by the log processor. When initialization of a main memory has been completed, the log processor temporarily writes the data read from the spad into a logmem and then clears the spad. Furthermore, when an output of the log performed by the log processor has been completed, the SBSP adds, in cooperation with the BIOS and the OS, the log processor and the logmem as the resources.
    Type: Grant
    Filed: September 10, 2014
    Date of Patent: August 29, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Minoru Kawarabayashi, Makoto Kozawa, Yusuke Kudo, Juntaro Minezaki, Masakazu Yabe
  • Patent number: 9746905
    Abstract: An information processing apparatus includes, a reception unit configured to receive an instruction to transfer the information processing apparatus to the second power state, an analysis unit configured, when the reception unit receives the instruction, to analyze a factor limiting the transfer of the information processing apparatus to the second power state, and a control unit configured, when the analysis unit analyzes the factor and as a result the factor is a first factor, to control the information processing apparatus to transfer to the third power state without waiting until the factor is resolved, and configured, when the factor is a second factor, to control the information processing apparatus to wait until the factor is resolved, and to transfer to the second power state.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: August 29, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Takaaki Miyata