Abstract: An apparatus and method for multi-point detection in a power source equipment (PSE) device is provided. During multi-point detection, a series of at least four currents is sequentially applied to a link port of the PSE device. Each current is applied during a different measurement interval. A voltage measurement sample is obtained for each of the measurement intervals. A difference in voltage between alternating voltage samples is determined and used by a detection module to determine whether a valid power device is coupled to the link port of the PSE.

Abstract: The disclosed embodiments provide a system that facilitates synchronization between a first component and a second component connected to the first component via an interface in a computer system. During an active state of the interface, the system uses a local time base in the second component to generate a local clock signal that tracks a host clock signal from the first component. Next, during an inactive state of the interface, the system uses the local time base to maintain the local clock signal at the second component. Finally, during a subsequent active state of the interface after the inactive state, the system adjusts the local clock signal to remove clock drift between the local clock signal and the host clock signal.

Abstract: An apparatus is provided for generating a timing signal having an input for receiving a first signal indicating successive time intervals, means for receiving a second signal indicating successive time intervals, and a generator adapted to generate a timing signal based on the second signal and on a relationship between one or more time intervals of the first signal and one or more time intervals of the second signal. This arrangement enables a timing signal to be generated using a time signal produced by a source or device and to be based on a time signal produced by another source or device.

Abstract: A computing device, such as a mobile communication device, is provided that enables a user to adjust a power user setting indicative of the user's experience level and/or automatically adjusts the power user setting in response to predetermined conditions. The power user setting may then be provided to or retrieved by applications to adjust the operating mode of the application based on user experience or by web servers to vary content delivery based on user experience.

Abstract: A power control system, a power control method, and a computer system thereof are disclosed. The power control system comprises a control module for receiving a control signal. A power management module is used for receiving a power signal and outputting an auxiliary power. A first switch module receives the control signal and controls the power management module to output the auxiliary power to the control module by the control signal. A second switch module controls the first switch module. After receiving the control signal, the control module determines whether the control signal is continuously received until a predetermined time. If yes, the control module controls the first switch module to transmit the auxiliary power continuously with the second switch module and receives the power signal to execute a boot procedure.

Abstract: A method for reducing current leakage in a battery in communication with an information handling system (IHS). The method includes providing a battery management unit (BMU) in the battery, the BMU in communication with an embedded controller (EC), the BMU in a standby mode while the battery is coupled to the IHS, and configuring the BMU to exit the standby mode if an external power supply is coupled to the IHS. Also disclosed is an IHS which includes an EC in communication with a BMU, a power switch in communication with the EC and the BMU, and a control switch configured to be switched on if an external power supply is coupled to the IHS or if the power switch is activated without the external power supply, wherein the BMU unit exits the standby mode if the control switch is switched on.

Abstract: Embodiments provide methods, systems, and articles of manufacture for determining a configuration for system board based on a connector. The connector may have a structure that enables a system board to determine configuration data associated with a system configuration.

Abstract: Described is a technology by which a computer system operates in a mode that is different from a general purpose operating mode, upon detection of a special actuation mechanism coupled to the computing device. For example, actuation of a special hardware button may boot or resume a sleeping computer system into a direct experience upon actuation, including by launching a special program corresponding to that button. The computer system may thus enter a mode in which it mimics a special purpose device such as a consumer electronics device, e.g., a dedicated media player. When in a direct experience, the computer system may also operate in a constrained/sandboxed mode in which operating system limits available functionality to less than what is available when running as a general purpose computer system, e.g., keyboard operation and/or file access may be limited. Different actuation mechanisms may correspond to different modes.

Abstract: A method, computer program product, and apparatus for managing power in a data processing system are presented. A core is activated in the data processing system and configured to operate at a frequency in response to receiving a request to increase a processing capacity of a set of resources in the data processing system. A determination whether a use of power resulting from activating the core configured to operate at the frequency meets a policy for the use of the power in the data processing system is made. A set of parameters associated with devices in the set of resources are adjusted to meet the policy for the use of power in the data processing system in response to a determination that the use of power does not meet the policy. A determination whether a number of operations performed per unit of time by a set of cores associated with the set of resources increased after activating the core is made.

Abstract: A computer power saving system includes a computer, an UPS, a power detecting device, and an USB device. The computer includes a USB port and a power management module, and can work in a normal mode or in a STR mode. The UPS is connected to the computer and used for supplying power to the computer upon a condition that a commercial power supply stops supplying power to the computer. The power detecting device detects the state of the commercial power supply and sending out an abnormal power signal when the commercial power supply stops supplying power to the computer. The USB device sends the abnormal power signal to the USB port. When the computer works in the normal mode, the power management module detects the USB port, and controls the computer to shift to the STR mode if the USB port receives the abnormal power signal.

Abstract: Method, apparatus and system are described for converting received timestamps to a time-recording standard recognized by the receiving computing system. Embodiments of the invention generally include receiving data from an external device that includes a timestamp. If the received data is the first communication from the external device, creating a time base used for converting subsequently received timestamps to a recognized standard. Moreover, the system updates the time base if a counter failure at the external device is detected. When the external device transmits subsequent data, the time base is added to the subsequently received timestamps to convert the subsequent timestamps to a time-recording standard recognized by the computing system.

Abstract: In one embodiment, a method includes accessing a first utilization value, accessing a second utilization value, defining a third utilization value, and sending to a first switching portion of a distributed network switch a deactivate signal in response to the third utilization value. The first utilization value is associated with the first switching portion of the distributed network switch. The second utilization value is associated with a second switching portion of the distributed network switch. The third utilization value is associated with the second switching portion of the distributed network switch and is based on the first utilization parameter and the second utilization parameter. The first switching portion of the distributed network switch ceases communication within the distributed network switch in response to the deactivate signal.

Abstract: Method is described for converting received timestamps to a time-recording standard recognized by the receiving computing system. Embodiments of the invention generally include receiving data from an external device that includes a timestamp. If the received data is the first communication from the external device, creating a time base used for converting subsequently received timestamps to a recognized standard. Moreover, the system updates the time base if a counter failure at the external device is detected. When the external device transmits subsequent data, the time base is added to the subsequently received timestamps to convert the subsequent timestamps to a time-recording standard recognized by the computing system.

Abstract: A frequency adapter for synchronizing data transfers between a low-frequency module and a high-frequency module connected to an internal bus. The frequency adapter includes a low-to-high synchronization unit for synchronizing data transfers from the low frequency module to the high-frequency module, wherein the low-to-high synchronization unit is clocked by a low frequency clock; and a high-to-low synchronization unit for synchronizing data transfers from the high frequency module to the low-frequency module, wherein the high-to-low synchronization unit is clocked by a low frequency clock.

Abstract: A semiconductor device having a low power mode includes a buffer circuit associated with an interface pad, a power management controller (PMC), and a wakeup unit for waking up a part of the device from the low power mode. The buffer circuit is disabled in the low power mode by asserting a power on reset (POR) signal associated with the PMC. A wakeup signal is generated and provided to the wakeup unit from an analog power supply associated with the buffer circuit.

Abstract: The present invention provides a server system comprising a first group of mainboard modules and a second group of mainboard modules, each of the first and second groups of mainboard modules including a plurality of mainboard modules. Each mainboard module includes a mainboard and a daughter board electrically connected to the mainboard; a first adaptor and a second adaptor; a hard disk array including a hard disk backplane and a plurality of hard disks, wherein the hard disk backplane is electrically connected to the first adaptor and the second adaptor; a first power control board and a second power control board respectively connected to at least one power supply, wherein the first power control board and the second power control board are electrically connected to the hard disk array; and a management board electrically connected to the first adaptor and the second adaptor.

Abstract: An in-vehicle network system includes plural electronic control units data-communicably connected via a network. The electronic control units include a master unit and a node apparatus composed of electronic control units other than master unit. In the node apparatus, a node time locally used as a reference time by the node apparatus is produced, and a system reference time is received from the master unit via the network. A node time rate, which is a rate of change of the node time per predetermined time period, is calculated based on changes in the node time. A reference time rate, which is a rate of change of the system reference time per the predetermined time period, is also calculated based on changes in the received system reference. The node time production is controlled such that the node time reduces a difference between the node and reference time rates.

Abstract: Various embodiments disclosed herein relate to an efficient computer server system comprising an efficient power supply unit utilizing a plurality of power-rails to supply electric power to the system components, a special-purpose processor configured to operate as an efficient general purpose server processor while maintaining high performance, and a platform manager configured to control the power supplied to the system components to minimize the system's overall power consumption. Some disclosed embodiments relate to a method of reducing power consumption in information handling server systems comprising configuring a special-purpose processor to be function as a general purpose server processor, selecting a set of power efficient system components based on performance and power efficiency, utilizing an efficient power supply unit and a platform manager to control the power supplied by the power supply unit, and adjusting the processor's frequency to achieve an optimal performance/power-consumption ratio.

Abstract: When switching a power supply rail for a processing circuit from a first voltage level to a second voltage level, power level detection circuitry detects when the supply voltage level reaches a predetermined voltage level. The power level detection circuitry comprises a first transistor and a second transistor which compete with one another such that the first transistor pulls a signal node voltage level at a signal node towards the supply voltage level while the second transistor pulls the signal node voltage level towards an external power supply voltage level. When the supply voltage level on the power supply rail reaches the predetermined voltage level, the first transistor overcomes the second transistor to trigger a ready signal indicating that the supply voltage level has reached the predetermined voltage level.

Abstract: A method for adjusting central processing unit (CPU) frequency according to the CPU utilization rate in a computer, the method includes the following steps. A Basic Input Output System (BIOS) is booted by turning on the computer. A performance monitor in the CPU is started by the BIOS. A timer is turned on by the BIOS. The system management interrupt program is read by the timer during a time period. A number of clock signals and time values is recorded by the performance monitor in two adjacent time periods. The CPU utilization rate is determined by the performance monitor according to number of clock signals, the time values, and a CPU clock speed. A CPU frequency is adjusted by the BIOS according to the CPU utilization rate. The computer's operation system (OS) is booted by the BIOS.