Abstract: A device includes a first transistor, a second transistor, and a dielectric structure. The first transistor is over a substrate and has a first gate structure. The second transistor is over the substrate and has a second gate structure. The dielectric structure is between the first gate structure and the second gate structure. The dielectric structure has a width increasing from a bottom position of the dielectric structure to a first position higher than the bottom position of the dielectric structure. A width of the first gate structure is less than the width of the dielectric structure at the first position.

Abstract: A high voltage semiconductor device includes a semiconductor substrate, a first drift region, a gate structure, a first sub gate structure, a first spacer structure, a second spacer structure, and a first insulation structure. The first drift region is disposed in the semiconductor substrate. The gate structure is disposed on the semiconductor substrate and separated from the first sub gate structure. The first sub gate structure and the first insulation structure are disposed on the first drift region. The first spacer structure is disposed on a sidewall of the gate structure. The second spacer structure is disposed on a sidewall of the first sub gate structure. At least a part of the first insulation structure is located between the first spacer structure and the second spacer structure. The first insulation structure is directly connected with the first drift region located between the first spacer structure and the second spacer structure.

Abstract: A semiconductor device includes a semiconductor substrate, a control gate, a select gate, a charge trapping structure, and a dielectric structure. The semiconductor substrate has a drain region, a source region, and a channel region between the drain region and the source region. The control gate is over the channel region of the semiconductor substrate. The select gate is over the channel region of the semiconductor substrate and separated from the control gate. The charge trapping structure is between the control gate and the semiconductor substrate. The dielectric structure is between the select gate and the semiconductor substrate. The dielectric structure has a first part and a second part, the first part is between the charge trapping structure and the second part, and the second part is thicker than the first part.

Abstract: Example embodiments described herein involve a system for testing a light-emitting module. The light-emitting module may include a mounting platform configured to hold a light-emitting module for a camera. The mounting platform may also be configured to rotate. The system may further include a housing holding a plurality of photodiodes arranged in an array over at least a 90 degree arc of a hemisphere. The system may also include a controller configured to control the photodiodes and the rotation of the mounting platform.

Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.

Abstract: The present disclosure provides a multi-state one-time programmable (MSOTP) memory circuit including a memory cell and a programming voltage driving circuit. The memory cell includes a MOS storage transistor, a first MOS access transistor and a second MOS access transistor electrically connected to store two bits of data. When the memory cell is in a writing state, the programming voltage driving circuit outputs a writing control potential to the gate of the MOS storage transistor, and when the memory cell is in a reading state, the programming voltage driving circuit outputs a reading control potential to the gate of the MOS storage transistor.

Abstract: A wireless transmission module for transmitting energy or signals includes a first magnetically conductive element, a first coil assembly and a first adhesive element. The first coil assembly and the first magnetically conductive element are arranged along a main axis. The first adhesive element is configured to be adhered to the first coil assembly and the first magnetic conductive element. The first adhesive element is disposed between the first coil assembly and the first magnetically conductive element.

Abstract: A motion detection method applied into an image sensor device includes: providing a plurality of regions of interest (ROIs) on at least one monitoring image; for each region of interest (ROI): detecting whether at least one motion event occurs within the each ROI; and determining a priority level of the each ROI according to at least one feature information of the at least one motion event; and determining an alarm schedule of the ROIs for a user according to a plurality of priority levels of the ROIs.

Abstract: The present disclosure provides a cooling device, including a cooling plate and a mounting cover. A lower flow channel is provided in the cooling plate, a top of the cooling plate is provided with a water outlet and two openings. The water outlet is located between the two openings. The mounting cover is sealed on the top of the cooling plate. The mounting cover comprises a first mounting cover and a second mounting cover. The first mounting cover and the cooling plate form an intermediate flow channel, the second mounting cover and the cooling plate form a branch flow channel. The intermediate flow channel is in communication with the two branch flow channels, The first mounting cover is provided with a water inlet, and the two branch flow channels are in communication with the lower flow channel through the two openings.

Abstract: There is provided a charged particle apparatus comprising: a particle beam generator, optics, a first and a second positioning device, both configured for positioning the substrate relative to the particle beam generator along its optical axis, and a controller configured for switching between a first operational mode and a second operational mode. The apparatus is configured, when operating in the first operational mode, for irradiating the substrate by the particle beam at a first landing energy of the particle beam and, when operating in the second operational mode, for irradiating the substrate at a second, different landing energy. When operating in the first operational mode, the second positioning device is configured to position the substrate relative to the particle beam generator at a first focus position of the particle beam and in the second operational mode, to position the substrate at a second, different focus position.

Abstract: A power converter having a multi-slope compensation mechanism is provided. A multi-slope compensation circuit of the power converter includes a plurality of first capacitors, a comparator and a plurality of first resistors. A first terminal of each of the plurality of first capacitors and a node between a second terminal of a high-side switch and a first terminal of a low-side switch are connected to an inductor. A plurality of first input terminals of a comparator are respectively connected to second terminals of the plurality of first capacitors, and are respectively connected to first terminals of the plurality of first resistors. Second terminals of the plurality of first resistors are coupled to a second reference voltage. A second input terminal of the comparator is coupled to a first reference voltage. An output terminal of the comparator is connected to an input terminal of a driver circuit.

Abstract: An automatic fluid replacement device is adapted to be mounted on an opening of a storage barrel. The automatic fluid replacement device includes a robotic arm, at least one fluid convey joint and a controller. The robotic arm has a gripper. The fluid convey joint includes a convey pipe, a sleeve and a sealing bag. The convey pipe is configured to deliver a fluid. The sleeve is sleeved on the convey pipe. The gripper clamps the sleeve. The sealing bag is sleeved on the sleeve. The controller is configured for automatically controlling the robotic arm to move the fluid convey joint into the opening and controlling the sealing bag to be inflated to seal the opening.

Abstract: A chip packaging structure and a method for fabricating the same are provided. The chip package structure includes a conductive substrate, a dam and a metal shielding layer. The conductive substrate includes a substrate, vias and electrodes. The substrate has first and second board surfaces opposite to each other. The vias penetrate through the first board surface and the second board surface, and a part of the vias is disposed in a first die-bonding region on which a chip is to be arranged. The electrodes extend from the first board surface to the second board surface through the vias. The dam is formed on the first board surface to surround the first die-bonding region, and the dam has a height higher than that of the chip. The metal shielding layer covers the dam and a part of the first board surface that do not overlap with the electrodes.

Abstract: A method, system, and article provide image processing with power reduction while using universal serial bus cameras.

Abstract: A laser machining device includes a pulsed laser generator, an accommodation chamber, a bandwidth broadening unit and a pulse compression unit. The pulsed laser generator is configured to emit a pulsed laser. The accommodation chamber has a gas inlet. The bandwidth broadening unit is disposed in the accommodation chamber, and is configured to broaden a frequency bandwidth of the pulsed laser to obtain a broad bandwidth pulsed laser. The pulse compression unit is disposed in the accommodation chamber. The bandwidth broadening unit and the pulse compression unit are arranged in order along a laser propagation path, and the pulse compression unit is configured to compress a pulse duration of the broad bandwidth pulsed laser.

Abstract: A display device includes a patterned substrate, a plurality of light emitting unit, a first insulating layer and a sensing layer. The patterned substrate has a plurality of island structures and a plurality of bridge structures, and at least one bridge structure connects two adjacent island structures. At least one light emitting unit is disposed on one of the two adjacent island structures. The first insulating layer is disposed on the light emitting units. The sensing layer is disposed on the first insulating layer and has a mesh unit, the mesh unit has a mesh frame and an opening, and the at least one light emitting unit is disposed in the opening.

Abstract: An environment-friendly fire-retardant coating comprises a coating substrate and fire-extinguishing agent microcapsules which can be ruptured and vaporized to a release fire-extinguishing material to achieve the purposes of cooling and/or fire prevention and/or fire extinguishing upon being exposed to a temperature of not less than 75° C. and/or an open flame environment. In order to break the current situation that the traditional fire-prevention, fire-extinguishing and flame-retardant coatings can only prevent the spread of the fire area, but it is difficult to extinguish the fire sensitively and actively in a short time, there are provided a variety of coatings and/or films which can actively cool down, prevent fire and extinguish the fire, have short response time, have stable fire-extinguishing components in the coatings and/or films, with the films being able to trigger the fire extinguishment repeatedly.

Abstract: A method for forming a double-sided capacitor structure includes: providing a base, the base including a substrate, a plurality of capacitor contacts located in the substrate, a stack structure located on a surface of the substrate and a plurality of capacitor holes running through the stack structure and exposing the capacitor contacts, the stack structure including sacrificial layers and support layers which are stacked alternately; successively forming a first electrode layer, a first dielectric layer and a second electrode layer on inner walls of the capacitor holes; forming a first conductive filling layer in the capacitor holes; forming an auxiliary layer for sealing the capacitor holes; removing a part of the auxiliary layers and several of the support layers and the sacrificial layers to expose the first electrode layer; and, forming a second dielectric layer and a third electrode layer.

Abstract: A chip package structure and a package module thereof are provided. The package module includes an encapsulant and a recognition contrast layer. The encapsulant has a patterned trench that is recessed in a top surface thereof and that corresponds in shape to a predetermined two-dimensional (2D) code pattern. The recognition contrast layer is filled in the patterned trench. The recognition contrast layer and the top surface of the encapsulant respectively have different colors that conform to grade A or grade B in the ISO/IEC 15415 standard. The recognition contrast layer is coplanar with the top surface of the encapsulant so as to jointly form the predetermined 2D code pattern having a planar shape.

Abstract: A chip package structure and an electromagnetic interference (EMI) shielding package module thereof are provided. The EMI shielding package module includes an encapsulant, an EMI shielding layer, and a recognition contrast layer. The encapsulant has a patterned trench that is recessed in a top surface thereof. The EMI shielding layer includes a recognition region formed on the top surface and an embedded region that is filled in the patterned trench. The recognition contrast layer is filled in the patterned trench and is connected to the embedded region. The recognition contrast layer and the recognition region respectively have different colors that conform to grade A or grade B in ISO/IEC 15415 standard. An end portion of the recognition contrast layer protruding from the top surface is coplanar with the recognition region so as to jointly form a predetermined two-dimensional (2D) code pattern having a planar shape.