Patents by Inventor Hiroyuki Kanaya

Hiroyuki Kanaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146476
    Abstract: This wireless communication control device is a first wireless control device provided with: a control circuit that causes the waveform of a reference signal transmitted to a wireless communication device in coordination with a second wireless communication control device to differ, either in the frequency domain or the time domain, from the waveform of a reference signal transmitted to the wireless communication device by the second wireless communication control device; and a transmission circuit that transmits the reference signal.
    Type: Application
    Filed: September 4, 2020
    Publication date: May 2, 2024
    Inventors: Takayuki NAKANO, Hiroyuki KANAYA, Yoshio URABE, Ryutaro HASHI, Jun MINOTANI, Takashi IWAI, Tomofumi TAKATA
  • Publication number: 20240090344
    Abstract: A magnetic storage device includes first and second magnetic layers and a non-magnetic layer, where the non-magnetic layer includes a first oxide layer containing magnesium and oxygen, a second oxide layer containing magnesium and oxygen, a third oxide layer containing zinc and oxygen, a fourth oxide layer containing a first predetermined element and oxygen, and a fifth oxide layer containing a second predetermined element and oxygen, and a crystal structure of an oxide of the first predetermined element and a crystal structure of an oxide of the second predetermined element are each a rock salt structure. The first predetermined element and the second predetermined element each have an oxide formation free energy greater than an oxide formation free energy of zinc, and the oxide of the first predetermined element and the oxide of the second predetermined element each have a bandgap narrower than a bandgap of an oxide of magnesium.
    Type: Application
    Filed: March 3, 2023
    Publication date: March 14, 2024
    Inventors: Takeo KOIKE, Rina NOMOTO, Hiroyuki KANAYA, Masahiko NAKAYAMA, Daisuke WATANABE
  • Publication number: 20240074324
    Abstract: According to one embodiment, a magnetic device includes a layered body with a first magnetic layer, a second magnetic layer, and a first non-magnetic layer between the first magnetic body and the second magnetic body. A side wall layer covers at least a side wall of the first non-magnetic body of the layered body and includes at least one first substance chosen from silicon oxide, zirconium oxide, aluminum oxide, aluminum nitride, and silicon nitride, and at least one second substance chosen from arsenic, tellurium, antimony, bismuth, and germanium.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 29, 2024
    Inventors: Rina NOMOTO, Hiroyuki KANAYA, Yusuke MUTO, Takeshi IWASAKI
  • Patent number: 11895925
    Abstract: According to one embodiment, a magnetic memory device includes first and second wirings, and memory cells between the first and second wirings, and each including a switching element and a magnetoresistance effect element, the switching element being connected to a first wiring, and the magnetoresistance effect element being connected to a second wiring. The switching element includes a bottom electrode, a top electrode, and a switching material layer between the bottom and top electrodes, and the bottom electrode included in each of the memory cells adjacent to each other in a first direction is continuously provided on the first wiring connecting the memory cells adjacent to each other in the first direction.
    Type: Grant
    Filed: March 9, 2021
    Date of Patent: February 6, 2024
    Assignee: Kioxia Corporation
    Inventor: Hiroyuki Kanaya
  • Publication number: 20230422179
    Abstract: This terminal comprises: a control circuit that determines, on the basis of a plurality of signals received from a plurality of transmission sources that carry out uplink cooperative communication, the uplink transmission power; and a transmission circuit that carries out uplink transmission via the determined transmission power.
    Type: Application
    Filed: August 12, 2021
    Publication date: December 28, 2023
    Inventors: Hiroyuki KANAYA, Takashi IWAI, Tomofumi TAKATA, Yoshio URABE, Taichi MIURA
  • Publication number: 20230371026
    Abstract: This base station comprises: a control circuit that determines a format for a control signal on the basis of the type of cooperative communication; and a transmission circuit that transmits, according to the format, the control signal to another base station.
    Type: Application
    Filed: July 29, 2021
    Publication date: November 16, 2023
    Inventors: Takayuki NAKANO, Tomofumi TAKATA, Takashi IWAI, Hiroyuki KANAYA, Yoshio URABE
  • Publication number: 20230327717
    Abstract: The present invention improves the efficiency of transmissions in a multilink. A communication device according to the present invention comprises: a control circuit that controls multilink transmissions on the basis of control information related to the multilink transmissions; and a transmission circuit that performs the multilink transmissions in accordance with the control of the multilink transmissions.
    Type: Application
    Filed: June 22, 2021
    Publication date: October 12, 2023
    Inventors: Jun MINOTANI, Yoshio URABE, Takashi IWAI, Tomofumi TAKATA, Hiroyuki KANAYA
  • Publication number: 20230309428
    Abstract: A storage device includes a memory cell including a variable resistance element and a switching element having snapback current-voltage characteristics. The switching element includes a first conductive layer in contact with the variable resistance element, a second conductive layer, and a switching layer provided between the first conductive layer and the second conductive layer. The switching layer includes at least one switching member and a first insulating layer having a thermal conductivity higher than 1.4 W/m/K. A cross-sectional area of the switching member at a connection surface between the switching layer and the first conductive layer and a cross-sectional area of the switching member at a connection surface between the switching layer and the second conductive layer are each smaller than a cross-sectional area at a connection surface between the first conductive layer and the variable resistance element.
    Type: Application
    Filed: August 31, 2022
    Publication date: September 28, 2023
    Inventors: Kenji FUKUDA, Rina NOMOTO, Hiroyuki KANAYA, Masahiko NAKAYAMA, Hideyuki SUGIYAMA
  • Publication number: 20230276302
    Abstract: The present invention contributes to providing a wireless communication device and a wireless communication method with which it is possible to reduce the information amount of information transmitted and received between cooperating wireless communication devices. A first wireless communication device comprises a control unit that assigns an identifier to a second wireless communication device that is not included in a basic service set to which the first wireless communication device belongs, and a transmission unit that transmits a signal including the identifier.
    Type: Application
    Filed: July 15, 2021
    Publication date: August 31, 2023
    Inventors: Hiroyuki KANAYA, Yoshio URABE, Tomofumi TAKATA, Taichi MIURA
  • Publication number: 20230189661
    Abstract: A switching element includes a first conductive layer, a second conductive layer, and a switching material layer provided between the first conductive layer and the second conductive layer and formed of an insulating material containing an additional element. The switching material layer includes a first interface region including a first interface between the first conductive layer and the switching material layer and a second interface region including a second interface between the second conductive layer and the switching material layer. A concentration of the additional element in the switching material layer has a first peak in the first interface region.
    Type: Application
    Filed: August 30, 2022
    Publication date: June 15, 2023
    Inventors: Shogo ITAI, Kazuya MATSUZAWA, Masahiko NAKAYAMA, Hiroyuki KANAYA, Hideyuki SUGIYAMA
  • Publication number: 20230139852
    Abstract: The present invention provides a transmission device and transmission method that are capable of improving reception quality during cooperative communication. A first transmission device according to the present invention comprises: a control circuit which, if the first transmission device and a second transmission device are carrying out transmission in cooperation, generates first control information that includes information common to at least a portion of second control information transmitted by the second transmission device in a second preamble; and a transmission circuit which transmits the first control information in a first preamble.
    Type: Application
    Filed: February 25, 2021
    Publication date: May 4, 2023
    Inventors: Hiroyuki KANAYA, Takashi IWAI, Yoshio URABE, Tomofumi TAKATA, Takayuki NAKANO, Jun MINOTANI, Lei HUANG
  • Publication number: 20230079445
    Abstract: According to one embodiment, a memory device includes a first memory cell, a second memory cell adjacent to the first memory cell in a first direction, and a third memory cell adjacent to the first memory cell in a second direction, each of the first, second, and third memory cells including a resistance change memory element and a switching element. The switching element includes first and second electrodes, and a switching material layer between the first and second electrodes, the first and second electrodes overlap each other when viewed from the first direction, the first electrodes in the first and second memory cells are apart from each other, and the switching material layers in the first and second memory cells are continuously provided.
    Type: Application
    Filed: March 11, 2022
    Publication date: March 16, 2023
    Applicant: Kioxia Corporation
    Inventors: Kenji FUKUDA, Hideyuki SUGIYAMA, Masahiko NAKAYAMA, Hiroyuki KANAYA, Soichi OIKAWA
  • Publication number: 20220352930
    Abstract: The present invention appropriately controls settings of feedbacks to a plurality of transmission sources. This wireless communication device comprises: a reception circuit for receiving a plurality of wireless signals transmitted by a plurality of transmission sources; and a control circuit for controlling settings of feedbacks with respect to the plurality of radio signals, depending on differences in reception quality of the plurality of wireless signals.
    Type: Application
    Filed: August 13, 2020
    Publication date: November 3, 2022
    Inventors: Hiroyuki KANAYA, Yoshio URABE, Jun MINOTANI, Tomofumi TAKATA, Takashi IWAI, Takayuki NAKANO
  • Patent number: 11482572
    Abstract: A semiconductor memory device has a first wiring extending in a first direction and a second wiring extending in a second direction. The first and second wirings are spaced from each other in a third direction. The second wiring has a first recess facing the first wiring. A resistance change memory element is connected between the first and second wirings. A conductive layer is between the resistance change memory element and the second wiring and includes a first protrusion facing the second wiring. A switching portion is between the conductive layer and the second wiring and includes a second recess facing the conductive layer and a second protrusion facing the second wiring. The first protrusion is in the second recess. The second protrusion is in the first recess. The switching portion is configured to switch conductivity state according to voltage between the first wiring and the second wiring.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: October 25, 2022
    Assignee: KIOXIA CORPORATION
    Inventor: Hiroyuki Kanaya
  • Publication number: 20220303030
    Abstract: This communication device comprises: a control circuit that, on the basis of first information relating to the reception quality of a plurality of spatial streams, determines a spatial stream for feeding back second information; and a transmission circuit that transmits the second information relating to the determined spatial stream.
    Type: Application
    Filed: July 17, 2020
    Publication date: September 22, 2022
    Inventors: Jun MINOTANI, Yoshio URABE, Takashi IWAI, Tomofumi TAKATA, Hiroyuki KANAYA, Ryutaro HASHI
  • Publication number: 20220085281
    Abstract: According to one embodiment, a magnetic memory device includes first and second wirings, and memory cells between the first and second wirings, and each including a switching element and a magnetoresistance effect element, the switching element being connected to a first wiring, and the magnetoresistance effect element being connected to a second wiring. The switching element includes a bottom electrode, a top electrode, and a switching material layer between the bottom and top electrodes, and the bottom electrode included in each of the memory cells adjacent to each other in a first direction is continuously provided on the first wiring connecting the memory cells adjacent to each ether in the first direction.
    Type: Application
    Filed: March 9, 2021
    Publication date: March 17, 2022
    Applicant: Kioxia Corporation
    Inventor: Hiroyuki KANAYA
  • Publication number: 20210257413
    Abstract: A semiconductor memory device has a first wiring extending in a first direction and a second wiring extending in a second direction. The first and second wirings are spaced from each other in a third direction. The second wiring has a first recess facing the first wiring. A resistance change memory element is connected between the first and second wirings. A conductive layer is between the resistance change memory element and the second wiring and includes a first protrusion facing the second wiring, A switching portion is between the conductive layer and the second wiring and includes a second recess facing the conductive layer and a second protrusion facing the second wiring. The first protrusion is in the second recess. The second protrusion is in the first recess. The switching portion is configured to switch conductivity state according to voltage between the first wiring and the second wiring.
    Type: Application
    Filed: August 26, 2020
    Publication date: August 19, 2021
    Inventor: Hiroyuki KANAYA
  • Publication number: 20200083288
    Abstract: According to one embodiment, a magnetic memory includes: a semiconductor substrate; a switching element above the semiconductor substrate, the switching element provided between a first terminal and a second terminal; a first contact portion coupled to the first terminal and provided in a first insulator layer on the semiconductor substrate; a second contact portion including copper and provided in a second insulator layer on the first insulator layer; a conductive layer provided on the second contact portion; and a magnetoresistive effect element provided on the conductive layer.
    Type: Application
    Filed: March 11, 2019
    Publication date: March 12, 2020
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Hiroyuki KANAYA
  • Publication number: 20190288183
    Abstract: According to one embodiment, a magnetic device includes: a first electrode above a substrate, the first electrode including a first portion and a second portion adjacent to the first portion in a direction parallel to a surface of the substrate; a second electrode above the first electrode; a first magnetic layer between the first electrode and the second electrode; a second magnetic layer between the first magnetic layer and the second electrode; and a non-magnetic layer between the first magnetic layer and the second magnetic layer, wherein an upper face of the first portion is located closer to the substrate than an upper face of the second portion.
    Type: Application
    Filed: September 6, 2018
    Publication date: September 19, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventor: Hiroyuki KANAYA
  • Patent number: 10115891
    Abstract: According to one embodiment, a magnetoresistive memory device includes bottom electrodes provided on a substrate, a magnetoresistive element provided on each of the bottom electrodes, a top electrode provided on each of the magnetoresistive elements, an insulating film provided on sides of the bottom electrode, the magnetoresistive element and, the top electrode, and a magnetic layer provided on the top electrode, the magnetic layer extending on the insulating film to connect a plurality of those of the top electrodes.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: October 30, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Hiroyuki Kanaya