Patents by Inventor Hsin-An Hsu

Hsin-An Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230197647
    Abstract: Provided is an integrated antenna package structure including a chip, a circuit structure, a shielding body, an encapsulant, a first antenna layer, a dielectric body, and a second antenna layer. The circuit structure is electrically connected to the chip. The shielding body is disposed on the circuit structure and has an accommodating space. The chip is disposed in the accommodating space of the shielding body. The encapsulant is disposed on the circuit structure and covers the chip. The first antenna layer is disposed on the circuit structure and is electrically connected to the circuit structure. The dielectric body is disposed on the encapsulant. The second antenna layer is disposed on the dielectric body. A manufacturing method of the integrated antenna package structure is also provided.
    Type: Application
    Filed: November 30, 2022
    Publication date: June 22, 2023
    Applicant: Powertech Technology Inc.
    Inventors: Shang-Yu Chang Chien, Nan-Chun Lin, Hung-Hsin Hsu
  • Patent number: 11670611
    Abstract: A semiconductor package comprising plurality of bumps and fabricating method thereof. The package has a chip, a plurality of first and second bumps, an encapsulation, a redistribution. The chip has a plurality of pads and an active area and the active surface has a first area and a second area surrounding the first, the pads formed on a first area of the active surface, each first bump formed on the corresponding pad. The second bumps are formed on the second area, each second bump has first and second different width layers. The encapsulation encapsulates the chip and bumps and is ground to expose the bumps therefrom. During grinding, all of the first bumps are completely exposed by determining a width of an exposed surface of the second bump to electrically connect to the redistribution is increased. Therefore, a shallow-grinding or over-grinding does not occur.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: June 6, 2023
    Assignee: Powertech Technology Inc.
    Inventors: Shang-Yu Chang-Chien, Hung-Hsin Hsu, Nan-Chun Lin
  • Publication number: 20230168437
    Abstract: An optical fiber adapter includes a housing, a positioning member disposed in the housing, and a clip member removably disposed in the housing. The housing includes two outer walls each formed with slots, two side walls each connected between the outer walls, and latches extending from a corresponding one of the outer walls into a corresponding one of the slots. The clip member includes a base portion, two connection portions disposed on two opposite ends of the base portion, and two pairs of clip arm portions extending from the connection portions. Each connection portion has an engaging groove engaged with a respective one of the latches.
    Type: Application
    Filed: July 13, 2022
    Publication date: June 1, 2023
    Inventor: Hsien-Hsin HSU
  • Publication number: 20230139646
    Abstract: The fiber optic connector includes a connector head module, a mounting seat, a rear boot, an engaging module and a sheath member. The mounting seat is mounted to a rear end of the connector head module, and includes an external threaded portion. The rear boot is connected to a rear end of the mounting seat. The engaging module is removably coupled to the connector head module. The sheath member includes an internal threaded portion that is formed in an inner surface of the sheath member. When the engaging module is removed from the connector head module, the sheath member can be attachable to the mounting seat with the external threaded portion being threadedly engaged with the external threaded portion of the mounting seat.
    Type: Application
    Filed: April 20, 2022
    Publication date: May 4, 2023
    Inventors: Hsien-Hsin Hsu, Yen-Chang Lee, Ke Xue Ning
  • Patent number: 11637071
    Abstract: A package structure, including a conductive element, multiple dies, a dielectric body, a circuit layer and a patterned insulating layer, is provided. The multiple dies are disposed on the conductive element. A portion of the conductive element surrounds the multiple dies. The dielectric body covers the multiple dies. The circuit layer is disposed on the dielectric body. The circuit layer is electrically connected to the multiple dies. The patterned insulating layer covers the circuit layer. A portion of the patterned insulating layer is disposed between the dies that are adjacent. A manufacturing method of a package structure is also provided.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: April 25, 2023
    Assignee: Powertech Technology Inc.
    Inventors: Shang-Yu Chang Chien, Nan-Chun Lin, Hung-Hsin Hsu
  • Publication number: 20230110079
    Abstract: A fan-out package structure and a manufacturing method thereof are provided. The fan-out package structure includes an upper redistribution layer, a die, a passive element, and an active element. The upper redistribution layer includes a first surface and a second surface opposite to the first surface. The die is disposed on the first surface of the upper redistribution layer and is electrically connected to the upper redistribution layer. The passive element is disposed on the second surface of the upper redistribution layer and is electrically connected to the upper redistribution layer. The active element is disposed on the second surface of the upper redistribution layer and is electrically connected to the upper redistribution layer. The active element is laterally adjacent to the passive element, and the die is electrically connected to the active element and the passive element through the upper redistribution layer.
    Type: Application
    Filed: August 20, 2022
    Publication date: April 13, 2023
    Applicant: POWERTECH TECHNOLOGY INC.
    Inventors: Pei-chun Tsai, Hung-hsin Hsu, Ching-wei Liao, Shang-yu Chang Chien
  • Patent number: 11617993
    Abstract: A material mixing and supplying system is provided. The material mixing and supplying system includes a feeding module, at least three mixing and supplying barrels, a supply module, and a control unit, wherein the three mixing and supplying barrels are capable of mixing and supplying the mixed material. The supplying time of the mixed material is greater than a sum of the feeding time and the mixing time. A total operation number of the at least three mixing and supplying barrels is determined by a set amount of mixed material to be supplied by the material mixing and supplying system, and a total time to finish supplying the set amount of mixed material is determined by the total operation number.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: April 4, 2023
    Assignee: ASIA IC MIC-PROCESS, INC.
    Inventors: Hung-Hsin Hsu, Yan-Lan Chiou
  • Publication number: 20230078993
    Abstract: A semiconductor device includes a substrate and a gate structure. The gate structure is disposed on the substrate, and the gate structure includes a titanium nitride barrier layer a titanium aluminide layer, and a middle layer. The titanium aluminide layer is disposed on the titanium nitride barrier layer, and the middle layer is disposed between the titanium aluminide layer and the titanium nitride barrier layer. The middle layer is directly connected with the titanium aluminide layer and the titanium nitride barrier layer, and the middle layer includes titanium and nitrogen. A concentration of nitrogen in the middle layer is gradually decreased in a vertical direction towards an interface between the middle layer and the titanium aluminide layer.
    Type: Application
    Filed: November 18, 2022
    Publication date: March 16, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Hsin Hsu, Huan-Chi Ma, Chien-Wen Yu, Shih-Min Chou, Nien-Ting Ho, Ti-Bin Chen
  • Publication number: 20230072103
    Abstract: An optical fingerprint sensor with spoof detection includes a plurality of lenses, an image sensor including a pixel array that includes a plurality of first photodiodes and a plurality of second photodiodes, and at least one apertured baffle-layer having a plurality of aperture stops, wherein each second photodiode is configured to detect light having passed through a lens and at least one aperture stop not aligned with the lens along an optical axis. A method for detecting spoof fingerprints detected using an optical fingerprint sensor includes detecting large-angle light incident on a plurality of anti-spoof photodiodes, wherein the plurality of anti-spoof photodiodes is interleaved with a plurality of imaging photodiodes, determining an angular distribution of light based at least in part one the large-angle light, and detecting spoof fingerprints based at least in part on the angular distribution of light.
    Type: Application
    Filed: September 8, 2021
    Publication date: March 9, 2023
    Inventors: Paul Wickboldt, Jau-Jan Deng, Shih-Hsin HSU
  • Publication number: 20230064584
    Abstract: An optical fiber distribution frame includes a casing and a plurality of tray units disposed in the casing. Each tray unit includes a partition plate, a plurality of inner guiding rails disposed on the partition plate, a plurality of mounting seats each removably disposed between adjacent two of the inner guiding rails, and a plurality of cable management members disposed respectively in front of the inner guiding rails and each including a lower clamp portion fixed to the partition plate, and an upper clamp portion cooperating with the lower clamp portion to define a cable accommodating space, having one end that cooperates with one end of the lower clamp portion to define an open slot in spatial communication with the cable accommodating space, and operable to adjust a dimension of the open slot to allow or prevent removal of optical fibers from the cable accommodating space.
    Type: Application
    Filed: June 14, 2022
    Publication date: March 2, 2023
    Inventor: Hsien-Hsin HSU
  • Publication number: 20230068980
    Abstract: A fiber optic distribution frame includes a casing and a plurality of tray units disposed in the casing. Each tray unit includes a partition plate, a plurality of inner guiding rails disposed on the partition plate, and a plurality of mounting seats each disposed between adjacent two of the inner guiding rails and movable forwardly and rearwardly to be removed from the adjacent two of the inner guiding rails.
    Type: Application
    Filed: June 14, 2022
    Publication date: March 2, 2023
    Inventor: Hsien-Hsin HSU
  • Patent number: 11573886
    Abstract: A device for building a test file comprises a receiving module, for receiving a first request of a first user and for analyzing the first request, and for notifying an analysis result of the first request to the first user; a building module, coupled to the receiving module, for building the test file according to the first request of a task queue; and a transmitting module, coupled to the building module, for notifying a building result of the test file to the first user.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: February 7, 2023
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Che-Sheng Cheng, Yen-Chen Chuang, Kuo-Hsin Hsu
  • Patent number: 11569210
    Abstract: A package structure, including a redistribution circuit layer, a first die, a dielectric body, a first connection circuit, a patterned insulating layer, a second die and a third die, is provided. The first die is disposed on the redistribution circuit layer and is electrically connected to the redistribution circuit layer. The dielectric body is disposed on the redistribution circuit layer and covers the first die. The first connection circuit is disposed on the dielectric body and is electrically connected to the redistribution circuit layer. The patterned insulating layer covers the first connection circuit. A portion of the patterned insulating layer is embedded in the dielectric body. The second die is disposed on the dielectric body and is electrically connected to the first connection circuit. The third die is disposed on the redistribution circuit layer, is opposite to the first die, and is electrically connected to the redistribution circuit layer.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: January 31, 2023
    Assignee: Powertech Technology Inc.
    Inventors: Shang-Yu Chang Chien, Nan-Chun Lin, Hung-Hsin Hsu
  • Patent number: 11557533
    Abstract: A package structure including a redistribution circuit structure, a first chip, a second chip, a first circuit board, a second circuit board, and a plurality of conductive terminals is provided. The redistribution circuit structure has a first connection surface and a second connection surface opposite to the first connection surface. The first chip and the second chip are disposed on the first connection surface and are electrically connected to the redistribution circuit structure. The first circuit board and the second circuit board are disposed on the second connection surface and are electrically connected to the redistribution circuit structure. The conductive terminals are disposed on the first circuit board or the second circuit board. The conductive terminals are electrically connected to the first circuit board or the second circuit board. A manufacturing method of a package structure is also provided.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: January 17, 2023
    Assignee: Powertech Technology Inc.
    Inventors: Hung-Hsin Hsu, Nan-Chun Lin
  • Patent number: 11551955
    Abstract: A substrate processing apparatus includes a process station for processing a substrate; a cassette station integrated with the process station; a substrate carriage equipped for transferring the substrate between said process station and the cassette station through a passage located at an interface between the process station and said cassette station; and a substrate scanner equipped at said interface between the process station and the cassette station for capturing surface image data during transportation of the substrate that passes through the passage.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: January 10, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Che Lai, Hua-Wei Peng, Chia-He Cheng, Ming-Tso Chen, Chao-Chi Lu, Hsin-Hsu Lin, Kuo-Tsai Lo, Kao-Hua Wu, Huan-Hsin Yeh
  • Publication number: 20230003946
    Abstract: A fiber optic connector includes a ferrule, an insert body, a tail sleeve and two core heads. The ferrule includes an outer frame, and an operating handle extending rearwardly from the outer frame. The outer frame is formed with an inserted opening open along a front-rear direction and two limiting slots open along a left-right direction and spaced apart from each other along the left-right direction. The insert body is detachably inserted into the ferrule and includes two protrusion units protruding away from each other along the left-right direction and respectively movable in the limiting slots.
    Type: Application
    Filed: March 4, 2022
    Publication date: January 5, 2023
    Inventor: Hsien-Hsin HSU
  • Publication number: 20230003945
    Abstract: A fiber optic adaptor includes a main shell body and an outer cover. The main shell body has a first end portion and a second end portion. The first end portion defines a first opening and is formed with two engaging grooves. The outer cover is removably disposed on and covering the first end portion, and has a cover body portion, two locking clips, and an identifier portion. The two locking clips protrudes from the cover and respectively engage the engaging grooves. The identifier portion is disposed on the cover body portion. The locking clips are operable to be removed respectively from the engaging grooves. The cover body portion defines a port outer opening, and a port key portion.
    Type: Application
    Filed: February 23, 2022
    Publication date: January 5, 2023
    Inventors: Yen-Chang LEE, Hsien-Hsin HSU, Jim LIN, Ke Xue NING
  • Patent number: 11543598
    Abstract: An optical fiber connector includes a casing body formed with upper and lower key slots, a polarity adjusting key detachably mounted in a selected one of the key slots and engaging an adaptor, head and tail sleeves disposed respectively on front and rear ends of the casing body, and two core heads disposed between the head sleeve and the casing body. To adjust the polarity of the optical fiber connector, the optical fiber connector is detached from the adaptor and the optical fiber connector is inverted. Then, the polarity adjusting key is operated to disengage from the selected one of the key slots and engage the other one of the key slots to adjust the polarity without removal of head and tail sleeves.
    Type: Grant
    Filed: September 17, 2021
    Date of Patent: January 3, 2023
    Assignee: Gloriole Electroptic Technology Corp.
    Inventor: Hsien-Hsin Hsu
  • Patent number: 11545423
    Abstract: The disclosure provides a package structure including a redistribution circuit structure, a first circuit board, a second circuit board, a first insulator, multiple conductive terminals, and a package. The redistribution circuit structure has a first connection surface and a second connection surface opposite to each other. The first circuit board and the second circuit board are disposed on the first connection surface and are connected electrically to the redistribution circuit structure. The first insulator is disposed on the first connection surface and covers the first circuit board and the second circuit board. The conductive terminals are connected electrically to and disposed on the first circuit board or the second circuit board. The package is disposed on the second connection surface and is connected electrically to the redistribution circuit structure. A manufacturing method of a package structure is also provided.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: January 3, 2023
    Assignee: Powertech Technology Inc.
    Inventors: Shang-Yu Chang Chien, Nan-Chun Lin, Hung-Hsin Hsu
  • Patent number: 11545424
    Abstract: A package structure including a redistribution circuit structure, an insulator, a plurality of conductive connection pieces, a first chip, a second chip, an encapsulant, a third chip, and a plurality of conductive terminals is provided. The redistribution circuit structure has first and second connection surfaces opposite to each other. The insulator is embedded in and penetrates the redistribution circuit structure. The conductive connection pieces penetrate the insulator. The first and second chips are disposed on the first connection surface. The encapsulant is disposed on the redistribution circuit structure and at least laterally covers the first and second chips. The third chip is disposed on the second connection surface and electrically connected to the first and second chips through the conductive connection pieces. The conductive terminals are disposed on the second connection surface and electrically connected to the first chip or the second chip through the redistribution circuit structure.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: January 3, 2023
    Assignee: Powertech Technology Inc.
    Inventors: Shang-Yu Chang Chien, Nan-Chun Lin, Hung-Hsin Hsu