Patents by Inventor Junichi Koike

Junichi Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180291483
    Abstract: An object of the present invention is to provide a Mg alloy that exhibits a superelastic effect and a shape memory effect, and is excellent in cold workability. The Mg alloy is prepared so as to have a composition in which Sc is contained in a content of more than 13 at % and 30 at % or less, and the balance is Mg and inevitable impurities. In addition, the alloy may contain, in addition to the above-described composition, at least one or more additive elements selected from Li, Al, Zn, Y, Ag, In, Sn and Bi, in a total content of 0.001 at % or more and 9 at % or less in relation to the amount of the whole alloy defined to be 100 at %.
    Type: Application
    Filed: October 13, 2016
    Publication date: October 11, 2018
    Inventors: Daisuke Ando, Yuji Suto, Yukiko Ogawa, Junichi Koike
  • Publication number: 20180198017
    Abstract: Provided are a solar cell having a good conversion efficiency in which damage to a p-n junction structure is prevented when an antireflection film is removed, and a method of manufacturing such a solar cell.
    Type: Application
    Filed: August 30, 2017
    Publication date: July 12, 2018
    Inventors: Junichi KOIKE, Masaaki SAIGA, Yuji SUTOU
  • Patent number: 9941420
    Abstract: This conductive paste is such that the printing properties and sintering properties are superior and is formed such that resistance of wiring after sintering is lowered. This conductive paste is characterized by being formed from copper-based metal particles and by an aspect ratio (dmax/dmin), which is defined as the ratio of the maximum diameter (dmax) and minimum diameter (dmin) for the metal particles, being greater than or equal to 1.0 and smaller than 2.2.
    Type: Grant
    Filed: May 8, 2013
    Date of Patent: April 10, 2018
    Assignee: MATERIAL CONCEPT, INC.
    Inventors: Junichi Koike, Hoang Tri Hai
  • Publication number: 20180097128
    Abstract: Provided is a solar cell device wherein: a Cu-containing metal layer exhibits good adhesion strength with respect to an Si substrate and a tab wire; and diffusion of Cu into the substrate and an Ag finger wiring line is suppressed. Provided is a solar cell device which comprises a silicon semiconductor substrate, a Cu-containing metal layer, an Ag-containing finger wiring line, and an interface layer containing an oxide or an organic compound. The Ag-containing finger wiring line is formed on the light receiving surface of the silicon semiconductor substrate; the interface layer is formed on the light receiving surface of the silicon semiconductor substrate; and the Cu-containing metal layer is formed on the interface layer and is arranged at a distance from the Ag-containing finger wiring line.
    Type: Application
    Filed: March 7, 2016
    Publication date: April 5, 2018
    Applicant: Material Concept, Inc.
    Inventors: Junichi KOIKE, Makoto WADA, Yuji SUTOU, Daisuke ANDO
  • Publication number: 20180013024
    Abstract: A solar cell module capable of preventing the occurrence of a PID failure in a solar photovoltaic power generation system with a MW capacity, said system being used in a high-temperature high-humidity environment; and a method for manufacturing this solar cell module. A solar cell module which comprises a protection glass material and a sealing material on a light receiving surface side of a substrate, and which also comprises an oxide layer between the substrate and the protection glass material, said oxide layer containing a metal element and silicon. It is preferable that the oxide layer contains at least one metal element selected from the group consisting of magnesium, aluminum, titanium, vanadium, chromium, manganese, zirconium, niobium and molybdenum. It is also preferable that the oxide layer has a refractive index of from 1.5 to 2.3 (inclusive) with respect to incident light having a wavelength of 587 nm.
    Type: Application
    Filed: December 17, 2015
    Publication date: January 11, 2018
    Inventors: Junichi KOIKE, Yuji SUTOU, Daisuke ANDO, Makoto WADA
  • Patent number: 9795032
    Abstract: To provide: an electronic component which comprises a copper electrode on an inorganic material substrate and wherein the adhesion strength between the substrate and the copper electrode is high, thereby achieving improved adhesion of the copper electrode; and a method for manufacturing this electronic component. An electronic component which comprises a copper electrode on an inorganic material substrate and wherein an interface layer containing copper, manganese, silicon and oxygen is provided at the interface between the substrate and the copper electrode, and the interface layer contains crystal grains that are mainly formed of copper and dispersed in the interface layer. A method for manufacturing this electronic component comprises: an interface layer formation step for forming an interface layer on the substrate; and an electrode formation step for forming the copper electrode on the interface layer.
    Type: Grant
    Filed: July 10, 2015
    Date of Patent: October 17, 2017
    Assignee: MATERIAL CONCEPT, INC.
    Inventors: Junichi Koike, Daisuke Ando, Yuji Sutou
  • Publication number: 20170181279
    Abstract: To provide: an electronic component which comprises a copper electrode on an inorganic material substrate and wherein the adhesion strength between the substrate and the copper electrode is high, thereby achieving improved adhesion of the copper electrode; and a method for manufacturing this electronic component. An electronic component which comprises a copper electrode on an inorganic material substrate and wherein an interface layer containing copper, manganese, silicon and oxygen is provided at the interface between the substrate and the copper electrode, and the interface layer contains crystal grains that are mainly formed of copper and dispersed in the interface layer. A method for manufacturing this electronic component comprises: an interface layer formation step for forming an interface layer on the substrate; and an electrode formation step for forming the copper electrode on the interface layer.
    Type: Application
    Filed: July 10, 2015
    Publication date: June 22, 2017
    Inventors: Junichi KOIKE, Daisuke ANDO, Yuji SUTOU
  • Publication number: 20170135221
    Abstract: To provide a method for firing a copper paste, which improves sinterability of copper particles for the purpose of forming a copper wiring line that is decreased in the electrical conductivity. A method for firing a copper paste, which comprises: an application step wherein a copper paste is applied over a substrate; a first heating step wherein the substrate is heated in a nitrogen gas atmosphere containing from 500 ppm to 2,000 ppm (inclusive) of an oxidizing gas in terms of volume ratio after the application step, thereby oxidizing and sintering copper particles in the copper paste; and a second heating step wherein the substrate is heated in a nitrogen gas atmosphere containing 1% or more of a reducing gas in terms of volume ratio after the first heating step, thereby reducing the oxidized and sintered copper oxide.
    Type: Application
    Filed: June 2, 2015
    Publication date: May 11, 2017
    Inventors: Junichi KOIKE, Yuji SUTOU, Daisuke ANDO
  • Publication number: 20170037502
    Abstract: Provided are: a hard lubricating coating film which is hard and has wear resistance; and a hard lubricating coating film-covered tool. A hard coating film (10), which is hard and has wear resistance, and an end mill (12) can be obtained by alternately forming two or more (CraMobWcVdBe)1-x-yCxNy layers A (22) and two or more (CraMobWcVdBe)1-x-y-zCxNyOz layers B (24) by controlling the composition ratios of Cr, Mo, W, V and B and various reaction gases during the film formation, or alternatively by controlling only the various reaction gases during the film formation.
    Type: Application
    Filed: November 26, 2013
    Publication date: February 9, 2017
    Applicants: OSG CORPORATION, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Mei WANG, Masatoshi SAKURAI, Yuji SUTOU, Junichi KOIKE
  • Patent number: 9551062
    Abstract: A tool hard film that is to be disposed as coating on a surface of a tool, the tool hard film being a TiCrMoWV oxycarbide, oxynitride, or oxycarbonitride having a phase with a NaCl-type crystal structure as a main phase, the oxycarbide, oxynitride, or oxycarbonitride having fine crystals due to introduction of oxygen.
    Type: Grant
    Filed: March 28, 2013
    Date of Patent: January 24, 2017
    Assignees: OSG CORPORATION, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Masatoshi Sakurai, Mei Wang, Toshihiro Ohchi, Yuji Sutou, Junichi Koike, Shoko Komiyama
  • Publication number: 20160329444
    Abstract: The present invention is provided with an interface layer that minimizes interdiffusion between a silicon substrate and copper electrode wiring that are used as a solar cell, that improves the adhesive properties of copper wiring, and that is used to obtain ohmic contact characteristics. This silicon solar cell comprises a silicon substrate and is provided with a metal oxide layer that is formed on the silicon substrate and wiring that is formed on the metal oxide layer and that comprises mainly copper. The metal oxide layer contains (a) one of either titanium or manganese, (b) one of vanadium, niobium, tantalum, or silicon, and (c) at least one of copper and nickel. In addition, the metal oxide layer comprises copper or nickel as metal particles that are diffused in the interior of the metal oxide layer.
    Type: Application
    Filed: December 22, 2014
    Publication date: November 10, 2016
    Inventors: Junichi KOIKE, Yuji SUTOU, Daisuke ANDO, Tri Hai HOANG
  • Patent number: 9256110
    Abstract: In a liquid crystal display (LCD) device having a thin film transistor (TFT), the TFT includes a source electrode, a drain electrode and a semiconductor layer. At least one of the source electrode and drain electrode includes a first layer including copper and a second layer forming an oxide layer and covering the first layer. The semiconductor layer has a substantially linear current-voltage relationship with said source electrode or drain electrode including said first and second layers, when a voltage is applied between the semiconductor layer and said source electrode or drain electrode.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: February 9, 2016
    Assignee: Xenogenic Development Limited Liability Company
    Inventors: Junichi Koike, Hideaki Kawakami
  • Publication number: 20160017478
    Abstract: A tool hard film that is to be disposed as coating on a surface of a tool, the tool hard film being a TiCrMoWV oxycarbide, oxynitride, or oxycarbonitride having a phase with a NaCl-type crystal structure as a main phase, the oxycarbide, oxynitride, or oxycarbonitride having fine crystals due to introduction of oxygen.
    Type: Application
    Filed: March 28, 2013
    Publication date: January 21, 2016
    Applicants: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY, OSG CORPORATION
    Inventors: Masatoshi SAKURAI, Mei WANG, Toshihiro OHCHI, Yuji SUTOU, Junichi KOIKE, Shoko KOMIYAMA
  • Patent number: 9222198
    Abstract: A SiC single crystal wafer on which a good quality epitaxial film by suppressing defects derived from the wafer can be grown has an affected surface layer with a thickness of at most 50 nm and a SiC single crystal portion with an oxygen content of at most 1.0×1017 atoms/cm3. This SiC single crystal wafer is manufactured from a high purity SiC bulk single crystal obtained by the solution growth method using raw materials with an oxygen content of at most 100 ppm and a non-oxidizing atmosphere having an oxygen concentration of at most 100 ppm.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: December 29, 2015
    Assignee: NIPPON STEEL & SUMITOMO METAL CORPORATION
    Inventors: Kazuhiko Kusunoki, Kazuhito Kamei, Nobuyoshi Yashiro, Junichi Koike
  • Patent number: 9123821
    Abstract: To make it possible to form a metal electrode of low electrical contact resistance on a conductive indium-containing oxide semiconductor layer constituting a device active layer of a thin-film transistor or the like. Between an indium-containing oxide semiconductor layer and a metal electrode layer provided above this layer for passing device operating current, which can reduce indium oxide or the like of the oxide semiconductor layer. A metallic oxide layer and a metal layer are formed using as material a metal film including an easily oxidable metal, and further an indium-rich layer in which reduced indium is accumulated is formed at a boundary between the metallic oxide layer and the metal layer.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: September 1, 2015
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Mayumi Naito, Pilsang Yun, Hideaki Kawakami
  • Patent number: 9082821
    Abstract: A method for forming a copper interconnection structure includes the steps of forming an opening in an insulating layer, forming a copper alloy layer including a metal element on an inner surface of the opening, and conducting a heat treatment on the copper alloy layer so as to form a barrier layer. An enthalpy of oxide formation for the metal element is lower than the enthalpy of oxide formation for copper. The heat treatment is conducted at temperatures ranging from 327° C. to 427° C. and for a time period ranging from 1 minute to 80 minutes.
    Type: Grant
    Filed: October 3, 2011
    Date of Patent: July 14, 2015
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20150136219
    Abstract: This conductive paste is such that the printing properties and sintering properties are superior and is formed such that resistance of wiring after sintering is lowered. This conductive paste is characterized by being formed from copper-based metal particles and by an aspect ratio (dmax/dmin), which is defined as the ratio of the maximum diameter (dmax) and minimum diameter (dmin) for the metal particles, being greater than or equal to 1.0 and smaller than 2.2.
    Type: Application
    Filed: May 8, 2013
    Publication date: May 21, 2015
    Inventors: Junichi Koike, Hoang Tri Hai
  • Patent number: 8895978
    Abstract: An ohmic contact between an electrode and a semiconductor layer is more stably formed and an electrical contact resistance between them is further reduced. A semiconductor device comprises a semiconductor layer 103 composed of an oxide semiconductor material containing indium, an ohmic electrode 107 provided on the semiconductor layer 103 and having an ohmic contact with the semiconductor layer 103, and an intermediate layer 106 provided between the semiconductor layer 103 and the ohmic electrode 107, wherein the intermediate layer 106 includes a first region 106a whose indium atomic concentration is greater than that of an interior of the semiconductor layer 103 and a second region 106b whose indium atomic concentration is less than that of the first region.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: November 25, 2014
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Pilsang Yun, Hideaki Kawakami
  • Patent number: 8865590
    Abstract: A film forming method is disclosed in which a thin film comprising manganese is formed on an object to be processed which has, on a surface thereof, an insulating layer constituted of a low-k film and having a recess. The method comprises a hydrophilization step in which the surface of the insulating layer is hydrophilized to make the surface hydrophilic and a thin-film formation step in which a thin film containing manganese is formed on the surface of the hydrophilized insulating layer by performing a film forming process using a manganese-containing material gas on the surface of the hydrophilized insulating layer. Thus, a thin film comprising manganese, e.g., an MnOx film, is effectively formed on the surface of the insulating layer constituted of a low-k film, which has a low dielectric constant.
    Type: Grant
    Filed: June 16, 2010
    Date of Patent: October 21, 2014
    Assignees: Tokyo Electron Limited, National University Corporation Tohoku University
    Inventors: Kenji Matsumoto, Hitoshi Itoh, Hidenori Miyoshi, Shigetoshi Hosaka, Hiroshi Sato, Koji Neishi, Junichi Koike
  • Patent number: 8866140
    Abstract: Making it possible to improve adhesion between the semiconductor layer and the electrodes, realize high-speed operation of the thin-film transistor by enhancing ohmic contact between these members, reliably prevent oxidation of the electrode surfaces, and realize an electrode fabrication process with few processing steps. The thin-film transistor 10 of the present invention includes a semiconductor layer 4 composed of oxide semiconductor, a source electrode 5 and a drain electrode 6 that are layers composed mainly of copper, and oxide reaction layers 22 provided between the semiconductor layer 4 and each of the source electrode 5 and drain electrode 6, and high-conductance layers 21 provided between the oxide reaction layers 22 and semiconductor layer 4.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: October 21, 2014
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Pilsang Yun, Hideaki Kawakami