Patents by Inventor Junichi Koike

Junichi Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7940361
    Abstract: A liquid crystal display device including, a pair of substrates, a gate electrode of a thin film transistor (TFT) formed on one of the substrates, and a wiring layer connected to the gate electrode or an electrode of the thin film transistor, wherein at least a part of the gate electrode or a part the wiring layer is formed by a layer structured by a pure copper layer and a Cu—Mn alloy layer including Mn, wherein a concentration of Mn in the Cu—Mn alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of Mn in the copper, and wherein a boundary surface between the Cu—Mn alloy layer and said one of the substrate includes an oxide layer having a Mn oxide layer.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: May 10, 2011
    Assignee: Advanced Interconnect Materials, LLC
    Inventor: Junichi Koike
  • Publication number: 20110057317
    Abstract: A contact plug structure formed on a contact hole of an insulating layer of a semiconductor device includes a metal silicide layer formed on a bottom part of the contact hole of the insulating layer, a manganese oxide layer formed on the metal silicide layer in the contact hole, and a buried copper formed on the manganese oxide layer which substantially fills the contact hole.
    Type: Application
    Filed: September 7, 2010
    Publication date: March 10, 2011
    Applicants: Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi, Kouji Neishi
  • Publication number: 20110049718
    Abstract: When a barrier film is formed on an exposed surface of an interlayer insulation film on a substrate, the interlayer insulation film having a recess formed therein, and a metal wiring to be electrically connected to a metal wiring in a lower layer is formed in the recess, a barrier film having an excellent step coverage can be formed and increase of a wiring resistance can be restrained. An oxide film on a surface of the lower copper wiring exposed to a bottom surface of the interlayer insulation film is reduced or edged so as to remove oxygen on the surface of the copper wiring. Then, by supplying an organic metal compound containing manganese and containing no oxygen, generation of manganese oxide as a self-forming barrier film is selectively allowed on an area containing oxygen, such as a sidewall of the recess and a surface of the interlayer insulation film, while generation of the manganese oxide is not allowed on the surface of the copper wiring. Thereafter, copper is embedded in the recess.
    Type: Application
    Filed: January 20, 2009
    Publication date: March 3, 2011
    Applicants: TOKYO ELECTRON LIMITED, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Kenji Matsumoto, Hitoshi Itoh, Hiroshi Sato, Junichi Koike, Koji Neishi
  • Publication number: 20110032467
    Abstract: A liquid crystal display device including, a pair of substrates, a gate electrode of a thin film transistor (TFT) formed on one of the substrates, and a wiring layer connected to the gate electrode or an electrode of the thin film transistor, wherein at least a part of the gate electrode or a part the wiring layer is formed by a layer structured by a pure copper layer and a Cu—Mn alloy layer including Mn, wherein a concentration of Mn in the Cu—Mn alloy layer is more than 0.1 and not more than 20 atomic percentage within a solubility limit of Mn in the copper, and wherein a boundary surface between the Cu—Mn alloy layer and said one of the substrate includes an oxide layer having a Mn oxide layer.
    Type: Application
    Filed: July 9, 2010
    Publication date: February 10, 2011
    Applicants: Tohoku University, Advanced Interconnect Materials LLC
    Inventor: Junichi Koike
  • Publication number: 20100267228
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection and a barrier layer. The insulating layer includes silicon (element symbol: Si), carbon (element symbol: C), hydrogen (element symbol: H) and oxygen (element symbol: O). The interconnection is located on the insulating layer, and the interconnection includes copper (element symbol: Cu). The barrier layer is located between the insulating layer and the interconnection. The barrier layer includes an additional element, carbon (element symbol: C) and hydrogen (element symbol: H). The barrier layer has atomic concentrations of carbon (element symbol: C) and hydrogen (element symbol: H) maximized in a region of a thickness of the barrier layer where the atomic concentration of the additional element is maximized.
    Type: Application
    Filed: June 24, 2010
    Publication date: October 21, 2010
    Applicants: Advanced Interconnect Materials, LLC, Tohoku University
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20100233876
    Abstract: In a film forming method, a substrate is first loaded into a vacuum-evacuable processing chamber. At least a transition metal-containing source gas and a reduction gas are supplied into the processing chamber, and the substrate is heated. Then, a thin film is formed in a recess in the surface of the substrate by heat treatment. Accordingly, the surface recess of the substrate can be filled with a copper film.
    Type: Application
    Filed: June 8, 2007
    Publication date: September 16, 2010
    Applicants: TOKYO ELECTRON LIMITED, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY
    Inventors: Kenji Matsumoto, Junichi Koike, Koji Neishi
  • Patent number: 7782413
    Abstract: The present invention includes a liquid crystal display device with an oxide film having high adhesiveness to a semiconductor layer or a pixel electrode to thereby prevent oxidation of a wiring material or the like, and includes a source electrode and a drain electrode having high conductivity, and a manufacturing method therefor. In one embodiment of the present invention, a liquid crystal display device has a TFT electrode of a TFT substrate, wherein a source electrode or a drain electrode includes a layer of mainly copper and an oxide covering an outer part of the layer. Further, in the present invention, the semiconductor layer or the pixel electrode and said source electrode or the drain electrode are in ohmic contact in the TFT electrode.
    Type: Grant
    Filed: May 9, 2007
    Date of Patent: August 24, 2010
    Assignees: Tohoku University, Advanced Interconnect Materials LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Patent number: 7782433
    Abstract: A method of forming an oxide film on a surface of a copper alloy, including the steps of providing a copper alloy including copper and an element selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd, and diffusing atoms of the element to a surface of the copper alloy so as to form an oxide film on the surface of the copper alloy, wherein a concentration of the element in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the element in the copper.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: August 24, 2010
    Assignees: Tohoku University, Advanced Interconnect Materials LLC
    Inventor: Junichi Koike
  • Publication number: 20100201901
    Abstract: The present invention includes a liquid crystal display device with an oxide film having high adhesiveness to a semiconductor layer or a pixel electrode to thereby prevent oxidation of a wiring material or the like, and includes a source electrode and a drain electrode having high conductivity, and a manufacturing method therefor. In one embodiment of the present invention, a liquid crystal display device has a TFT electrode of a TFT substrate, wherein a source electrode or a drain electrode includes a layer of mainly copper and an oxide covering an outer part of the layer. Further, in the present invention, the semiconductor layer or the pixel electrode and said source electrode or the drain electrode are in ohmic contact in the TFT electrode.
    Type: Application
    Filed: April 20, 2010
    Publication date: August 12, 2010
    Applicants: Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Patent number: 7755192
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection and a barrier layer. The insulating layer includes silicon (element symbol: Si), carbon (element symbol: C), hydrogen (element symbol: H) and oxygen (element symbol: O). The interconnection is located on the insulating layer, and the interconnection includes copper (element symbol: Cu). The barrier layer is located between the insulating layer and the interconnection. The barrier layer includes an additional element, carbon (element symbol: C) and hydrogen (element symbol: H). The barrier layer has atomic concentrations of carbon (element symbol: C) and hydrogen (element symbol: H) maximized in a region of a thickness of the barrier layer where the atomic concentration of the additional element is maximized.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: July 13, 2010
    Assignees: Tohoku University, Advanced Interconnect Materials LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20100154213
    Abstract: A method for forming a copper interconnection structure includes the steps of forming an opening in an insulating layer, forming a copper alloy layer including a metal element on an inner surface of the opening, and conducting a heat treatment on the copper alloy layer so as to form a barrier layer. An enthalpy of oxide formation for the metal element is lower than the enthalpy of oxide formation for copper. The heat treatment is conducted at temperatures ranging from 327° C. to 427° C. and for a time period ranging from 1 minute to 80 minutes.
    Type: Application
    Filed: October 28, 2009
    Publication date: June 24, 2010
    Applicants: Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20100155951
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer, and a diffusion barrier layer formed between the insulating layer and the interconnection body. The diffusion barrier layer includes an oxide layer including manganese having a compositional ratio of oxygen to manganese (y/x) less than 2.
    Type: Application
    Filed: October 29, 2009
    Publication date: June 24, 2010
    Applicants: Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20100155952
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer and a barrier layer including a metal element and copper, formed between the insulating layer and the interconnection body. An atomic concentration of the metal element in the barrier layer is accumulated toward an outer surface of the barrier layer facing the insulating layer, and an atomic concentration of copper in the barrier layer is accumulated toward an inner surface of the barrier layer facing the interconnection body. The inner surface of the barrier layer comprises copper surface orientation of {111} and {200}, and an intensity of X-ray diffraction peak from the inner surface of the barrier layer is stronger for the {111} peak than for the {200} peak.
    Type: Application
    Filed: October 30, 2009
    Publication date: June 24, 2010
    Applicants: Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20100140802
    Abstract: On a surface of an object to be treated, a Mn-containing thin film or CuMn-containing alloy thin film is formed by heat treatment (CVD or ALD) by using a Mn-containing source gas (or Mn-containing source gas and a Cu-containing gas) and an oxygen-containing gas (for instance, water vapor) as a processing gas. The Mn-containing thin film or the CuMn-containing alloy thin film can be formed with high step coverage in a fine recess formed on the surface of the object to be treated.
    Type: Application
    Filed: December 4, 2009
    Publication date: June 10, 2010
    Applicants: TOKYO ELECTRON LIMITED, TOHOKU UNIVERSITY
    Inventors: Kenji MATSUMOTO, Hitoshi ITOH, Koji NEISHI, Junichi KOIKE
  • Publication number: 20100112806
    Abstract: A seed layer is formed on a surface of an insulating film and along a recess of the insulating film, and after a copper wiring is buried in the recess, a barrier film is formed, and an excessive metal is removed from the wiring. On a surface of a copper lower layer conductive path exposed at the bottom of the recess, a natural oxide of the copper is reduced or removed. On a substrate from which the natural oxide is reduced or removed, the seed layer, composed of a self-forming barrier metal having oxidative tendency higher than that of copper or an alloy of such metal and copper, is formed. The substrate is heated after burying copper in the recess. Thus, a barrier layer is formed by oxidizing the self-forming barrier metal. An excessive portion of the self-forming barrier metal is deposited on a surface of the buried copper.
    Type: Application
    Filed: November 30, 2009
    Publication date: May 6, 2010
    Applicants: TOKYO ELECTRON LIMITED, TOHOKU UNIVERSITY
    Inventors: Kenji MATSUMOTO, Shigetoshi HOSAKA, Junichi KOIKE, Koji NEISHI
  • Publication number: 20100065967
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper and a barrier layer surrounding the interconnection body. The barrier layer includes a first barrier layer formed between a first portion of the interconnection body and the insulating layer. The first portion of the interconnection body is part of the interconnection body that faces the insulating layer. The barrier layer also includes a second barrier layer formed on a second portion of the interconnection body. The second portion of the interconnection body is part of the interconnection body not facing the insulating layer. Each of the first and the second barrier layers is formed of an oxide layer including manganese, and each of the first and the second barrier layers has a position where the atomic concentration of manganese is maximized in their thickness direction of the first and the second barrier layers.
    Type: Application
    Filed: September 15, 2009
    Publication date: March 18, 2010
    Applicants: National University Corporation Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20100045887
    Abstract: In a liquid crystal display (LCD) device having a thin film transistor (TFT), the TFT includes a source electrode, a drain electrode and a semiconductor layer. At least one of the source electrode and drain electrode includes a first layer including copper and a second layer forming an oxide layer and covering the first layer. The semiconductor layer has a substantially linear current-voltage relationship with said source electrode or drain electrode including said first and second layers, when a voltage is applied between the semiconductor layer and said source electrode or drain electrode.
    Type: Application
    Filed: August 13, 2009
    Publication date: February 25, 2010
    Applicants: Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Publication number: 20100018614
    Abstract: The present invention includes a liquid crystal display device having an oxide film having high adhesiveness to a substrate to thereby prevent oxidation of a wiring material or the like, and includes, an electrode or a terminal electrode having high conductivity, and a manufacturing method therefor. Consequently, in the present invention, a liquid crystal display device has an electrode terminal of a TFT substrate, wherein the electrode is formed on an insulator and is comprised of a conductive layer mainly consisting of copper and an oxide covering an outer part, further the oxide is a layered structure of transparent electrodes, the layered portion having ohmic contact, and the oxide mainly consists of manganese oxide.
    Type: Application
    Filed: September 23, 2009
    Publication date: January 28, 2010
    Applicants: Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Publication number: 20100015330
    Abstract: A method of forming an oxide film on a surface of a copper alloy, including the steps of providing a copper alloy including copper and an element selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd, and diffusing atoms of the element to a surface of the copper alloy so as to form an oxide film on the surface of the copper alloy, wherein a concentration of the element in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the element in the copper.
    Type: Application
    Filed: September 23, 2009
    Publication date: January 21, 2010
    Applicants: National University Corporation Tohoku University, Advanced Interconnect Materials LLC
    Inventor: Junichi Koike
  • Patent number: 7642552
    Abstract: A liquid crystal display device including gate wiring or a gate electrode formed on a substrate on a TFT side of the TFT liquid crystal display device, wherein the wiring or the electrode has a structure of being held between two different insulation layers or insulators, and the structure is comprised of a first layer mainly consisting of copper and a second layer consisting of an oxide covering an outer circumferential part of the first layer, further, the second layer has compositional formula of CuxMnySizO (0<X<Y, 0<Z<Y).
    Type: Grant
    Filed: January 12, 2007
    Date of Patent: January 5, 2010
    Assignees: Tohoku University, Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Hideaki Kawakami