Patents by Inventor Junichi Koike

Junichi Koike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8859421
    Abstract: There is provided a manganese oxide film forming method capable of forming a manganese oxide film having high adhesivity to Cu. In the manganese oxide film forming method, a manganese oxide film is formed on an oxide by supplying a manganese-containing gas onto the oxide. A film forming temperature for forming the manganese oxide film is set to be equal to or higher than about 100° C. and lower than about 400° C.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: October 14, 2014
    Assignees: Tokyo Electron Limited, Tohoku University
    Inventors: Koji Neishi, Junichi Koike, Kenji Matsumoto
  • Publication number: 20140225119
    Abstract: In a liquid crystal display (LCD) device having a thin film transistor (TFT), the TFT includes a source electrode, a drain electrode and a semiconductor layer. At least one of the source electrode and drain electrode includes a first layer including copper and a second layer forming an oxide layer and covering the first layer. The semiconductor layer has a substantially linear current-voltage relationship with said source electrode or drain electrode including said first and second layers, when a voltage is applied between the semiconductor layer and said source electrode or drain electrode.
    Type: Application
    Filed: February 12, 2014
    Publication date: August 14, 2014
    Applicant: Altiam Services Ltd. LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Patent number: 8709939
    Abstract: A multilevel interconnect structure in a semiconductor device and methods for fabricating the same are described. The multilevel interconnect structure in the semiconductor device includes a first insulating layer formed on a semiconductor wafer, a Cu interconnect layer formed on the first insulating layer, a second insulating layer formed on the Cu interconnect layer, and a metal oxide layer formed at an interface between the Cu interconnect layer and the second insulating layer. The metal oxide layer is formed by immersion-plating a metal, such as Sn or Zn, on the Cu interconnect layer and then heat-treating the plated layer in an oxidizing atmosphere.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: April 29, 2014
    Assignees: Semiconductor Technology Academic Research Center, National University Corporation Tohoku University
    Inventors: Junichi Koike, Yoshito Fujii, Jun Iijima, Noriyoshi Shimizu, Kazuyoshi Maekawa, Koji Arita, Ryotaro Yagi, Masaki Yoshimaru
  • Patent number: 8681282
    Abstract: In a liquid crystal display (LCD) device having a thin film transistor (TFT), the TFT includes a source electrode, a drain electrode and a semiconductor layer. At least one of the source electrode and drain electrode includes a first layer including copper and a second layer forming an oxide layer and covering the first layer. The semiconductor layer has a substantially linear current-voltage relationship with said source electrode or drain electrode including said first and second layers, when a voltage is applied between the semiconductor layer and said source electrode or drain electrode.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: March 25, 2014
    Assignee: Altiam Services Ltd. LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Publication number: 20140070207
    Abstract: To make it possible to form a metal electrode of low electrical contact resistance on a conductive indium-containing oxide semiconductor layer constituting a device active layer of a thin-film transistor or the like. Between an indium-containing oxide semiconductor layer and a metal electrode layer provided above this layer for passing device operating current, which can reduce indium oxide or the like of the oxide semiconductor layer. A metallic oxide layer and a metal layer are formed using as material a metal film including an easily oxidable metal, and further an indium-rich layer in which reduced indium is accumulated is formed at a boundary between the metallic oxide layer and the metal layer.
    Type: Application
    Filed: September 5, 2013
    Publication date: March 13, 2014
    Applicant: ADVANCED INTERCONNECT MATERIALS, LLC
    Inventors: Junichi KOIKE, Mayumi NAITO, Pilsang YUN, Hideaki KAWAKAMI
  • Patent number: 8598563
    Abstract: A phase-change material, which has a high crystallization temperature and is superior in thermal stability of the amorphous phase, which has a composition of the general chemical formula GexMyTe100-x-y wherein M indicates one type of element which is selected from the group which comprises Al, Si, Cu, In, and Sn, x is 5.0 to 50.0 (at %) and y is 4.0 to 45.0 (at %) in range, and x and y are selected so that 40 (at %)?x+y?60 (at %). This phase-change material further contains, as an additional element L, at least one type of element L which is selected from the group which comprises N, O, Al, Si, P, Cu, In, and Sn in the form of GexMyLzTe100-x-y-z wherein z is selected so that 40 (at %)?x+y+z?60 (at %).
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: December 3, 2013
    Assignee: Tohoku University
    Inventors: Yuji Sutou, Junichi Koike, Yuta Saito, Toshiya Kamada
  • Patent number: 8580688
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer, and a diffusion barrier layer formed between the insulating layer and the interconnection body. The diffusion barrier layer includes an oxide layer including manganese having a compositional ratio of oxygen to manganese (y/x) less than 2.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: November 12, 2013
    Assignee: Advanced Interconect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8531033
    Abstract: A contact plug structure formed on a contact hole of an insulating layer of a semiconductor device includes a metal silicide layer formed on a bottom part of the contact hole of the insulating layer, a manganese oxide layer formed on the metal silicide layer in the contact hole, and a buried copper formed on the manganese oxide layer which substantially fills the contact hole.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: September 10, 2013
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi, Kouji Neishi
  • Publication number: 20130168671
    Abstract: An ohmic contact between an electrode and a semiconductor layer is more stably formed and an electrical contact resistance between them is further reduced. A semiconductor device comprises a semiconductor layer 103 composed of an oxide semiconductor material containing indium, an ohmic electrode 107 provided on the semiconductor layer 103 and having an ohmic contact with the semiconductor layer 103, and an intermediate layer 106 provided between the semiconductor layer 103 and the ohmic electrode 107, wherein the intermediate layer 106 includes a first region 106a whose indium atomic concentration is greater than that of an interior of the semiconductor layer 103 and a second region 106b whose indium atomic concentration is less than that of the first region.
    Type: Application
    Filed: June 30, 2011
    Publication date: July 4, 2013
    Applicant: ADVANCED INTERCONNECT MATERIALS, LLC
    Inventors: Junichi Koike, Pilsang Yun, Hideaki Kawakami
  • Patent number: 8451394
    Abstract: The present invention includes a liquid crystal display device with an oxide film having high adhesiveness to a semiconductor layer or a pixel electrode to thereby prevent oxidation of a wiring material or the like, and includes a source electrode and a drain electrode having high conductivity, and a manufacturing method therefor. In one embodiment of the present invention, a liquid crystal display device has a TFT electrode of a TFT substrate, wherein a source electrode or a drain electrode includes a layer of mainly copper and an oxide covering an outer part of the layer. Further, in the present invention, the semiconductor layer or the pixel electrode and said source electrode or the drain electrode are in ohmic contact in the TFT electrode.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: May 28, 2013
    Assignee: Altiam Services Ltd. LLC
    Inventors: Junichi Koike, Hideaki Kawakami
  • Publication number: 20130112972
    Abstract: Making it possible to improve adhesion between the semiconductor layer and the electrodes, realize high-speed operation of the thin-film transistor by enhancing ohmic contact between these members, reliably prevent oxidation of the electrode surfaces, and realize an electrode fabrication process with few processing steps. The thin-film transistor 10 of the present invention includes a semiconductor layer 4 composed of oxide semiconductor, a source electrode 5 and a drain electrode 6 that are layers composed mainly of copper, and oxide reaction layers 22 provided between the semiconductor layer 4 and each of the source electrode 5 and drain electrode 6, and high-conductance layers 21 provided between the oxide reaction layers 22 and semiconductor layer 4.
    Type: Application
    Filed: January 2, 2013
    Publication date: May 9, 2013
    Applicant: ADVANCED INTERCONNECT MATERIALS, LLC
    Inventors: Junichi KOIKE, Pilsang YUN, Hideaki KAWAKAMI
  • Patent number: 8420535
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper and a barrier layer surrounding the interconnection body. The barrier layer includes a first barrier layer formed between a first portion of the interconnection body and the insulating layer. The first portion of the interconnection body is part of the interconnection body that faces the insulating layer. The barrier layer also includes a second barrier layer formed on a second portion of the interconnection body. The second portion of the interconnection body is part of the interconnection body not facing the insulating layer. Each of the first and the second barrier layers is formed of an oxide layer including manganese, and each of the first and the second barrier layers has a position where the atomic concentration of manganese is maximized in their thickness direction of the first and the second barrier layers.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: April 16, 2013
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8372745
    Abstract: A semiconductor device enables a barrier layer to fully acquire a barriering property against the diffusion of Cu from a wiring main body and the diffusion of Si from an insulating film, enhances the adhesiveness of the barrier layer and the insulating film and excels in reliability of operation over a long period of time. In this invention, a semiconductor device provided on an insulating film with a wiring includes the insulating film containing silicon, a wiring main body formed of copper in a groove-like opening disposed in the insulating film, and a barrier layer formed between the wiring main body and the insulating film and made of an oxide containing Cu and Si and Mn.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: February 12, 2013
    Assignee: Advanced Interconnect Materials, LLC
    Inventor: Junichi Koike
  • Patent number: 8324730
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper in an opening provided on the insulating layer, and a diffusion barrier layer formed between the insulating layer and the interconnection body. The diffusion barrier layer includes an oxide layer including manganese having a compositional ratio of oxygen to manganese (y/x) less than 2.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: December 4, 2012
    Assignee: Advanced Interconnect Materials LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Publication number: 20120295438
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper and a barrier layer surrounding the interconnection body. The barrier layer includes a first barrier layer formed between a first portion of the interconnection body and the insulating layer. The first portion of the interconnection body is part of the interconnection body that faces the insulating layer. The barrier layer also includes a second barrier layer formed on a second portion of the interconnection body. The second portion of the interconnection body is part of the interconnection body not facing the insulating layer. Each of the first and the second barrier layers is formed of an oxide layer including manganese, and each of the first and the second barrier layers has a position where the atomic concentration of manganese is maximized in their thickness direction of the first and the second barrier layers.
    Type: Application
    Filed: August 1, 2012
    Publication date: November 22, 2012
    Applicant: ADVANCED INTERCONNECT MATERIALS, LLC
    Inventors: Junichi KOIKE, Akihiro SHIBATOMI
  • Patent number: 8304908
    Abstract: A multilevel interconnect structure in a semiconductor device includes a first insulating layer formed on a semiconductor wafer, a Cu interconnect layer formed on the first insulating layer, a second insulating layer formed on the Cu interconnect layer, and a metal oxide layer formed at an interface between the Cu interconnect layer and the second insulating layer. The metal oxide layer is formed by immersion-plating a metal, such as Sn or Zn, on the Cu interconnect layer and then heat-treating the plated layer in an oxidizing atmosphere.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: November 6, 2012
    Assignees: Semiconductor Technology Academic Research Center, National University Corporation Tohoku University
    Inventors: Junichi Koike, Yoshito Fujii, Jun Iijima, Noriyoshi Shimizu, Kazuyoshi Maekawa, Koji Arita, Ryotaro Yagi, Masaki Yoshimaru
  • Publication number: 20120267628
    Abstract: In a liquid crystal display (LCD) device having a thin film transistor (TFT), the TFT includes a source electrode, a drain electrode and a semiconductor layer. At least one of the source electrode and drain electrode includes a first layer including copper and a second layer forming an oxide layer and covering the first layer. The semiconductor layer has a substantially linear current-voltage relationship with said source electrode or drain electrode including said first and second layers, when a voltage is applied between the semiconductor layer and said source electrode or drain electrode.
    Type: Application
    Filed: April 23, 2012
    Publication date: October 25, 2012
    Inventors: Junichi Koike, Hideaki Kawakami
  • Publication number: 20120235110
    Abstract: A phase-change material, which has a high crystallization temperature and is superior in thermal stability of the amorphous phase, which has a composition of the general chemical formula GexMyTe100-x-y wherein M indicates one type of element which is selected from the group which comprises Al, Si, Cu, In, and Sn, x is 5.0 to 50.0 (at %) and y is 4.0 to 45.0 (at %) in range, and x and y are selected so that 40 (at %)?x+y?60 (at %). This phase-change material further contains, as an additional element L, at least one type of element L which is selected from the group which comprises N, O, Al, Si, P, Cu, In, and Sn in the form of GexMyLzTe100-x-y-z wherein z is selected so that 40 (at %)?x+y+z?60 (at %).
    Type: Application
    Filed: September 9, 2010
    Publication date: September 20, 2012
    Inventors: Yuji Sutou, Junichi Koike, Yuta Saito, Toshiya Kamada
  • Patent number: 8258626
    Abstract: A copper interconnection structure includes an insulating layer, an interconnection body including copper and a barrier layer surrounding the interconnection body. The barrier layer includes a first barrier layer formed between a first portion of the interconnection body and the insulating layer. The first portion of the interconnection body is part of the interconnection body that faces the insulating layer. The barrier layer also includes a second barrier layer formed on a second portion of the interconnection body. The second portion of the interconnection body is part of the interconnection body not facing the insulating layer. Each of the first and the second barrier layers is formed of an oxide layer including manganese, and each of the first and the second barrier layers has a position where the atomic concentration of manganese is maximized in their thickness direction of the first and the second barrier layers.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: September 4, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: RE44817
    Abstract: A method of forming an oxide film on a surface of a copper alloy, including the steps of providing a copper alloy including copper and an element selected from the group consisting of Mn, Zn, Ga, Li, Ge, Sr, Ag, Ba, Pr and Nd, and diffusing atoms of the element to a surface of the copper alloy so as to form an oxide film on the surface of the copper alloy, wherein a concentration of the element in the copper alloy is more than 0.1 and not more than 20 atomic percentage and within a solubility limit of the element in the copper.
    Type: Grant
    Filed: August 24, 2012
    Date of Patent: March 25, 2014
    Assignee: Altiam Services Ltd. LLC
    Inventor: Junichi Koike