Patents by Inventor Kazuhiro Nobori

Kazuhiro Nobori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120248716
    Abstract: A method for producing an electrostatic chuck includes the steps of (a) placing a ceramic slurry in a molding die, the ceramic slurry containing a ceramic powder, a solvent, a dispersing agent, and a gelling agent, gelatinizing the ceramic slurry in the molding die, and removing the molding die to obtain first and second ceramic molded bodies; (b) drying, debinding, and calcining the first and second molded bodies to obtain first and second ceramic calcined bodies; (c) printing an electrostatic electrode paste on a surface of one of the first and second ceramic calcined bodies to form an electrostatic electrode while assuming the first ceramic calcined body is to form a dielectric layer of an electrostatic chuck; and (d) superposing the first and second ceramic calcined bodies on each other to sandwich the electrostatic electrode and subjecting the first and second calcined bodies to hot-press firing.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 4, 2012
    Applicant: NGK Insulators, Ltd.
    Inventors: Kazuhiro NOBORI, Masahito EGUCHI, Takuji KIMURA
  • Patent number: 8264079
    Abstract: While bumps formed on pads of a semiconductor chip and a board having a sheet-like seal-bonding resin stuck on its surface are set face to face, the bumps and the board are pressed to each other with a tool, thereby forming a semiconductor chip mounted structure in which the seal-bonding resin is filled between the semiconductor chip and the board and in which the pads of the semiconductor chip and the electrodes of the board are connected to each other via the bumps, respectively. Entire side faces at corner portions of the semiconductor chip are covered with the seal-bonding resin. Therefore, loads generated at the corner portions due to board flexures for thermal expansion and contraction differences among the individual members caused by heating and cooling during mounting as well as for mechanical loads after mounting so that internal breakdown of the semiconductor chip can be avoided.
    Type: Grant
    Filed: June 26, 2008
    Date of Patent: September 11, 2012
    Assignee: Panasonic Corporation
    Inventors: Teppei Iwase, Yoshihiro Tomura, Kazuhiro Nobori, Yuichiro Yamada, Kentaro Kumazawa
  • Patent number: 8136820
    Abstract: An electrostatic chuck with a heater includes: a base formed of a sintered body containing alumina; an ESC electrode provided in an upper portion side in the base; and a resistance heating body embedded in a lower portion side in the base. The base is composed of a dielectric layer from the ESC electrode to an upper surface of the base, and of a support member from the ESC electrode to a lower surface of the base. In the support member, a carbon content differs between an ESC electrode neighborhood in contact with the dielectric layer and a lower region below the ESC electrode neighborhood, a carbon content in the dielectric layer is 100 wt ppm or less, the carbon content in the ESC electrode neighborhood is 0.13 wt % or less, the carbon content in the lower region is 0.03 wt % or more and 0.5 wt % or less, and the carbon content in the ESC electrode neighborhood is smaller than the carbon content in the lower region. The resistance heating body contains niobium or platinum.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: March 20, 2012
    Assignee: NGK Insulators, Ltd.
    Inventors: Ikuhisa Morioka, Kazuhiro Nobori, Tetsuya Kawajiri, Akiyoshi Hattori
  • Patent number: 8106521
    Abstract: In a semiconductor device mounted structure in which device electrodes of a semiconductor device and board electrodes of a board are connected to each other via bump electrodes, respectively, and in which a sealing-bonding resin is placed between the semiconductor device and the board, a void portion is placed at a position corresponding to an edge portion of the semiconductor device in the sealing-bonding resin. Thus, stress loads generated at corner portions of the semiconductor device due to board flexures for differences in thermal expansion and thermal contraction among the individual members caused by heating and cooling during mounting of the semiconductor device, as well as for mechanical loads after the mounting process, can be absorbed by the void portion and thereby reduced, so that breakdown of the semiconductor device mounted structure is prevented.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: January 31, 2012
    Assignee: Panasonic Corporation
    Inventors: Teppei Iwase, Yoshihiro Tomura, Kazuhiro Nobori
  • Patent number: 8050049
    Abstract: The present invention provides a semiconductor device of a double-side mounting structure including a circuit board and a plurality of semiconductor chips arranged and joined together on the opposite surfaces of the circuit board, wherein in an area in which the semiconductor chip 31 mounted on the top surface of the circuit board 2 overlaps with the semiconductor chip 32 mounted on the bottom surface of the circuit board 2, a recess portion 21 (or a protruding portion 22) is formed in the surfaces of the circuit board 2.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: November 1, 2011
    Assignee: Panasonic Corporation
    Inventors: Teppei Iwase, Kazuhiro Nobori, Yoshihiro Tomura, Koujiro Nakamura, Kentaro Kumazawa
  • Patent number: 7994638
    Abstract: In this semiconductor chip 3, a table electrode 13 is interposed between a bump electrode 14 and an electrode pad 6. The table electrode 13 is formed by forming a plurality of cores 15 having a smaller Young's modulus than the bump electrode 14, on the electrode pad 6, and then covering the surfaces of the cores 15 with a conductive electrode 16. When the semiconductor chip 3 is flip-chip mounted, the bump electrode 14 is plastically deformed and the table electrode 13 is elastically deformed appropriately, thereby obtaining a good conductive state.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: August 9, 2011
    Assignee: Panasonic Corporation
    Inventors: Yoshihiro Tomura, Kazuhiro Nobori, Yuichiro Yamada, Kentaro Kumazawa, Teppei Iwase
  • Patent number: 7948735
    Abstract: The electrostatic chuck includes a base including an aluminum nitride-containing member; a dielectric layer formed on the base including a member having a volume resistivity of at least 1×1015 ?·cm at a temperature range of about 25° C. to about 300° C. and including 2 to 5% by mass of yttrium oxide, 2 to 5% by mass of ytterbium oxide, and a balance of aluminum nitride based on the total mass of the dielectric layer; and an electrode embedded under the dielectric layer so as to be positioned between the dielectric layer and the base, configured to generate an electrostatic absorption force.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: May 24, 2011
    Assignee: NGK Insulators, Ltd.
    Inventors: Kazuhiro Nobori, Yutaka Mori, Keiichi Nakamura
  • Publication number: 20110061913
    Abstract: A method of manufacturing a mounting structure includes: an insulating resin arranging step of forming, on a circuit board, two kinds of insulating resin including first insulating resin cured at first curing temperature and second insulating resin cured at second curing temperature higher than the first curing temperature; a mounting step of aligning the bumps formed on an electronic component such that the bumps are opposed to counter electrodes of the circuit board; and a full-scale pressing step of performing, after the mounting step, full-scale pressing to join the electronic component and the circuit board. The insulating resin is heated to reach the first curing temperature before the full-scale pressing, and the insulating resin is heated to reach the second temperature during the full-scale pressing after the curing of the first insulating resin.
    Type: Application
    Filed: March 23, 2009
    Publication date: March 17, 2011
    Applicant: Panasonic Corporation
    Inventors: Takayuki Higuchi, Yoshihiro Tomura, Kazuhiro Nobori, Kentaro Kumazawa
  • Publication number: 20110001233
    Abstract: In a semiconductor device mounted structure in which device electrodes of a semiconductor device and board electrodes of a board are connected to each other via bump electrodes, respectively, and in which a sealing-bonding use resin is placed between the semiconductor device and the board, a void portion is placed at a position corresponding to an edge portion of the semiconductor device in the sealing-bonding use resin. Thus, stress loads generated at corner portions of the semiconductor device due to board flexures for differences in thermal expansion and thermal contraction among the individual members caused by heating and cooling steps in mounting process of the semiconductor device, as well as for mechanical loads after the mounting process, can be absorbed by the void portion and thereby reduced, so that breakdown of the semiconductor device mounted structure is prevented.
    Type: Application
    Filed: October 16, 2007
    Publication date: January 6, 2011
    Inventors: Teppei Iwase, Yoshihiro Tomura, Kazuhiro Nobori
  • Patent number: 7848075
    Abstract: An electrostatic chuck with a heater including: a base which is composed of a sintered body containing alumina, an electrode disposed in an upper part of the base, and a resistance heating element embedded in a lower part of the base. The base includes a dielectric layer between the electrode and an upper surface of the base and a supporting member between the electrode and a lower surface of the base. The dielectric layer has a carbon content of not more than 100 ppm, and the supporting member has a carbon content of 0.03 to 0.25 wt %. Moreover, the resistance heating element is formed into a coil and mainly composed of niobium.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: December 7, 2010
    Assignee: NGK Insulators, Ltd.
    Inventors: Kazuhiro Nobori, Tetsuya Kawajiri, Akiyoshi Hattori
  • Publication number: 20100265683
    Abstract: The present invention provides a semiconductor device of a double-side mounting structure including a circuit board and a plurality of semiconductor chips arranged and joined together on the opposite surfaces of the circuit board, wherein in an area in which the semiconductor chip 31 mounted on the top surface of the circuit board 2 overlaps with the semiconductor chip 32 mounted on the bottom surface of the circuit board 2, a recess portion (or a protruding portion 22) is formed in the surfaces of the circuit board 2.
    Type: Application
    Filed: April 21, 2009
    Publication date: October 21, 2010
    Applicant: Panasonic Corporation
    Inventors: Teppei IWASE, Kazuhiro NOBORI, Yoshihiro TOMURA, Koujiro NAKAMURA, Kentaro Kumazawa
  • Publication number: 20100243635
    Abstract: A method for producing a ceramic heater includes performing firing at 1,600° C. to 1,750° C. in a state in which front and back surfaces of an inner shaped body 32 composed of low-temperature sinterable raw material powder containing aluminum nitride powder as a main component and 0.03% to 1% by weight of rare earth oxide powder are sandwiched between a pair of outer layers 30 composed of aluminum nitride sintered bodies having a volume resistivity of 1015 ?cm or more through resistive heating elements 14 and 16 composed of metal meshes, thereby obtaining a ceramic heater 10.
    Type: Application
    Filed: March 26, 2010
    Publication date: September 30, 2010
    Applicant: NGK Insulators, Ltd.
    Inventors: Keiichi NAKAMURA, Kazuhiro Nobori
  • Publication number: 20100181667
    Abstract: While bumps formed on pads of a semiconductor chip and a board having a sheet-like seal-bonding use resin stuck on its surface are set face to face, the bumps and the board are pressed to each other with a tool, thereby forming a semiconductor chip mounted structure in which the seal-bonding use resin is filled between the semiconductor chip and the board and in which the pads of the semiconductor chip and the electrodes of the board are connected to each other via the bumps, respectively. In the semiconductor chip mounted structure formed in this way, entire side faces at the corner portions of the semiconductor chip are covered with the seal-bonding use resin.
    Type: Application
    Filed: June 26, 2008
    Publication date: July 22, 2010
    Inventors: Teppei Iwase, Yoshihiro Tomura, Kazuhiro Nobori, Yuichiro Yamada, Kentaro Kumazawa
  • Patent number: 7710130
    Abstract: A pair of conductive rubber electrodes including measurement surfaces opposite to a surface of a dielectric layer of an electrostatic chuck as an objective of measurement, in which the measurement surfaces are arranged at an interval individually on the same plane, are provided. A direct-current power supply and an ammeter are connected to the pair of conductive rubber electrodes. The conductive rubber electrodes have resistance values equal to each other, and have a shape in which the measurement surfaces have areas equal to each other, in which volume resistivities are 1×105 ?·cm or less, and hardness is within a range of 60 to 80 Hs in JIS-A hardness. An interval between the conductive rubber electrodes is six times or more a thickness of the dielectric layer of the electrostatic chuck as the objective of the measurement.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: May 4, 2010
    Assignee: NGK Insulators, Ltd.
    Inventors: Minoru Yokota, Kazuhiro Nobori
  • Patent number: 7701693
    Abstract: An electrostatic chuck includes a base. The base has a support portion made of alumina ceramics, and a surface portion made of yttria ceramics. The surface portion forms at least a substrate mounting surface and side surface of the base on a surface of the support portion. Carbon contents in alumina ceramics of the support portion and yttria ceramics of the surface portion are 0.05 wt % or less.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: April 20, 2010
    Assignee: NGK Insulators, Ltd.
    Inventors: Akiyoshi Hattori, Kazuhiro Nobori
  • Publication number: 20100032832
    Abstract: In this semiconductor chip 3, a table electrode 13 is interposed between a bump electrode 14 and an electrode pad 6. The table electrode 13 is formed by forming a plurality of cores 15 having a smaller Young's modulus than the bump electrode 14, on the electrode pad 6, and then covering the surfaces of the cores 15 with a conductive electrode 16. When the semiconductor chip 3 is flip-chip mounted, the bump electrode 14 is plastically deformed and the table electrode 13 is elastically deformed appropriately, thereby obtaining a good conductive state.
    Type: Application
    Filed: May 9, 2008
    Publication date: February 11, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Yoshihiro Tomura, Kazuhiro Nobori, Yuichiro Yamada, Kentaro Kumazawa, Teppei Iwase
  • Publication number: 20090243235
    Abstract: The electrostatic chuck includes a base including an aluminum nitride-containing member; a dielectric layer formed on the base including a member having a volume resistivity of at least 1×1015 ?·cm at a temperature range of about 25° C. to about 300° C. and including 2 to 5% by mass of yttrium oxide, 2 to 5% by mass of ytterbium oxide, and a balance of aluminum nitride based on the total mass of the dielectric layer; and an electrode embedded under the dielectric layer so as to be positioned between the dielectric layer and the base, configured to generate an electrostatic absorption force.
    Type: Application
    Filed: March 25, 2009
    Publication date: October 1, 2009
    Applicant: NGK Insulators, Ltd.
    Inventors: Kazuhiro NOBORI, Yutaka MORI, Keiichi NAKAMURA
  • Patent number: 7586183
    Abstract: A semiconductor module is formed by alternately stacking resin boards and sheet members. Each of the resin boards includes first buried conductors. A semiconductor chip is mounted on the upper face of each of the resin boards. Each of the sheet members having an opening for accommodating the semiconductor chip and including second buried conductors electrically connected to the first buried conductors. A first resin board located at the bottom is thicker than second resin boards. Each of the sheet members includes an adhesive member covering the upper and side faces of the semiconductor chip.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: September 8, 2009
    Assignee: Panasonic Corporation
    Inventors: Takeshi Kawabata, Motoaki Satou, Toshiyuki Fukuda, Toshio Tsuda, Kazuhiro Nobori, Seiichi Nakatani
  • Patent number: 7582367
    Abstract: A ceramic member is provided including a base including an alumina sintered body, an yttria sintered body formed on the alumina sintered body, an intermediate layer including yttrium and aluminum formed between the alumina sintered body and the yttria sintered body, and a metallic member buried in the intermediate layer of the base. A difference between the thermal expansion coefficient of the alumina sintered body and that of the yttria sintered body is equal to or less than about 0.50×10?6/K, and the thermal expansion coefficient of the alumina sintered body is greater than the thermal expansion coefficient of the yttria sintered body. The alumina sintered body, the intermediate layer, the yttria sintered body, and the metallic member are formed into an integrated sintered body, and the content of yttria in the yttria sintered body is 99 wt % or more.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: September 1, 2009
    Assignee: NGK Insulators, Ltd.
    Inventors: Yasufumi Aihara, Hiroto Matsuda, Kazuhiro Nobori, Tsutomu Kato
  • Patent number: 7564008
    Abstract: An electrostatic chuck includes a base of a sintered body containing alumina, an electrode as a power-supplied member embedded in the base and supplied with electric power, a bonding member embedded in the base and bonded to the electrode, in which a difference in coefficient of thermal expansion from the sintered body is 2×10?6/K or less, and a melting point is higher than baking temperature of the sintered body, and a terminal bonded to the electrode through the bonding member.
    Type: Grant
    Filed: December 6, 2005
    Date of Patent: July 21, 2009
    Assignee: NGK Insulators, Ltd.
    Inventors: Yutaka Mori, Hiroto Matsuda, Kazuhiro Nobori