Abstract: A semiconductor memory includes a memory cell including a resistance change element and a control circuit configured to perform OFF-write processing of applying an OFF-write pulse to the memory cell for switching the state of the memory cell to a high-resistive state where a resistance value of the resistance change element is at least a first reference value and ON-write processing of applying an ON-write pulse to the memory cell for switching the state of the memory cell to a low-resistive state where the resistance value is less than a second reference value. The control circuit performs the OFF-write processing by applying an auxiliary pulse which is smaller than the OFF-write pulse in voltage amplitude to the memory cell one or more time(s) after having applied the OFF-write pulse to the memory cell.

Abstract: Provided are a method for manufacturing a chlorogenic acid-containing composition, including a chlorogenic acid extraction step of obtaining a chlorogenic acid-containing liquid extract from sunflower seed residues remaining after oil expression by bringing chlorogenic acid and saccharides derived from the sunflower seed residues remaining after oil expression into contact with yeast and a solvent selected from the group consisting of water, an alcohol, and a liquid mixture of water and an alcohol, and a bacterial treatment step of performing at least one treatment selected from germicidal treatment or sterilization treatment on the liquid extract, a chlorogenic acid-containing composition obtained by the manufacturing method, and a drink or food item containing the chlorogenic acid-containing composition.

Abstract: A semiconductor memory device has at least one memory cell using a resistance variable element, and a control circuit which controls writing to and reading from the memory cell. Operations by the control circuit include a first writing operation, a second writing operation, and a rewriting operation. The first writing operation is a writing operation for applying a first voltage of a first polarity to the memory cell. The second writing operation is a writing operation for applying a second voltage of a second polarity opposite to the first polarity to the memory cell. The rewriting operation is a writing operation for, when the first writing operation fails, further executing a second A writing operation for applying the second voltage of the second polarity to the memory cell and a first A writing operation for applying the first voltage of the first polarity to the memory cell.

Abstract: A first contact, a second impurity region, and a second low-concentration impurity region form a Schottky barrier diode. The second impurity region has the same impurity concentration as those of first impurity regions, and thus can be formed in the same process as forming the first impurity regions. In addition, the second low-concentration impurity region has the same impurity concentration as those of first low-concentration impurity regions, and thus can be formed in the same process as forming the first low-concentration impurity regions.

Abstract: Disclosed is a semiconductor device that reduces the area of a transistor in a ReRAM. A plurality of memory cells differ from each other in the combination of bit line and plate line. The potential of plate line PL2 is a forming voltage. By contrast, the potentials of the other plate lines are +Vi. The potential of bit line BL2 is 0 V (ground potential). By contrast, the potentials of the other bit lines are +Vi. The potential of is +Vgf. By contrast, the potentials of the other word lines are +Vi.

Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a substrate composed of silicon, a semiconductor layer composed of p-type nitride semiconductor provided on the substrate, and a transistor including a channel layer provided on the semiconductor layer. The semiconductor device further includes an n-type source region provided in the channel layer, and an n-type drain region provided in the channel layer separately from the source region in a plan view. Each of the source region and the drain region is in contact with the semiconductor layer.

Abstract: When a game process is performed by an exemplary game apparatus having an LCD for displaying a stereoscopically visible image, angular velocities of rotations about axes of the game apparatus are detected by using an angular velocity sensor provided in the game apparatus. A stereoscopic effect of a stereoscopically displayed image is adjusted in accordance with a magnitude of a rotation angle of the game apparatus in a roll direction calculated based on the angular velocities of the rotations about axes of the game apparatus.

Abstract: An organic semiconductor polymer comprising a structural unit represented by the following Formula (I), a composition for organic semiconductor material, a photovoltaic cell and a polymer. wherein Z1 and Z2 each independently represent S, O, Se or Te; R represents —SOpX, —CN, —NO2, —P(?O)(OR1,)(OR2) or —C(R1?)?C(CN)2; X represents a hydrogen atom, an alkyl group, a cycloalkyl group, an aryl group, an aromatic heterocyclic group or —NR3(R4); R1, R2, R1,, R3 and R4 each independently represent a hydrogen atom, an alkyl group, a cycloalkyl group, an aryl group or an aromatic heterocyclic group; R3 and R4 may bond with each other to form a ring; and p represents 1 or 2.

Abstract: Provided is a semiconductor memory device (resistance random access memory element) improved in properties. A Ru film is formed as a film of a lower electrode by sputtering, and a Ta film is formed thereonto by sputtering. Next, the Ta film is oxidized with plasma to oxidize the Ta film. In this way, a compound Ta2O5 is produced and further Ru is diffused into the compound to form a layer (variable resistance layer) in which Ru is diffused into the compound Ta2O5. Such an incorporation of a metal (such as Ru) into a transition metal oxide TMO (such as Ta2O5) makes it possible to form electron conductive paths additional to filaments to lower the filaments in density and thickness. Thus, the memory element can be restrained from undergoing OFF-fixation, by which the element is not easily lowered in resistance, to be improved in ON-properties.

Abstract: When a game process is performed by an exemplary game apparatus having an LCD for displaying a stereoscopically visible image, angular velocities of rotations about axes of the game apparatus are detected by using an angular velocity sensor provided in the game apparatus. A stereoscopic effect of a stereoscopically displayed image is adjusted in accordance with a magnitude of a rotation angle of the game apparatus in a roll direction calculated based on the angular velocities of the rotations about axes of the game apparatus.

Abstract: An organic photovoltaic cell, containing a first electrode; a second electrode; and a photoelectric conversion layer between the first electrode and the second electrode, wherein the photoelectric conversion layer contains a polymer having a structural unit represented by formula (I): wherein X represents S, NR2, O, Se or Te; Y represents NR2, O, Te, SO, SO2 or CO; and R1 and R2 represent a hydrogen atom or a substituent.

Abstract: A first contact, a second impurity region, and a second low-concentration impurity region form a Schottky barrier diode. The second impurity region has the same impurity concentration as those of first impurity regions, and thus can be formed in the same process as forming the first impurity regions. In addition, the second low-concentration impurity region has the same impurity concentration as those of first low-concentration impurity regions, and thus can be formed in the same process as forming the first low-concentration impurity regions.

Abstract: To provide a semiconductor device having less variation in characteristics. The semiconductor device is equipped with a plug formed in an interlayer insulating film, a lower electrode provided on the plug and to be coupled to the plug, a middle layer provided on the lower electrode and made of a metal oxide, and an upper electrode provided on the middle layer. The middle layer has a layered region contiguous to the lower electrode and the upper electrode. At least a portion of the layered region does not overlap with the plug. At least a portion of the plug does not overlap with the layered region.

Abstract: One embodiment of a present invention causes a computer to execute controlling a position of an object in the virtual space, determining an area where the object is positioned from among a plurality of areas set in the virtual space, setting a stereoscopic parameter which is used for rendering a stereoscopic image according to the determined area, generating a stereoscopic image including the object based on the set stereoscopic parameter, and displaying the generated stereoscopic image on the display device.

Abstract: A method of testing the operational margin of an information storage device having marked random variations, and an information storage device having the function of self-diagnosing the operational margin, are provided. The test method includes testing an information storage device including a plurality of memory bits as the test condition is set so as to be outside a range of conditions that may be presupposed in real use of the information storage device and of counting the number of memory bits that fail in operation. The test method also includes verifying the size of the operational margin of the information storage device based on the count value. The test condition is made severe and the reference value is set to a fairly large value to enable the operational margin against the noise to be tested highly accurately.

Abstract: A multilayered printed wiring board includes a plurality of insulating layers; a plurality of wiring layers which are located between the corresponding adjacent insulating layers; and a plurality of interlayer connection conductors for electrically connecting the wiring layers through the insulating layers; wherein a cavity is formed through one or more of the insulating layers so as to insert a first electric/electronic component and an area for embedding a second electric/electronic component is defined for the insulating layers.

Abstract: Disclosed is a semiconductor device in which the quality of an oxide semiconductor film is stabilized, while the property that an oxide semiconductor has high mobility is being utilized. The semiconductor device includes an oxide semiconductor layer and an electrode. The electrode is coupled to one surface of the oxide semiconductor layer. A portion of the oxide semiconductor layer, spanning from the one surface to a depth of t, becomes an ordered layer. The ordered layer is an area including a plurality of ordered regions in each of which the arrangement of atoms is compliant with a specific rule. The maximum width of the ordered region in a section in a direction perpendicular to the one surface is 2 nm or less.

Abstract: An organic photoelectric conversion element composition including a p-type-and-n-type linked organic semiconductor polymer represented by any one of formulas (1) to (5), a thin film and a photovoltaic cell each containing the same, an organic semiconductor polymer and a compound each for use in these, and a method of producing the polymer: wherein, in formulas, A to A4 represent a group of a p-type organic semiconductor unit, and B to B3 represent a group of an n-type organic semiconductor unit; L1 to L4 represent a divalent or trivalent linking group; herein, in the formulas, at least one bonding hand represented by -* in the structures shown upperward and downward, and in the case of formula (4), L4 and (b), and L1 or L2 and (a), bond directly or through a divalent linking group; l, n, r, t, u and v represent an integer of 1 to 1,000; m and s represent an integer of 1 to 10; and p, q, l? and n? represent an integer of 0 to 1,000; in which p and q do not simultaneously represent 0.

Abstract: An organic photovoltaic cell, containing a first electrode; a second electrode; and a photoelectric conversion layer between the first electrode and the second electrode, wherein the photoelectric conversion layer contains a polymer having a structural unit represented by formula (I): wherein X represents S, NR2, O, Se or Te; Y represents NR2, O, Te, SO, SO2 or CO; and R1 and R2 represent a hydrogen atom or a substituent.

Abstract: An SRAM cell using a vertical MISFET is provided, wherein underside source/drain areas of a first access transistor, a first driving transistor and a first load transistor are connected together, and further connected to gates of a second driving transistor and a second load transistor. Underside source/drain areas of a second access transistor, the second driving transistor and the second load transistor are connected together, and further connected to gates of the first driving transistor and the first load transistor. A first arrangement of the first access transistor, the first driving transistor and the first load transistor, and a second arrangement of the second access transistor, the second driving transistor and the second load transistor are symmetric to each other.