Abstract: A battery cell includes a first electrode assembly, a second electrode assembly and a housing. In a thickness direction of the battery cell, the first electrode assembly includes a first surface and a second surface opposite to the first surface, the second electrode assembly includes a third surface and a fourth surface opposite to the third surface. A housing includes an accommodation cavity configured to accommodate the first electrode assembly and the second electrode assembly, the accommodation cavity includes a bottom wall, and the first surface and the third surface are both opposite to the bottom wall. The battery cell further includes: a first adhesive layer, including a first bonding side and a second bonding side. The first bonding side is bonded to both the second surface and the fourth surface, and the second bonding side is bonded to the housing.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.

Abstract: The invention relates to a combined dual-wavelength laser light processing device, having two laser light source and a Bessel beam lens, so as to form a Bessel beam with long focal length; Using the coaxial reflecting mirror to achieve deflecting and penetrating to form two coaxial finished light beams; a diffraction optical unit for adjusting the energy distribution of the finished light beam; a work platform; a laser galvanometric scanning module to achieve guiding the finished light beam; a controller electrically connected to the two laser light sources, and controls the projection timing and energy of the first and the second wavelength beams to form at least one rectangular pulse and at least one burst pulse, through the repeated conversion of the dual wavelengths in the composite light wave configuration make the processing of the composite material to be fast and precise.

Abstract: A semiconductor device according to the present disclosure includes a source feature and a drain feature, a plurality of semiconductor nanostructures extending between the source feature and the drain feature, a gate structure wrapping around each of the plurality of semiconductor nanostructures, a bottom dielectric layer over the gate structure and the drain feature, a backside power rail disposed over the bottom dielectric layer, and a backside source contact disposed between the source feature and the backside power rail. The backside source contact extends through the bottom dielectric layer.

Abstract: An example apparatus for detecting objects in video frames includes a receiver to receive a plurality of video frames from a video camera. The apparatus also includes a first still image object detector to receive a first frame of the plurality of video frames and calculate localization information and confidence information for each potential object patch in the first frame. The apparatus further includes a second still image object detector to receive an adjacent frame of the plurality of video frames adjacent to the first frame and calculate localization information and confidence information for each potential object patch in the adjacent frame. The apparatus includes a similarity detector trained to detect paired patches between the first frame and the adjacent frame based on a comparison of the detected potential object patches.

Abstract: Embodiments of the present disclosure provide a method for controlling a converter and a converter system. The method includes obtaining voltage signals indicating phase voltages of three phases at AC side of a converter, determining, based on the voltage signals, carrier signals of a three-phase switching branches of the converter, wherein carrier signals of two of three phases have the same phase with each other and have a different phase from a carrier signal of the rest phase of the three phases, and magnitude of a phase voltage of the rest phase is between the phase voltages of the two phases, and generating, based on the determined carrier signals and modulation wave signals of the three-phase switching branches, control signals of the three-phase switching branch.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first channel structure configured to transport charge carriers within a first transistor device and a first gate electrode layer wrapping around the first channel structure. A second channel structure is configured to transport charge carriers within a second transistor device. A second gate electrode layer wraps around the second channel structure. The second gate electrode layer continuously extends from around the second channel structure to cover the first gate electrode layer. A third channel structure is configured to transport charge carriers within a third transistor device. A third gate electrode layer wraps around the third channel structure. The third gate electrode layer continuously extends from around the third channel structure to cover the second gate electrode layer.

Abstract: A rendering method includes that a physical engine on a remote computing platform obtains a physical simulation result based on an operation instruction sent by a user corresponding to a first rendering engine or a user corresponding to a second rendering engine, and then sends the physical simulation result to the first rendering engine and the second rendering engine, so that the first rendering engine performs rendering based on the physical simulation result to obtain a first rendered image, and the second rendering engine performs rendering based on the physical simulation result to obtain a second rendered image, where the operation instruction affects at least one three-dimensional model in a target scene, and the physical simulation result includes physical information of the at least one three-dimensional model affected by the operation instruction.

Abstract: Provided are a video processing method and apparatus, and a device and a storage medium. The method comprises: when it is detected that an editing reference track of a video to be processed moves out of a video editing window, displaying a mask in the video editing window, wherein the editing reference track comprises a video editing track and/or an audio editing track; and then displaying, on the mask, the editing reference track of said video, wherein the editing reference track displayed on the mask is used for assisting a user with editing said video in the video editing window.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a plurality of first channel nanostructures and a plurality of second channel nanostructures in an n-type device region and a p-type device region of a substrate, respectively, and sequentially depositing a gate dielectric layer, an n-type work function metal layer, and a cap layer surrounding each of the first and second channel nanostructures. The cap layer merges in first spaces between adjacent first channel nanostructures and merges in second spaces between adjacent second channel nanostructures. The method further includes selectively removing the cap layer and the n-type work function metal layer in the p-type device region, and depositing a p-type work function metal layer over the cap layer in the n-type device region and the gate dielectric layer in the p-type device region. The p-type work function metal layer merges in the second spaces.

Abstract: A controlled-release fertilizer including an inside core of water-soluble fertilizer particle and an outer layer coating material, wherein the coating material is a bentonite modified or sodium bentonite modified waterborne polymer; and a preparation method including: weighing the fertilizer core particle and the modified waterborne polymer emulsion according to the amount, preparing a semi-processed coating controlled-release fertilizer by using a coating machine, and placing the semi-processed coating controlled-release fertilizer in an oven for postprocessing to improve the compactness of the film material.

Abstract: Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and in a direction away from the rear surface and perpendicular to the rear surface, a distance between a top surface of an outermost first substructure and a top surface of an adjacent first substructure being less than or equal to 2 ?m; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer; and a second passivation layer located on a surface of the doped conductive layer.

Abstract: Embodiments of the present invention relate to methods, systems, and computer program products for managing a plurality of live comments. A plurality of live comments is obtained for a video, the plurality of live comments being associated with a plurality of fragments in the video, respectively. A plurality of features are extracted from the plurality of live comments, respectively. A knowledge base is generated for the plurality of live comments based on the plurality of features. With these embodiments, the live comments may be managed in an effective way. Further, the knowledge base may provide answers to a user query.

Abstract: A semiconductor device includes a substrate, a pair of semiconductor fins, a dummy fin structure, a gate structure, a plurality of source/drain structures, a crystalline hard mask layer, and an amorphous hard mask layer. The pair of semiconductor fins extend upwardly from the substrate. The dummy fin structure extends upwardly above the substrate and is laterally between the pair of semiconductor fins. The gate structure extends across the pair of semiconductor fins and the dummy fin structure. The source/drain structures are above the pair of semiconductor fins and on either side of the gate structure. The crystalline hard mask layer extends upwardly from the dummy fin and has an U-shaped cross section. The amorphous hard mask layer is in the first hard mask layer, wherein the amorphous hard mask layer having an U-shaped cross section conformal to the U-shaped cross section of the crystalline hard mask layer.

Abstract: A transparent display panel with driving electrode regions, circuit wiring regions, and optically transparent regions is provided. The driving electrode regions are arranged into an array in a first direction and a second direction. An average light transmittance of the circuit wiring regions is less than ten percent, and an average light transmittance of the optically transparent regions is greater than that of the driving electrode regions and the circuit wiring regions. The first direction intersects the second direction. The circuit wiring regions connect the driving electrode regions at intervals, such that each optically transparent region spans among part of the driving electrode regions. The transparent display panel includes first signal lines and second signal lines extending along the circuit wiring regions, and each circuit wiring region is provided with at least one of the first signal lines and at least one of the second signal lines.

Abstract: A boost power factor correction circuit includes: a switch and an inductor coupled to each other; a current sensing device generating a current sensing signal according to a current flowing through the switch; a temperature sensing device coupled to the inductor to generate a temperature sensing signal; and a conversion control circuit operating the switch. The conversion control circuit is an integrated circuit and includes: a shared pin coupled to the temperature sensing device and the current sensing device; and a current sensing circuit and a temperature sensing circuit which sense a multipurpose sensing signal through the shared pin. The multipurpose sensing signal is related to the current sensing signal when the switch is ON and related to the temperature sensing signal when the switch is OFF. The temperature sensing signal is related to an input voltage, an output voltage and an electrical parameter of the temperature sensing device.

Abstract: The present disclosure relates to a photovoltaic cell and a method for manufacturing a photovoltaic cell. The photovoltaic cell includes a substrate including an emitter and a passivation layer stacked in sequence on one side of the substrate. The emitter includes a first plane and a second plane laminated along a thickness direction of the emitter, and part of the emitter between the second plane and the first plane is a first doped layer. Within a unit volume, a rate of change ?C1 between doping concentration of the second plane and doping concentration of the first plane satisfies: ?C1?15%.

Abstract: A system for detecting a surface type of an object includes a driver component, a driver component, and a plurality of photosensitive elements. The surface of the object is divided along a first direction into a plurality of areas, and the driver component sequentially moves one of the plurality of areas to a detection position. The light source component faces the detection position and provides light of a plurality of spectra that are different from one another to illuminate the detection position. The photosensitive elements face different sections of the area at the detection position, to capture detection images of different sections of the area located at the detection position under the light of each of the spectra. One photosensitive axis of the photosensitive elements is parallel to the normal line while another photosensitive axis of the photosensitive elements is between the normal line and the first direction.

Abstract: An input/output port circuit includes an input/output pad, a transistor, and a conductive routing wire. The transistor has a first connection terminal and a second connection terminal. The first connection terminal of the transistor is electrically connected to the input/output pad through a conductive connection wire, and the second connection terminal is electrically connected to another transistor. The conductive routing wire is electrically connected to the first terminal of the transistor. The conductive routing wire is configured to provide a serial resistance, thereby forcing a surge current to flow toward the another transistor when the surge current is inputted in the input/output circuit through the input/output pad.

Abstract: Provided are a solar cell, including: a semiconductor substrate, in which a rear surface of the semiconductor substrate having non-pyramid-shaped microstructures, the non-pyramid-shaped microstructures include two or more first substructures at least partially stacked on one another, and a one-dimensional size of the surface of the outermost first substructure is less than or equal to 45 ?m; a first passivation layer located on a front surface of the semiconductor substrate; first and second tunnel oxide layers located on the non-pyramid-shaped microstructures; first and second doped conductive layers located on a surface of the first and second tunnel oxide layers, the first and second doped conductive layer has different conductive types; a second passivation layer located on a surface of the first and second doped conductive layers; and electrodes formed by penetrating through the second passivation layer to be in contact with the first and second doped conductive layers.