Abstract: A method for generating a lane line, and includes: acquiring three-dimensional point cloud data and two-dimensional lane line data of a target lane, the two-dimensional lane line data being lane line data collected in response to determining that the vehicle is driving in the target lane, and the three-dimensional point cloud data being point cloud data of the surrounding environment of the vehicle collected in response to determining that the vehicle is driving in the target lane; determining a plurality of lane line key points according to the two-dimensional lane line data and the three-dimensional point cloud data; and obtaining a target three-dimensional lane line by connecting the plurality of lane line key points randomly for many times according to attribute information of the plurality of lane line key points and a driving direction of the vehicle.

Abstract: Provided is a photovoltaic solar cell, a solar cell module and a manufacturing process. The photovoltaic solar cell includes a silicon substrate, and a passivation layer located on at least one surface of the silicon substrate. An electrode, an electrode pad and an extension line are printed on at least one surface of the silicon substrate. The electrode includes a busbar and a finger crossed with each other, and the finger is in contact with the silicon substrate. Two ends of the extension line are respectively connected to the busbar and the electrode pad, to reinforce a connection between the busbar and the electrode pad such that the extension line is not in direct contact with the finger, the extension line is in contact with the passivation layer, the electrode pad and the busbar are not in direct contact with the silicon substrate.

Abstract: Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and a one-dimensional size of the top surface of the outermost first substructure is less than or equal to 45 ?m; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer, the doped conductive layer includes a P-type doped conductive layer and an N-type doped conductive layer; and a second passivation layer located on a surface of the doped conductive layer.

Abstract: A neural network is used to place macros on a chip canvas in an integrated circuit (IC) design. The macros are first clustered into multiple macro clusters. Then the neural network generates a probability distribution over locations on a grid and aspect ratios of a macro cluster. The grid represents the chip canvas and is formed by rows and columns of grid cells. The macro cluster is described by at least an area size, aspect ratios, and wire connections. Action masks are generated for respective ones of the aspect ratios to block out a subset of unoccupied grid cells based on design rules that optimize macro placement. Then, by applying the action masks on the probability distribution, a masked probability distribution is generated. Based on the masked probability distribution, a location on the grid is selected for placing the macro cluster with a chosen aspect ratio.

Abstract: A method for forming a semiconductor device includes patterning a substrate to form a strip including a first semiconductor material, forming an isolation region along a sidewall of the strip, an upper portion of the strip extending above the isolation region, forming a dummy structure along sidewalls and a top surface of the upper portion of the strip, performing a first etching process on an exposed portion of the upper portion of the strip to form a first recess, the exposed portion of the strip being exposed by the dummy structure, after performing the first etching process, reshaping the first recess to have a V-shaped bottom surface using a second etching process, wherein the second etching process is selective to first crystalline planes having a first orientation relative to second crystalline planes having a second orientation, and epitaxially growing a source/drain region in the reshaped first recess.

Abstract: Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and in a direction away from the rear surface and perpendicular to the rear surface, a distance between a top surface of an outermost first substructure and a top surface of an adjacent first substructure being less than or equal to 2 ?m; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer; and a second passivation layer located on a surface of the doped conductive layer.

Abstract: An artificial neural network-based method for detecting a surface type of an object includes: receiving a plurality of object images, wherein a plurality of spectra of the plurality of object images are different from one another and each of the object images has one of the spectra; transforming each object image into a matrix, wherein the matrix has a channel value that represents the spectrum of the corresponding object image; and executing a deep learning program by using the matrices to build a predictive model for identifying a target surface type of the object. Accordingly, the speed of identifying the target surface type of the object is increased, further improving the product yield of the object.

Abstract: Provided is a composite encapsulating material and a photovoltaic module encapsulated with the composite encapsulating material, which relate to the technical field of photovoltaic modules. At least a partial area of the composite encapsulating material includes a high insulation material, and the high insulation material includes polyimide, modifier and modified polyimide. The above technical solution can improve an insulation performance of the encapsulating material, reduce a blank area of an edge of the module, reduce a weight of the photovoltaic module, and further reduce comprehensive cost of the photovoltaic module.

Abstract: A resonance element supported by a bearing structure includes a crystal chip and an excitation electrode. The crystal chip includes a main surface having a support surface portion being in contact with the bearing structure. The excitation electrode is disposed on the main surface, has an electrode area, and includes an electrode indentation boundary partly encompassing the support surface portion. The electrode indentation boundary has a first boundary end and a second boundary end being opposite to the first boundary end. The electrode indentation boundary and a reference line segment defined by the first and the second boundary ends form an electrode indentation region having an indentation area. A ratio of the indentation area to the electrode area ranges from 0.05 to 0.2.

Abstract: Techniques related to training and implementing a bidirectional pairing architecture for object detection are discussed. Such techniques include generating a first enhanced feature map for each frame of a video sequence by processing the frames in a first direction, generating a second enhanced feature map for frame by processing the frames in a second direction opposite the first, and determining object detection information for each frame using the first and second enhanced feature map for the frame.

Abstract: A method of a power user classification based on distributed K-means, a storage medium and a classification device are provided. The method includes: obtaining, by N load aggregators, power consumption data of power users managed by respective load aggregators; performing, by each load aggregator, a normalization operation on time series load data of the power users managed by the load aggregator; forming a N×N dimensional adjacency matrix A; performing K-means clustering on normalized time series load data, to obtain the respective centroids and user groups characterized by the respective centroids; sharing, by the respective load aggregators, the centroids and the number of users under the respective centroids based on the adjacency matrix A, and obtaining consistent centroids by multiple load aggregators; after an overall iteration ends, obtaining, by the respective load aggregators, the consistent centroids consistent with the K-means centroid based on global data, to realize user classification.

Abstract: A crystal device includes a bearing base, an integrated chip and a conductive adhesive unit. The bearing base includes a conductive seat. The integrated chip includes a principal reference plane facing the conductive seat, and having a first major axis. The conductive adhesive unit has a second major axis and an aspect ratio, and is at least partly disposed between the conductive seat and the integrated chip. The aspect ratio ranges from 1.1 to 1.9. The principal reference plane further has a perpendicular projection straight line defined according to the second major axis. A practical angle is included by the first perpendicular projection straight line and the first major axis, and ranges from 0 degree to 90 degrees.

Abstract: Provided is a photovoltaic solar cell, a solar cell module and a manufacturing process. The photovoltaic solar cell includes a silicon substrate, and a passivation layer located on at least one surface of the silicon substrate. An electrode, an electrode pad and an extension line are printed on at least one surface of the silicon substrate. The electrode includes a busbar and a finger crossed with each other, and the finger is in contact with the silicon substrate. Two ends of the extension line are respectively connected to the busbar and the electrode pad, and the extension line is in contact with the silicon substrate.

Abstract: Multiple-patterning techniques described herein enable forming fin structures of a semiconductor device in a manner that enables decreased fin-to-fin spacing of the fin structures while providing precise control over etching depth of the fin structures. In some implementations, an etch operation is performed to form a pattern in one or more mask layers that is used to etch a substrate to form the fin structures. The etch operation includes an advanced pulsing technique, in which a high-frequency radio frequency (RF) source and a low-frequency RF source are pulsed. Pulsing the high-frequency RF source and the low-frequency RF source in the etch operation reduces consumption of a thickness of the one or more mask layers which increases the aspect ratio of the pattern. This enables deeper etching of the substrate when forming the fin structures, which reduces the likelihood of under etching.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin structure and a second fin structure over a semiconductor substrate and a first epitaxial structure over the first fin structure. The semiconductor device structure also includes a second epitaxial structure over the second fin structure. The semiconductor device structure further includes a dielectric fin over the semiconductor substrate. The dielectric fin is between the first fin structure and the second fin structure. The dielectric fin has an inner portion and a protective layer. The protective layer extends along sidewalls and a bottom of the inner portion, and the protective layer has a dielectric constant higher than that of the inner portion.

Abstract: A vehicular image pickup device includes an image capturing unit and a processing unit. The image capturing unit captures a plurality of driving images sequentially. The driving images each include an object image. The processing unit performs an image analysis on two of the plurality of driving images to obtain a variance of the object image and sets a shutter speed of the image capturing unit according to the variance.

Abstract: Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and in a direction away from the rear surface and perpendicular to the rear surface, a distance between a top surface of an outermost first substructure and a top surface of an adjacent first substructure being less than or equal to 2 ?m; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer; and a second passivation layer located on a surface of the doped conductive layer.

Abstract: Embodiments described herein relate to a method for patterning a doping layer, such as a lanthanum containing layer, used to dope a high-k dielectric layer in a gate stack of a FinFET device for threshold voltage tuning. A blocking layer may be formed between the doping layer and a hard mask layer used to pattern the doping layer. In an embodiment, the blocking layer may include or be aluminum oxide (AlOx). The blocking layer can prevent elements from the hard mask layer from diffusing into the doping layer, and thus, can improve reliability of the devices formed. The blocking layer can also improve a patterning process by reducing patterning induced defects.

Abstract: A structure and formation method of a semiconductor device is provided. The semiconductor device structure includes an epitaxial structure over a semiconductor substrate. The semiconductor device structure also includes a dielectric fin over the semiconductor substrate. The dielectric fin extends upwards to exceed a bottom surface of the epitaxial structure. The dielectric fin has a dielectric structure and a protective shell, and the protective shell extends along sidewalls and a bottom of the dielectric structure. The protective shell has a first average grain size, and the dielectric structure has a second average grain size. The first average grain size is larger than the second average grain size.

Abstract: An artificial neural network-based method for selecting a surface type of an object includes receiving at least one object image, performing surface type identification on each of the at least one object image by using a first predictive model to categorize the object image to one of a first normal group and a first abnormal group, and performing surface type identification on each output image in the first normal group by using a second predictive model to categorize the output image to one of a second normal group and a second abnormal group.