Patents by Inventor Patrick Fleming
Patrick Fleming has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210264042Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to determine a secure memory region for a transaction, the secure memory region associated with a security association context to perform one or more of an encryption/decryption operation and an authentication operation for the transaction, perform one or more of the encryption/decryption operation and the authentication operation for the transaction based on the security association context, and cause communication of the transaction.Type: ApplicationFiled: April 22, 2021Publication date: August 26, 2021Applicant: INTEL CORPORATIONInventors: BRIAN S. HAUSAUER, Lokpraveen B. Mosur, Tony Hurson, Patrick Fleming, Adrian R. Pearson
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Publication number: 20210257999Abstract: A flip-flop and latch circuit is disclosed. The circuit includes a single-input inverter, a dual-input inverter, a single-input tri-state inverter, a dual-input tri-state inverter, and two single-event transient (SET) filters. The single-input tri-state inverter receives an input signal D. The dual-input tri-state inverter includes a first input, a second input and an output, wherein the first input receives output signals from the dual-input inverter and the second input receives output signals from the dual-input inverter via the first SET filter. The output of the dual-input tri-state inverter sends output signals to a first input of the dual-input inverter and a second input of the dual-input inverter via the second SET filter.Type: ApplicationFiled: May 4, 2021Publication date: August 19, 2021Inventors: Bin Li, David Bostedo, Landon J. Caley, Nicholas J. Chiolino, Patrick Fleming, David D. Moser
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Patent number: 11080202Abstract: A computing apparatus, including: a processor; a pointer to a counter memory location; and a lazy increment counter engine to: receive a stimulus to update the counter; and lazy increment the counter including issuing a weakly-ordered increment directive to the pointer.Type: GrantFiled: September 30, 2017Date of Patent: August 3, 2021Assignee: Intel CorporationInventors: Niall D. McDonnell, Christopher MacNamara, John J. Browne, Andrew Cunningham, Brendan Ryan, Patrick Fleming, Namakkal N. Venkatesan, Bruce Richardson, Tomasz Kantecki, Sean Harte, Pierre Laurent
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Patent number: 11042657Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to de determine a secure memory region for a transaction, the secure memory region associated with a security association context to perform one or more of an encryption/decryption operation and an authentication operation for the transaction, perform one or more of the encryption/decryption operation and the authentication operation for the transaction based on the security association context, and cause communication of the transaction.Type: GrantFiled: September 30, 2017Date of Patent: June 22, 2021Assignee: INTEL CORPORATIONInventors: Brian S. Hausauer, Lokpraveen B. Mosur, Tony Hurson, Patrick Fleming, Adrian R. Pearson
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Patent number: 11024985Abstract: The Insulated External Parking Bushing provides a means of safely securing the loadbreak elbow connector by bypassing the damaged components and securing the loadbreak elbow connector from the outside of the elbow and covering the exposed conductive material, and then placed onto the equipment's parking stand. The Insulated External Parking Bushing is the addition of a supporting device to a standard loadbreak elbow connector which hugs the loadbreak elbow connector. The Insulated External Parking Bushing is crafted from injection molds in one solid piece from dielectrically rated plastics or rubber, with the parking bracket identical to existing insulated parking bushings, with variant molds adding skirts for higher voltages.Type: GrantFiled: February 6, 2020Date of Patent: June 1, 2021Inventors: Shad Patrick Fleming, Anthony Christopher Simmons
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Patent number: 11018871Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.Type: GrantFiled: March 30, 2018Date of Patent: May 25, 2021Assignee: Intel CorporationInventors: Kapil Sood, Naveen Lakkakula, Hari K. Tadepalli, Lokpraveen Mosur, Rajesh Gadiyar, Patrick Fleming
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Patent number: 10998890Abstract: A flip-flop circuit is disclosed. The flip-flop circuit includes a single-input inverter, a dual-input inverter, a single-input tri-state inverter, a dual-input tri-state inverter, and two single-event transient (SET) filters. The single-input tri-state inverter receives an input signal D. The dual-input tri-state inverter includes a first input, a second input and an output, wherein the first input receives output signals from the dual-input inverter and the second input receives output signals from the dual-input inverter via the first SET filter. The output of the dual-input tri-state inverter sends output signals to a first input of the dual-input inverter and a second input of the dual-input inverter via the second SET filter. The single-input inverter receives inputs from the dual-input inverter to provide an output signal Q for the flip-flop circuit.Type: GrantFiled: December 29, 2017Date of Patent: May 4, 2021Assignee: BAE Systems Information and Electronic Systems Integration Inc.Inventors: Bin Li, David Bostedo, Landon J. Caley, Nicholas J. Chiolino, Patrick Fleming, David D. Moser
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Publication number: 20210117191Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to control execution of tasks in a computing system. The methods, apparatus, systems and articles of manufacture include at least one storage device and at least one processor to, execute instructions to at least obtain a request to perform an inverse operation on a data flow, the data flow previously transformed during a forward operation, determine a first processor core that executed the forward operation, the data flow including an identifier of the first processor core, and transmit the data flow to a second processor core to perform the inverse operation.Type: ApplicationFiled: December 23, 2020Publication date: April 22, 2021Inventors: Andrew Cunningham, Patrick Fleming, Naveen Lakkakula, Richard Guerin, Charitra Sankar, Stephen Doyle, Ralph Castro, John Browne
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Publication number: 20210117360Abstract: Examples described herein include a system comprising: a processing unit package comprising: at least one core and at least one offload processing device communicatively coupled inline between the at least one core and a network interface controller, the at least one offload processing device configurable to perform packet processing. In some examples, the at least one offload processing device is to allow mapping of packet processing pipeline stages of networking applications among software running on the at least one core and the at least one offload processing device to permit flexible entry, exit, and re-entry points among the at least one core and the at least one offload processing device.Type: ApplicationFiled: December 26, 2020Publication date: April 22, 2021Inventors: Patrick G. KUTCH, Andrey CHILIKIN, Niall D. MCDONNELL, Brian A. KEATING, Naveen LAKKAKULA, Ilango S. GANGA, Venkidesh KRISHNA IYER, Patrick FLEMING, Lokpraveen MOSUR
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Publication number: 20210095482Abstract: A work platform includes a frame and a deck. The frame has a plurality of frame members that are interconnected. The frame members define a trough that extends a length of the frame and is configured to accommodate a refueling boom of an aircraft such that the refueling boom extends through the frame within the trough. The deck is mounted to the frame to provide a stand. The deck includes a first deck panel and a second deck panel spaced apart from each other to define an opening to the trough.Type: ApplicationFiled: September 27, 2019Publication date: April 1, 2021Applicant: THE BOEING COMPANYInventors: Joshua Patrick Fleming, Brian Lam
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Publication number: 20210034546Abstract: There is disclosed a computing apparatus, including: a memory; a memory encryption controller to encrypt at least a region of the memory; and a network interface to communicatively couple the computing apparatus to a remote host; wherein the memory encryption controller is configured to send an encrypted packet decryptable via an encryption key directly from the memory to the remote host via the network interface, bypassing a network protocol stack.Type: ApplicationFiled: June 29, 2018Publication date: February 4, 2021Inventors: Weigang Li, Changzheng Wei, John Barry, Maryam Tahhan, Jonas Alexander Svennebring, Niall D. McDonnell, Alexander Leckey, Patrick Fleming, Christopher MacNamara, John Joseph Browne
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Publication number: 20210014203Abstract: Methods, systems, and use cases for one-touch inline cryptographic data security are discussed, including an edge computing device with a network communications circuitry (NCC), an enhanced DMA engine coupled to a memory device and including a cryptographic engine, and processing circuitry configured to perform a secure exchange with a second edge computing device to negotiate a shared symmetric encryption key, based on a request for data. An inline encryption command for communication to the enhanced DMA engine is generated. The inline encryption command includes a first address associated with a storage location storing the data, a second address associated with a memory location in the memory device, and the shared symmetric encryption key. The data is retrieved from the storage location using the first address, the data is encrypted using the shared symmetric encryption key, and the encrypted data is stored in the memory location using the second address.Type: ApplicationFiled: September 25, 2020Publication date: January 14, 2021Inventors: Kshitij Arun Doshi, Uzair Qureshi, Lokpraveen Mosur, Patrick Fleming, Stephen Doyle, Brian Andrew Keating, Ned M. Smith
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Patent number: 10680643Abstract: In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match.Type: GrantFiled: March 8, 2019Date of Patent: June 9, 2020Assignee: Intel CorporationInventors: David K. Cassetti, Stephen T. Palermo, Sailesh Bissessur, Patrick Fleming, Lokpraveen Mosur, Smita Kumar, Pradnyesh S. Gudadhe, Naveen Lakkakula, Brian Will, Atul Kwatra
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Publication number: 20200176896Abstract: The Insulated External Parking Bushing provides a means of safely securing the loadbreak elbow connector by bypassing the damaged components and securing the loadbreak elbow connector from the outside of the elbow and covering the exposed conductive material, and then placed onto the equipment's parking stand. The Insulated External Parking Bushing is the addition of a supporting device to a standard loadbreak elbow connector which hugs the loadbreak elbow connector. The Insulated External Parking Bushing is crafted from injection molds in one solid piece from dielectrically rated plastics or rubber, with the parking bracket identical to existing insulated parking bushings, with variant molds adding skirts for higher voltages.Type: ApplicationFiled: February 6, 2020Publication date: June 4, 2020Inventors: Shad Patrick Fleming, Anthony Christopher Simmons
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Patent number: 10624246Abstract: A system for limiting or diminishing current to unpowered Serializer/Deserializer (SerDes) circuitry is provided. The system comprises receiver input termination circuitry and a cold spare circuitry. The receiver input circuitry comprises a termination resistor and an N-type metal oxide silicon field effect transistor (MOSFET). The cold spare circuitry comprises a first MOSFET and a second MOSFET. When the system is powered on, an input current flows to the receiver input termination circuit to be discharged by the N-type MOSFET which is electrically connected to a ground. When the system is powered off, the input current flows to the cold spare circuitry to discharge the input current. Discharging electrons between the first MOSFET and the second MOSFET depends on the polarity of an accumulated voltage.Type: GrantFiled: August 3, 2017Date of Patent: April 14, 2020Assignee: BAE Systems Information and Electronic Systems integration Inc.Inventors: Bin Li, Lloyd Brown, Patrick Fleming, Jason F. Ross
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Patent number: 10606751Abstract: An input/output (I/O) device arranged to receive an information element including a payload, determine control information from the information element, classify the information element based on the control information, and issue a write to one of a plurality of computer-readable media based on the classification of the information element, the write to cause the payload to be written to the one of the plurality of computer-readable media.Type: GrantFiled: July 1, 2016Date of Patent: March 31, 2020Assignee: INTEL CORPORATIONInventors: Andrew Cunningham, Mark D. Gray, Alexander Leckey, Chris MacNamara, Stephen T. Palermo, Pierre Laurent, Niall D. McDonnell, Tomasz Kantecki, Patrick Fleming
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Patent number: 10601738Abstract: Technologies for buffering received network packet data include a compute device with a network interface controller (NIC) configured to determine a packet size of a network packet received by the NIC and identify a preferred buffer size between a small buffer and a large buffer. The NIC is further configured to select, from the descriptor, a buffer pointer based on the preferred buffer size, wherein the buffer pointer comprises one of a small buffer pointer corresponding to a first physical address in memory allocated to the small buffer or a large buffer pointer corresponding to a second physical address in memory allocated to the large buffer. Additionally, the NIC is configured to store at least a portion of the network packet in the memory based on the selected buffer pointer. Other embodiments are described herein.Type: GrantFiled: June 30, 2018Date of Patent: March 24, 2020Assignee: Intel CorporationInventors: Bruce Richardson, Chris MacNamara, Patrick Fleming, Tomasz Kantecki, Ciara Loftus, John J. Browne, Patrick Connor
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Publication number: 20190363699Abstract: A flip-flop circuit is disclosed. The flip-flop circuit includes a single-input inverter, a dual-input inverter, a single-input tri-state inverter, a dual-input tri-state inverter, and two single-event transient (SET) filters. The single-input tri-state inverter receives an input signal D. The dual-input tri-state inverter includes a first input, a second input and an output, wherein the first input receives output signals from the dual-input inverter and the second input receives output signals from the dual-input inverter via the first SET filter. The output of the dual-input tri-state inverter sends output signals to a first input of the dual-input inverter and a second input of the dual-input inverter via the second SET filter. The single-input inverter receives inputs from the dual-input inverter to provide an output signal Q for the flip-flop circuit.Type: ApplicationFiled: December 29, 2017Publication date: November 28, 2019Inventors: Bin Li, David Bostedo, Landon J. Caley, Nicholas J. Chiolino, Patrick Fleming, David D. Moser
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Publication number: 20190356589Abstract: An apparatus, a method and a computer program for generating data packets according to a transport protocol from an application buffer comprising a plurality of data streams is provided. The apparatus comprises an input circuit configured to receive metadata comprising at least one of information about data packet types supported by the transport protocol, information about an offset and a length of the supported data packet types, and information about possible stream header start positions, possible payload start positions and possible offsets in the data streams. Further, the apparatus comprises a parsing circuit configured to identify offsets in an application buffer as possible segmentation points based on the metadata, to segment the application buffer at the possible segmentation points into segments for data packets, and to generate data packets according to the transport protocol based on the segments.Type: ApplicationFiled: May 17, 2019Publication date: November 21, 2019Inventors: Eliel Louzoun, Manasi Deval, Stephen Doyle, Noam Elati, Patrick Fleming, Gregory Bowers
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Patent number: D904846Type: GrantFiled: September 16, 2019Date of Patent: December 15, 2020Inventors: Shad Patrick Fleming, Anthony Christopher Simmons