Patents by Inventor Patrick Fleming

Patrick Fleming has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190273507
    Abstract: In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match.
    Type: Application
    Filed: March 8, 2019
    Publication date: September 5, 2019
    Inventors: David K. CASSETTI, Stephen T. PALERMO, Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL, Atul KWATRA
  • Publication number: 20190207624
    Abstract: A compression scheme can be selected for an input data stream based on characteristics of the input data stream. For example, when the input data stream is searched for pattern matches, input stream characteristics used to select a compression scheme can include one or more of: type and size of an input stream, a length of a pattern, a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, a gap between two pattern matches (including different or same patterns), standard deviation of a length of a pattern, standard deviation of a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, or standard deviation of a gap between two pattern matches. Criteria can be established whereby one or more characteristics are used to select a particular encoding scheme.
    Type: Application
    Filed: March 8, 2019
    Publication date: July 4, 2019
    Inventors: David K. CASSETTI, Stephen T. PALERMO, Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL, Atul KWATRA
  • Publication number: 20190123763
    Abstract: A compression engine includes sets of independent search engines. The sets of independent search engines concurrently perform searches for a longest match in a stream of uncompressed data. The searches are distributed amongst the sets of independent search engines on byte boundaries to load balance the use of the search engines.
    Type: Application
    Filed: December 20, 2018
    Publication date: April 25, 2019
    Inventors: Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, David K. CASSETTI, Stephen T. PALERMO, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL
  • Publication number: 20190102312
    Abstract: A computing apparatus, including: a processor; a pointer to a counter memory location; and a lazy increment counter engine to: receive a stimulus to update the counter; and lazy increment the counter including issuing a weakly-ordered increment directive to the pointer.
    Type: Application
    Filed: September 30, 2017
    Publication date: April 4, 2019
    Inventors: Niall D. McDonnell, Christopher MacNamara, John J. Browne, Andrew Cunningham, Brendan Ryan, Patrick Fleming, Namakkal N. Venkatesan, Bruce Richardson, Tomasz Kantecki, Sean Harte, Pierre Laurent
  • Publication number: 20190102568
    Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to de determine a secure memory region for a transaction, the secure memory region associated with a security association context to perform one or more of an encryption/decryption operation and an authentication operation for the transaction, perform one or more of the encryption/decryption operation and the authentication operation for the transaction based on the security association context, and cause communication of the transaction.
    Type: Application
    Filed: September 30, 2017
    Publication date: April 4, 2019
    Inventors: BRIAN S. HAUSAUER, LOKPRAVEEN B. MOSUR, TONY HURSON, PATRICK FLEMING, ADRIAN R. PEARSON
  • Publication number: 20190104022
    Abstract: A data center orchestrator, including: a hardware platform; a host fabric interface to communicatively couple the orchestrator to a network; an orchestrator engine to provide a data center orchestration function; and a data structure, including a network function virtualization definition (NFVD) instance, the NFVD instance including a definition for instantiating a virtual network function (VNF) on a host platform, including a telemetry fingerprint policy description (TFPD) for the VNF, wherein the TFPD includes information to collect telemetry data selected from a set of available telemetry data for the host platform.
    Type: Application
    Filed: September 29, 2017
    Publication date: April 4, 2019
    Applicant: Intel Corporation
    Inventors: Damien Power, Patrick Fleming, Michael J. McGrath, Jonathan Kenny, David Hunt
  • Publication number: 20190050347
    Abstract: Systems, apparatus, and/or methods to provide memory data protection. In one example, authenticated encryption may be enhanced via a modification to an authentication code that is associated with encrypted data. The authentication code may be modified, for example, with a nonce value generated for a particular write to memory Decrypted data, generated from the encrypted data, may then be validated based on a modified authentication code. Moreover, data freshness control for data stored in the memory may be provided based on iterative authentication and re-encryption. In addition, a counter used to provide a nonce value may be managed to reduce a size of the counter and/or a growth of the counter.
    Type: Application
    Filed: July 25, 2018
    Publication date: February 14, 2019
    Applicant: Intel Corporation
    Inventors: Anatoli Bolotov, Mikhail Grinchuk, David M. Durham, Patrick Fleming
  • Publication number: 20190044893
    Abstract: Technologies for buffering received network packet data include a compute device with a network interface controller (NIC) configured to determine a packet size of a network packet received by the NIC and identify a preferred buffer size between a small buffer and a large buffer. The NIC is further configured to select, from the descriptor, a buffer pointer based on the preferred buffer size, wherein the buffer pointer comprises one of a small buffer pointer corresponding to a first physical address in memory allocated to the small buffer or a large buffer pointer corresponding to a second physical address in memory allocated to the large buffer. Additionally, the NIC is configured to store at least a portion of the network packet in the memory based on the selected buffer pointer. Other embodiments are described herein.
    Type: Application
    Filed: June 30, 2018
    Publication date: February 7, 2019
    Inventors: Bruce Richardson, Chris MacNamara, Patrick Fleming, Tomasz Kantecki, Ciara Loftus, John J. Browne, Patrick Connor
  • Publication number: 20190044724
    Abstract: A security accelerator device stores a first credential that is uniquely associated with the individual security accelerator device and represents a root of trust to a trusted entity. The device establishes a cryptographic trust relationship with a client entity that is based on the root of trust, the cryptographic trust relationship being represented by a second credential. The device receives and store a secret credential of the client entity, which is received via communication secured by the second credential. Further, the device executes a cryptographic computation using the secret client credential on behalf of the client entity to produce a computation result.
    Type: Application
    Filed: March 30, 2018
    Publication date: February 7, 2019
    Inventors: Kapil Sood, Naveen Lakkakula, Hari K. Tadepalli, Lokpraveen Mosur, Rajesh Gadiyar, Patrick Fleming
  • Publication number: 20190045675
    Abstract: A system for limiting or diminishing current to unpowered Serializer/Deserializer (SerDes) circuitry is provided. The system comprises receiver input termination circuitry and a cold spare circuitry. The receiver input circuitry comprises a termination resistor and an N-type metal oxide silicon field effect transistor (MOSFET). The cold spare circuitry comprises a first MOSFET and a second MOSFET. When the system is powered on, an input current flows to the receiver input termination circuit to be discharged by the N-type MOSFET which is electrically connected to a ground. When the system is powered off, the input current flows to the cold spare circuitry to discharge the input current. Discharging electrons between the first MOSFET and the second MOSFET depends on the polarity of an accumulated voltage.
    Type: Application
    Filed: August 3, 2017
    Publication date: February 7, 2019
    Inventors: Bin Li, Lloyd Brown, Patrick Fleming, Jason F. Ross
  • Publication number: 20190044879
    Abstract: Technologies for reordering network packets on egress include a network interface controller (NIC) configured to associate a received network packet with a descriptor, generate a sequence identifier for the received network packet, and insert the generated sequence identifier into the associated descriptor. The NIC is further configured to determine whether the received network packet is to be transmitted from a compute device associated with the NIC to another compute device and insert, in response to a determination that the received network packet is to be transmitted to the another compute device, the descriptor into a transmission queue of descriptors. Additionally, the NIC is configured to transmit the network packet based on position of the descriptor in the transmission queue of descriptors based on the generated sequence identifier. Other embodiments are described herein.
    Type: Application
    Filed: June 29, 2018
    Publication date: February 7, 2019
    Inventors: Bruce Richardson, Andrew Cunningham, Alexander J. Leckey, Brendan Ryan, Patrick Fleming, Patrick Connor, David Hunt, Andrey Chilikin, Chris MacNamara
  • Publication number: 20190044812
    Abstract: Technologies for dynamically selecting resources for virtual switching include a network appliance configured to identify a present demand on processing resources of the network appliance that are configured to process data associated with network packets received by the network appliance. Additionally, the network appliance is configured to determine a present capacity of one or more acceleration resources of the network appliance and determine a virtual switch operation mode based on the present demand and the present capacity of the acceleration resources, wherein the virtual switch operation mode indicates which of the acceleration resources are to be enabled. The network appliance is additionally configured to configure a virtual switch of the network appliance to operate as a function of the determined virtual switch operation mode and assign acceleration resources of the network appliance as a function of the determined virtual switch operation mode. Other embodiments are described herein.
    Type: Application
    Filed: September 13, 2018
    Publication date: February 7, 2019
    Inventors: Ciara Loftus, Chris MacNamara, John J. Browne, Patrick Fleming, Tomasz Kantecki, John Barry, Patrick Connor
  • Publication number: 20190042305
    Abstract: Technologies for moving workloads between hardware queue managers include a compute device. The compute device includes a set of hardware queue managers. Each hardware queue manager is to manage one or more queues of queue elements and each queue element is indicative of a data set to be operated on by a thread. The compute device also includes circuitry to execute a workload with a first hardware queue manager of the set of hardware queue managers, determine whether a workload migration condition is present, determine whether a second hardware queue manager of the set of hardware queue managers has sufficient capacity to manage a set of queues associated with the workload, move, in response to a determination that the second hardware queue manager does have sufficient capacity, the workload to the second hardware queue manager, and reduce, after the move of the workload to the second hardware queue manager, a power usage of the first hardware queue manager.
    Type: Application
    Filed: March 6, 2018
    Publication date: February 7, 2019
    Inventors: Niall D. McDonnell, Debra Bernstein, Patrick Fleming, Chris Macnamara, Andrew Cunningham, Bruce Richardson, Brendan N. Ryan
  • Publication number: 20190044860
    Abstract: Technologies for providing adaptive polling of packet queues include a compute device. The compute device includes a network interface controller and a compute engine that includes a set of cores and a memory that includes a queue to store packets received by the network interface controller. The compute engine is configured to determine a predicted time period for the queue to receive packets without overflowing, execute, during the time period and with a core that is assigned to periodically poll the queue for packets, a workload, and poll, with the assigned core, the queue to remove the packets from the queue. Other embodiments are also described and claimed.
    Type: Application
    Filed: June 18, 2018
    Publication date: February 7, 2019
    Inventors: Chris MacNamara, John Browne, Tomasz Kantecki, Ciara Loftus, John Barry, Patrick Connor, Patrick Fleming
  • Publication number: 20180316124
    Abstract: The Insulated External Parking Bushing provides a means of safely securing the loadbreak elbow connector by bypassing the damaged components and securing the loadbreak elbow connector from the outside of the elbow and covering the exposed conductive material, and then placed onto the equipment's parking stand. The Insulated External Parking Bushing is the addition of a supporting device to a standard loadbreak elbow connector which hugs the loadbreak elbow connector. The Insulated External Parking Bushing is crafted from injection molds in one solid piece from dielectrically rated plastics or rubber, with the parking bracket identical to existing insulated parking bushings, with variant molds adding skirts for higher voltages.
    Type: Application
    Filed: April 27, 2018
    Publication date: November 1, 2018
    Inventors: Shad Patrick Fleming, Anthony Christopher Simmons
  • Publication number: 20180152317
    Abstract: Technologies for an accelerator interface over Ethernet are disclosed. In the illustrative embodiment, a network interface controller of a compute device may receive a data packet. If the network interface controller determines that the data packet should be pre-processed (e.g., decrypted) with a remote accelerator device, the network interface controller may encapsulate the data packet in an encapsulating network packet and send the encapsulating network packet to a remote accelerator device on a remote compute device. The remote accelerator device may pre-process the data packet (e.g., decrypt the data packet) and send it back to the network interface controller. The network interface controller may then send the pre-processed packet to a processor of the compute device.
    Type: Application
    Filed: September 29, 2017
    Publication date: May 31, 2018
    Inventors: Chih-Jen Chang, Brad Burres, Jose Niell, Dan Biederman, Robert Cone, Pat Wang, Kenneth Keels, Patrick Fleming
  • Publication number: 20180004662
    Abstract: An input/output (I/O) device arranged to receive an information element including a payload, determine control information from the information element, classify the information element based on the control information, and issue a write to one of a plurality of computer-readable media based on the classification of the information element, the write to cause the payload to be written to the one of the plurality of computer-readable media.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 4, 2018
    Applicant: INTEL CORPORATION
    Inventors: ANDREW CUNNINGHAM, MARK D. GRAY, ALEXANDER LECKEY, CHRIS MACNAMARA, STEPHEN T. PALERMO, PIERRE LAURENT, NIALL D. MCDONNELL, TOMASZ KANTECKI, PATRICK FLEMING
  • Patent number: 8928348
    Abstract: A current-mode-logic gate designed to have a first electronic path and a second electronic path. Each electronic path has a pair of transistors. The second electronic path is physically separated and identical to the first electronic path. In operation, a first input signal is transmitted through the first electronic path of the current-mode-logic gate to produce a first output signal. Similarly, a second input signal is transmitted through the second electronic path of the current-mode-logic gate to produce a second output signal.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: January 6, 2015
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Patrick Fleming, Bin Li, Lloyd Brown
  • Patent number: 8547178
    Abstract: A ring oscillator is disclosed. The ring oscillator includes a first tri-path inverter, a second tri-path inverter and a third tri-path inverter. The second tri-path inverter is connected to the first tri-path inverter. The third tri-path inverter is connected to the first and second tri-path inverters to provide feedback for oscillations.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: October 1, 2013
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventors: Neil E. Wood, Patrick Fleming, Andrew T. Kelly, Bin Li, Daniel M. Pirkl
  • Publication number: 20090228942
    Abstract: This system (20, 40, 50, 60) manages audiovisual programs (CH1, CH2) in a telecommunications network, each program being broadcast by a source (30) to receivers (10) that are subscribed to a broadcast group. It includes: means (60) for interpreting a sequence of audiovisual programs programmed by a user of a receiver in the form of a succession of commands to change program, a command to change program being conditional on a preceding program in said sequence ending; means (40) for detecting a predetermined event (EV) corresponding to the start of the first program in the sequence, or to the end of one of said programs in the sequence; and means (20) for sending said receiver (10), after said event is detected, a first message (ZAP) adapted to trigger sending by said receiver (10) to said management system (20) of a first request (AB) to subscribe to a broadcast group for the first program in the sequence, or the program in said sequence following the program for which the end has been detected.
    Type: Application
    Filed: March 12, 2007
    Publication date: September 10, 2009
    Applicant: FRANCE TELECOM
    Inventors: Herve Brelivet, Patrick Fleming