Patents by Inventor Tomas G. Akenine-Moller

Tomas G. Akenine-Moller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10621691
    Abstract: Techniques related to graphics rendering including techniques for compression and/or decompression of graphics data by use of indexed subsets are described. In one example, compression in graphics rendering may include determining a plurality of color values associated with individual pixels of a tile of pixels, generating a subset of the plurality of color values such that the subset of the plurality of color values include one or more distinct color values from the plurality of color values, associating an index value with each color value of the subset of the plurality of color values, determining, for each of the individual pixels, an associated pixel index value to generate a plurality of pixel index value associated with the individual pixels of the tile of pixels, storing, in memory, graphics data including the subset of the plurality of color values, the associated index values, and the plurality of pixel values.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: April 14, 2020
    Assignee: INTEL CORPORATION
    Inventors: Prasoonkumar Surti, Tomas G. Akenine-Moller, Jon N. Hasselgren, Carl J. Munkberg, Jim. K. Nilsson
  • Patent number: 10600231
    Abstract: Embodiments provide for a graphics processing apparatus including a graphics processing unit having bounding volume logic to operate on a compressed bounding volume hierarchy, wherein each bounding volume node stores a parent bounding volume and multiple child bounding volumes that are encoded relative to the parent bounding volume.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: March 24, 2020
    Assignee: INTEL CORPORATION
    Inventors: Sven Woop, Carsten Benthin, Rasmus Barringer, Tomas G. Akenine-Moller
  • Patent number: 10580189
    Abstract: An apparatus and method for efficient ray tracing. For example, one embodiment of an apparatus comprises: a general purpose processor to generate a plurality of ray streams; a first hardware queue to receive the ray streams generated by the general purpose processor; a graphics processing unit (GPU) comprising a plurality of execution units (EUs) to process the ray streams from the first hardware queue; a second hardware queue to store graphics processing jobs submitted by the GPU; the general purpose processor to process the jobs submitted by the GPU and share results with the GPU.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: March 3, 2020
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Ingo Wald
  • Patent number: 10565775
    Abstract: An apparatus and method for load balancing in a ray tracing architecture. For example, one embodiment of a graphics processing apparatus comprises: an intersection unit engine to test a plurality of rays against a plurality of primitives to identify a closest primitive that each ray intersects; an intersection unit queue to store work to be performed by the intersection unit engine; and an intersection unit offload engine to monitor the intersection unit queue to determine a pressure level on the intersection unit engine, the intersection unit offload engine to responsively offload some of the work in the intersection unit queue to intersection program code executed on one or more execution units of the graphics processor.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: February 18, 2020
    Assignee: Intel Corporation
    Inventor: Tomas G. Akenine-Moller
  • Patent number: 10540808
    Abstract: Methods and apparatus relating to techniques for provision of hierarchical Z-Culling (HiZ) optimization for texture-dependent discard operations are described. In an embodiment, a processor performs one or more operations (such as HiZ or Hierarchical Stencil test) on depth data of an image tile in response to a determination that texture space bounds of the image tile is fully opaque. The processor performs the one or more operations regardless of whether a discard operation is enabled. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: January 21, 2020
    Assignee: Intel Corporation
    Inventors: Magnus Andersson, Robert M. Toth, Jon N Hasselgren, Tomas G. Akenine-Moller
  • Publication number: 20190347764
    Abstract: An apparatus and method are described for a non-uniform rasterizer. For example, one embodiment of an apparatus comprises: a graphics processor to process graphics data and render images using the graphics data; and a non-uniform rasterizer within the graphics processor to determine different resolutions to be used for different regions of an image, the non-uniform rasterizer to receive a plurality of polygons to be rasterized and to responsively rasterize the polygons in accordance with the different resolutions.
    Type: Application
    Filed: July 29, 2019
    Publication date: November 14, 2019
    Inventors: Tomas G. AKENINE-MOLLER, Robert M. TOTH, Bjorn JOHNSSON, Jon N. HASSELGREN
  • Patent number: 10466769
    Abstract: In accordance with some embodiments, the knowledge that a capped frame time is used can be exploited to reduce power consumption. Generally a capped frame time is a pre-allocated amount of time to apply power for rendering in graphics processing. Generally the frame time involves the application of power and some down time in which only idle power is applied pending the next frame time. By making better use of that down time, power consumption reductions can be achieved in some embodiments.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: November 5, 2019
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Bjorn Johnsson, Magnus Andersson, Jim K. Nilsson, Robert M. Toth, Carl J. Munkberg, Jon N. Hasselgren
  • Publication number: 20190317599
    Abstract: A virtual reality apparatus and method are described.
    Type: Application
    Filed: June 26, 2019
    Publication date: October 17, 2019
    Inventors: Tomas G. AKENINE-MOLLER, Robert M. TOTH, Ingo WALD, Aditya S. YANAMANDRA, Brent E. INSKO, Michael APODACA, Prasoonkumar SURTI
  • Patent number: 10445859
    Abstract: An apparatus and method are described for a non-uniform rasterizer. For example, one embodiment of an apparatus comprises: a graphics processor to process graphics data and render images using the graphics data; and a non-uniform rasterizer within the graphics processor to determine different resolutions to be used for different regions of an image, the non-uniform rasterizer to receive a plurality of polygons to be rasterized and to responsively rasterize the polygons in accordance with the different resolutions.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: October 15, 2019
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Robert M. Toth, Bjorn Johnsson, Jon N. Hasselgren
  • Publication number: 20190259195
    Abstract: Embodiments provide for a graphics processing apparatus including a graphics processing unit having bounding volume logic to operate on a compressed bounding volume hierarchy, wherein each bounding volume node stores a parent bounding volume and multiple child bounding volumes that are encoded relative to the parent bounding volume.
    Type: Application
    Filed: March 16, 2018
    Publication date: August 22, 2019
    Applicant: Intel Corporation
    Inventors: Sven WOOP, Carsten BENTHIN, Rasmus BARRINGER, Tomas G. AKENINE-MOLLER
  • Patent number: 10387991
    Abstract: An apparatus and method for frame buffer compression. For example, one embodiment of a method comprises: identifying a wavelet function to compress an original frame buffer image; performing a wavelet transform on the original frame buffer image using the wavelet function; using a specified subset of wavelet coefficients of the wavelet function to construct an approximated image function; determining residuals comprising differences between the original frame buffer image and the approximated image function; and storing the residuals for subsequent use in recreating the original frame buffer image from the approximated image function.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: August 20, 2019
    Assignee: Intel Corporation
    Inventor: Tomas G. Akenine-Moller
  • Patent number: 10379611
    Abstract: A virtual reality apparatus and method are described.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: August 13, 2019
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Robert M. Toth, Ingo Wald, Aditya S. Yanamandra, Brent E. Insko, Michael Apodaca, Prasoonkumar Surti
  • Patent number: 10380789
    Abstract: An apparatus and method are described for performing an efficient depth prepass. For example, one embodiment of a method comprising: a method comprising: performing a first pass through a specified portion of a graphics pipeline with only depth rendering active; initializing a coarse depth buffer within the specified portion of the graphics pipeline during the first pass, the coarse depth buffer storing depth data at a level of granularity less than that stored in a per-pixel depth buffer, which is not initialized during the first pass; and performing a second pass through the graphics pipeline following the first pass, the second pass utilizing the full graphics pipeline and using values in the coarse depth buffer initialized by the first pass.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: August 13, 2019
    Assignee: Intel Corporation
    Inventors: Magnus Andersson, Tomas G. Akenine-Moller, Jon N. Hasselgren
  • Patent number: 10373370
    Abstract: A method for improving performance of generation of digitally represented graphics. The method comprises: receiving a first representation of a base primitive; providing a set of instructions associated with vertex position determination; executing said retrieved set of instructions on said first representation of said base primitive using bounded arithmetic for providing a second representation of said base primitive, and subjecting said second representation of said base primitive to a culling process. A corresponding apparatus and computer program product are also presented.
    Type: Grant
    Filed: December 31, 2016
    Date of Patent: August 6, 2019
    Assignee: Intel Corporation
    Inventors: Jon N. Hasselgren, Jacob J. Munkberg, Franz Petrik Clarberg, Tomas G. Akenine-Moller
  • Patent number: 10366468
    Abstract: A mechanism is described for facilitating ray compression for efficient graphics data processing at computing devices. A method of embodiments, as described herein, includes forwarding a set of rays to a ray compression unit hosted by a graphics processor at a computing device, and facilitating the ray compression unit to compress the set of rays, wherein the set of rays are compressed into a compressed representation.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: July 30, 2019
    Assignee: INTEL CORPORATION
    Inventor: Tomas G. Akenine-Moller
  • Patent number: 10354432
    Abstract: An apparatus and method are described for texture space shading. For example, one embodiment of a method comprises: performing texture mapping to map one or more textures to surfaces of one or more objects in texture space within a ray tracing architecture; and performing sampling and reconstruction directly on the surfaces of the objects in the texture space.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: July 16, 2019
    Assignee: Intel Corporation
    Inventors: Carl J. Munkberg, Jon N. Hasselgren, Franz P. Clarberg, Magnus Andersson, Robert M. Toth, Jim K. Nilsson, Tomas G. Akenine-Moller
  • Publication number: 20190172246
    Abstract: It is presented a method for improving performance of generation of digitally represented graphics. Said method comprises the steps of: selecting (440) a tile comprising fragments to process; executing (452) a culling program for the tile, the culling program being replaceable; and executing a set of instructions, selected from a plurality of sets of instructions based on an output value of the culling program, for each of a plurality of subsets of the fragments. A corresponding display adapter and computer program product are also presented.
    Type: Application
    Filed: October 9, 2018
    Publication date: June 6, 2019
    Inventors: Tomas G. Akenine-Moller, Jon N. Hasselgren
  • Publication number: 20190172254
    Abstract: A method for improving performance of generation of digitally represented graphics. The method comprises: receiving a first representation of a base primitive; providing a set of instructions associated with vertex position determination; executing said retrieved set of instructions on said first representation of said base primitive using bounded arithmetic for providing a second representation of said base primitive, and subjecting said second representation of said base primitive to a culling process. A corresponding apparatus and computer program product are also presented.
    Type: Application
    Filed: January 15, 2019
    Publication date: June 6, 2019
    Inventors: Jon N. Hasselgren, Jacob J. Munkberg, FRANZ PETRIK CLARBERG, Tomas G. AKENINE-MOLLER
  • Publication number: 20190172253
    Abstract: A method for improving performance of generation of digitally represented graphics. The method comprises: receiving a first representation of a base primitive; providing a set of instructions associated with vertex position determination; executing said retrieved set of instructions on said first representation of said base primitive using bounded arithmetic for providing a second representation of said base primitive, and subjecting said second representation of said base primitive to a culling process. A corresponding apparatus and computer program product are also presented.
    Type: Application
    Filed: January 15, 2019
    Publication date: June 6, 2019
    Inventors: Jon N. Hasselgren, Jacob J. Munkberg, Franz Petrik Clarberg, Tomas G. Akenine-Moller
  • Publication number: 20190130527
    Abstract: An apparatus and method are described for a non-uniform rasterizer. For example, one embodiment of an apparatus comprises: a graphics processor to process graphics data and render images using the graphics data; and a non-uniform rasterizer within the graphics processor to determine different resolutions to be used for different regions of an image, the non-uniform rasterizer to receive a plurality of polygons to be rasterized and to responsively rasterize the polygons in accordance with the different resolutions.
    Type: Application
    Filed: December 27, 2018
    Publication date: May 2, 2019
    Applicant: Intel Corporation
    Inventors: Tomas G. AKENINE-MOLLER, Robert M. TOTH, Bjorn JOHNSSON, Jon N. HASSELGREN