Patents by Inventor Tomas G. Akenine-Moller

Tomas G. Akenine-Moller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Layered reconstruction for defocus and motion blur
    Patent number: 9672657
    Abstract: Real-time light field reconstruction for defocus blur may be used to handle the case of simultaneous defocus and motion blur. By carefully introducing a few approximations, a very efficient sheared reconstruction filter is derived, which produces high quality images even for a very low number of input samples in some embodiments. The algorithm may be temporally robust, and is about two orders of magnitude faster than previous work, making it suitable for both real-time rendering and as a post-processing pass for high quality rendering in some embodiments.
    Type: Grant
    Filed: September 10, 2016
    Date of Patent: June 6, 2017
    Assignee: Intel Corporation
    Inventors: Carl J. Munkberg, Karthik Vaidyanathan, Jon N. Hasselgren, Franz P. Clarberg, Tomas G. Akenine-Moller, Marco Salvi
  • Depth buffering
    Patent number: 9665973
    Abstract: In accordance with some embodiments, depth values may be split into more and less significant bits. By so doing, some processing can be done based only on the more significant bits. Where the number of more significant bits is significantly less than the total number of bits, some memory bandwidth can be preserved. In other words, by only using the more significant bits for some of the depth buffering operations, memory bandwidth usage can be reduced, improving efficiency.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: May 30, 2017
    Assignee: Intel Corporation
    Inventors: Jim K. Nilsson, Tomas G. Akenine-Moller
  • Selective rasterization
    Patent number: 9659393
    Abstract: According to one embodiment, a given tile, made up of pixels or samples, may be of any shape, including a square shape. These pixels may contain colors, depths, stencil values, and other values. Each tile may be further augmented with a single bit, referred to herein as a render bit. In one embodiment, if the render bit is one, then everything is rendered as usual within the tile. However, if the render bit is zero, then nothing is rasterized to this tile and, correspondingly, depth tests, pixel shading, frame buffer accesses, and multi-sampled anti-aliasing (MSAA) resolves are not done for this tile. In other embodiments, some operations may be done nevertheless, but at least one operation is avoided based on the render bit. Of course, the render bits may be switched such that the bit zero indicates that everything should be rendered and the bit one indicates more limited rendering.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: May 23, 2017
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Carl J. Munkberg, Franz P. Clarberg
  • FACILITATING ENVIRONMENT-BASED LOSSY COMPRESSION OF DATA FOR EFFICIENT RENDERING OF CONTENTS AT COMPUTING DEVICES
    Publication number: 20170142447
    Abstract: A mechanism is described for facilitating environment-based lossy compression of data for efficient rendering of contents at computing devices. A method of embodiments, as described herein, includes collecting, in real time, sensory input data relating to characteristics of at least one of a user and a surrounding environment. The method may further include evaluating the sensory input data to mark one or more data portions of data relating to contents, where the one or more data portions are determined to be suitable for compression based on the sensory input data. The method may further include dynamically performing, in real time, the compression of the one or more data portions, where the compression triggers loss of one or more content portions of the contents corresponding to the one or more data portions of the data.
    Type: Application
    Filed: October 19, 2016
    Publication date: May 18, 2017
    Inventors: ROBERT M. TOTH, JIM K. NILSSON, TOMAS G. AKENINE-MOLLER, FRANZ P. CLARBERG
  • Variable Rasterization Order for Motion Blur and Depth of Field
    Publication number: 20170124742
    Abstract: Cache thrashing or over-accessing of a cache can be reduced by reversing the order of traversal of a triangle on different granularities. In the case where triangles are not grouped, the traverse order may be reversed on each triangle. In cases where triangles are grouped, the traversal order may be reversed with each group change. However, when motion is excessive, for example beyond a threshold, then the traversal order reversal may be disabled.
    Type: Application
    Filed: October 29, 2015
    Publication date: May 4, 2017
    Inventors: Jon N. Hasselgren, Tomas G. Akenine-Moller, Carl J. Munkberg, Franz P. Clarberg, Jim K. Nilsson
  • METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUCT FOR IMPROVED GRAPHICS PERFORMANCE
    Publication number: 20170109921
    Abstract: A method for improving performance of generation of digitally represented graphics. The method comprises: receiving a first representation of a base primitive; providing a set of instructions associated with vertex position determination; executing said retrieved set of instructions on said first representation of said base primitive using bounded arithmetic for providing a second representation of said base primitive, and subjecting said second representation of said base primitive to a culling process. A corresponding apparatus and computer program product are also presented.
    Type: Application
    Filed: December 31, 2016
    Publication date: April 20, 2017
    Inventors: Jon N. Hasselgren, Jacob J. Munkberg, FRANZ PETRIK CLARBERG, Tomas G. AKENINE-MOLLER
  • Variable depth compression
    Patent number: 9626793
    Abstract: In accordance with some embodiments, the number of bits allocated to depth compression may be changed variably based on a number of considerations. As a result, depth data may be compressed in a more efficient way.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: April 18, 2017
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Jim K. Nilsson, Magnus Andersson, Jon N. Hasselgren
  • Color buffer compression
    Patent number: 9582847
    Abstract: In accordance with some embodiments, a mask or table may be maintained to record information about whether or not each pixel within a tile is cleared. As used herein, a “cleared” tile is one that is not covered by any other depicted objects. The clear mask may store a bit per pixel or sample to indicate whether the pixel or sample contains a color value or whether it is cleared. As a result, the compression ratio may be increased for partially covered tiles in some embodiments.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: February 28, 2017
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Jim K. Nilsson, Jon N. Hasselgren, Magnus Andersson
  • Hierarchical index bits for multi-sampling anti-aliasing
    Patent number: 9576384
    Abstract: In accordance with some embodiments, a control surface stores the index bits in a tile using multi-sampling anti-aliasing. By determining whether all the samples in a tile point to plane 0, one can use only two bits in a control surface for the tile to indicate that all the samples on the tile point to plane 0. Otherwise more than two bits may be stored in the control surface to indicate planes pointed to by the samples of the tile.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: February 21, 2017
    Assignee: Intel Corporation
    Inventor: Tomas G. Akenine-Moller
  • Culling using linear bounds for stochastic rasterization
    Patent number: 9569879
    Abstract: We present a new culling test for rasterization of simultaneous depth of field and motion blur, which efficiently reduces the set of (x, y, u, v, t) samples that need to be coverage tested within a screen space tile. The test finds linear bounds in u, t space and v, t space respectively, using a separating line algorithm. This test is part of the foundation for an efficient 5D rasterizer that extracts coherence in both defocus and motion blur to minimize the number of visibility tests.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: February 14, 2017
    Assignee: Intel Corporation
    Inventors: Carl J. Munkberg, Tomas G. Akenine-Moller, Jon N. Hasselgren
  • Variable shading
    Patent number: 9569886
    Abstract: In some embodiments, a given frame or picture may have different shading rates. In one embodiment in some areas of the frame or picture the shading rate may be less than once per pixel and in other places it may be once per pixel. An algorithm may be used to determine how the shading rate changes across the frame.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: February 14, 2017
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Karthik Vaidyanathan, Marco Salvi, Robert M. Toth, Aaron Lefohn
  • Depth offset compression
    Patent number: 9552620
    Abstract: Zmin and Zmax are determined for depth offset compression. Then a check determines whether Zmin is equal to Zmax. If so, only one of Zmin and Zmax is used for depth offset compression and no index mask may be used. The bits that are saved thereby may be used for other purposes, including improving precision.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: January 24, 2017
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Magnus Andersson
  • Sparse Rasterization
    Publication number: 20170011543
    Abstract: An importance map indicates, for each of a plurality of pixels, whether the pixel is considered important enough to be rendered. A hierarchical tree for pixels is created to generate a hierarchical importance map. The hierarchical importance map may be used to stop traversal of a primitive that does not overlap a pixel indicated to be important.
    Type: Application
    Filed: September 10, 2016
    Publication date: January 12, 2017
    Inventors: Rasmus Barringer, Tomas G. Akenine-Moller
  • Compression Using Index Bits in MSAA
    Publication number: 20170011531
    Abstract: A palette compressed representation may be stored in the index bits, when that is possible. The savings are considerable in some embodiments. In uncompressed mode, the data uses 2304 (2048+256) bits, and in compressed mode, the data uses 1280 bits. However, with this technique, the data only uses the index bits, (e.g. 256 bits) with a 5:1 compression improvement over the already compressed representation, and with respect to the uncompressed representation it is a 9:1 compression ratio.
    Type: Application
    Filed: September 7, 2016
    Publication date: January 12, 2017
    Inventor: Tomas G. Akenine-Moller
  • Clustered Palette Compression
    Publication number: 20170011532
    Abstract: Color values may be compressed using a palette based encoder. Clusters of color values may be identified and encoded color values within the cluster with respect to a color value having a predefined characteristic. Clusters that have pixels or samples with constant color value may also be encoded.
    Type: Application
    Filed: September 7, 2016
    Publication date: January 12, 2017
    Inventors: Tomas G. Akenine-Moller, Jim K. Nilsson
  • Method, Display Adapter and Computer Program Product for Improved Graphics Performance by Using a Replaceable Culling Program
    Publication number: 20170011542
    Abstract: It is presented a method for improving performance of generation of digitally represented graphics. Said method comprises the steps of: selecting (440) a tile comprising fragments to process; executing (452) a culling program for the tile, the culling program being replaceable; and executing a set of instructions, selected from a plurality of sets of instructions based on an output value of the culling program, for each of a plurality of subsets of the fragments. A corresponding display adapter and computer program product are also presented.
    Type: Application
    Filed: August 31, 2016
    Publication date: January 12, 2017
    Inventors: Tomas G. Akenine-Moller, Jon N. Hasselgren
  • Layered Reconstruction for Defocus and Motion Blur
    Publication number: 20170011545
    Abstract: Real-time light field reconstruction for defocus blur may be used to handle the case of simultaneous defocus and motion blur. By carefully introducing a few approximations, a very efficient sheared reconstruction filter is derived, which produces high quality images even for a very low number of input samples in some embodiments. The algorithm may be temporally robust, and is about two orders of magnitude faster than previous work, making it suitable for both real-time rendering and as a post-processing pass for high quality rendering in some embodiments.
    Type: Application
    Filed: September 10, 2016
    Publication date: January 12, 2017
    Inventors: Carl J. Munkberg, Karthik Vaidyanathan, Jon N. Hasselgren, Franz P. Clarberg, Tomas G. Akenine-Moller, Marco Salvi
  • PIXEL MERGE UNIT EFFICIENCY BY IDENTIFYING SILHOUETTE PIXELS
    Publication number: 20160364845
    Abstract: In one embodiment, efficiency of a pixel merge unit of a graphics pipeline is increased by identifying a silhouette edge of an input primitive and bypassing the pixel merge unit for fragments associated with the silhouette edge. Identifying partially covered fragments along the silhouette edge and preventing those fragments from entering the pixel merge unit allows existing fragments within the pixel merge unit to reside within the pixel merge unit for a longer period before getting evicted. The additional residency grants fragments additional time to wait for neighboring fragments to arrive, which, in turn, increases the merge rate for fragments that are eligible to be merged.
    Type: Application
    Filed: June 11, 2015
    Publication date: December 15, 2016
    Inventors: Rahul P. Sathe, Tomas G. Akenine-Moller
  • APPARATUS AND METHOD FOR DYNAMIC POLYGON OR PRIMITIVE SORTING FOR IMPROVED CULLING
    Publication number: 20160350966
    Abstract: An apparatus and method are described for dynamic polygon or primitive sorting for improved culling. For example, one embodiment of an apparatus comprises: a rasterization unit to receive a plurality of polygons to be rasterized in an original ordering; and depth test evaluation logic to determine whether a current polygon is fully visible, partially visible or occluded; and reordering logic to incrementally alter the original ordering by swapping each occluded polygon with another polygon positioned relatively lower in the original ordering and by swapping each fully visible polygon with another polygon positioned relatively higher in the original ordering.
    Type: Application
    Filed: June 1, 2015
    Publication date: December 1, 2016
    Inventors: JIM K. NILSSON, TOMAS G. AKENINE-MOLLER, MAGNUS ANDERSSON
  • Adaptive depth offset compression
    Patent number: 9501864
    Abstract: Because using the same number of bits per residual depth offset compression is not the best distribution of bits, the bits per residual may be distributed instead according to the content of the depths of a tile. For example, if the depth differences close to the Zmax are small, then fewer bits can be spent on residuals for the samples that are encoded relative to Zmax. Consequently, more bits can be spent on the residuals for the samples that are encoded relative to Zmin. As a result, more tiles succeed at compressing to the required number of bits.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: November 22, 2016
    Assignee: Intel Corporation
    Inventors: Tomas G. Akenine-Moller, Magnus Andersson, Jon N. Hasselgren, Carl J. Munkberg, Robert M. Toth