Abstract: The invention is intended to increase the density for mounting the semiconductor chips on a memory-module, to increase the capacity of the memory-module, and to realize the memory-module capable of coping with high-speed buses. The memory-module comprises a plurality of WPPs having protruded terminals as external terminals and wiring portions for expanding the pitch among the protruded terminals to be wider than the pitch among the bonding electrodes of semiconductor chips, TSOPs having semiconductor chips, outer leads as external terminals, and are mounted via the outer leads that are electrically connected to the bonding electrodes of the semiconductor chips, and a module board supporting the WPPs and the TSOPs, wherein the WPPs and the TSOPs are mounted by the simultaneous reflowing in a mixed manner on the module board.

Abstract: A threading device for embroidery machinery performs threading accurately regardless of the type of thread such that it is capable of changing colored thread automatically without intervention of an operator. The threading device includes a needle support mechanism disposed movably facing a hooking member, for preventing deflection of a needle by correcting deflection of the needle, when inserting the hooking member formed in the shape of a hook at a tip of a thread pull-out mechanism in a needle hole.

Abstract: An image forming apparatus which can prevent the electric discharge when the trailing edge of a recording material passes a transferring position, and yet can stabilize the surface potential of a photosensitive drum. A controller changes a transfer bias voltage Vt during the supply of paper to 0 V before the trailing edge of recording paper arrives at a transferring nip part, changes it to a transfer bias voltage V0 during the non-supply of paper after the trailing edge of the recording paper has passed the transferring nip part, and changes a charging bias voltage to a charging bias voltage smaller than a normal charging bias voltage when an area on the photosensitive drum to which 0 V has been applied passes a charging nip portion. The transfer bias voltage V0 during the non-supply of paper is smaller than the transfer bias voltage Vt during the supply of paper.

Abstract: Disclosed is a technique capable of enhancing the degree of freedom in the layout of a rerouting layer in a wafer level CSP in which defect repairing is performed by cutting a fuse. More specifically, after the defect repairing is performed by irradiating a laser beam to a fuse, an organic passivation layer (photo-sensitive polyimide layer) is filled in a fuse opening. Thereafter, a rerouting layer, a bump land, an uppermost wiring layer, and a solder bump are formed on the organic passivation layer. In the following steps of the defect repairing, the baking process to cure an elastomer layer and the uppermost protection layer is conducted at a temperature below 260° C. in order to prevent the variance of the refresh times of memory cells.

Abstract: A semiconductor integrated circuit device includes a semiconductor substrate, a circuit element formed on one major surface of the semiconductor substrate and constituting an integrated circuit having a plurality of functions or a plurality of characteristics, an internal connection terminal, connected to the integrated circuit, for selecting one of the plurality of functions or one of the characteristics in the integrated circuit, an insulating layer covering the internal connection terminal such that the internal connection terminal is selectively exposed, and an external connection terminal arranged on the insulating layer. One of the plurality of functions or one of the plurality of characteristics is selected by a connection state between the internal connection terminal and the external connection terminal.

Abstract: The image heating apparatus for heating a toner image formed on a recording material, comprising, a rotatable member; heating device for heating an outer peripheral surface of the rotatable member, the heating device including a heater for forming a heating nip portion in cooperation with the rotatable member; back-up device for forming a conveying nip portion in cooperation with the rotatable member, the conveying nip portion conveying the recording material; and control device for controlling a temperature of the heater and a rotation of the rotatable member, wherein the apparatus has a cleaning mode to remove toner from the heating device, and the control device rotates or reversely rotates the rotatable member in a condition that the heater dissipates heat in the cleaning mode. By the virtue of the present invention, it prevents stain caused by the off-set of toner the recording material in an image heating apparatus.

Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.

Abstract: Described herein is a stacked package according to the present invention, wherein a plurality of tape carriers which seal semiconductor chips, are multilayered in upward and downward directions. In the stacked package, one ends of leads formed over the whole surfaces of each tape carrier are electrically connected to their corresponding connecting terminals of the semiconductor chip. Other ends of the leads are electrically connected to their corresponding through holes defined in the tape carrier. Connecting terminals common to the plurality of semiconductor chips are formed at the same places of the plurality of tape carriers and withdrawn to the same external connecting terminals through a plurality of mutually-penetrated through holes.

Abstract: A semiconductor integrated circuit device includes a semiconductor substrate, a circuit element formed on one major surface of the semiconductor substrate and constituting an integrated circuit having a plurality of functions or a plurality of characteristics, an internal connection terminal, connected to the integrated circuit, for selecting one of the plurality of functions or one of the characteristics in the integrated circuit, an insulating layer covering the internal connection terminal such that the internal connection terminal is selectively exposed, and an external connection terminal arranged on the insulating layer. One of the plurality of functions or one of the plurality of characteristics is selected by a connection state between the internal connection terminal and the external connection terminal.

Abstract: A switching timing condition for controlling the switching timing from first transfer bias during a non-transfer process to second transfer bias during a transfer process is recognized, and the switching timing of the transfer bias from the non-transfer process to the transfer process is switched according to the content of the recognized switching timing condition.

Abstract: In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.

Abstract: In a semiconductor integrated circuit device, testing pads (209b) using a conductive layer, such as relocation wiring layers (205) are provided just above or in the neighborhood of terminals like bonding pads (202b) used only for probe inspection at which bump electrodes (208) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.

Abstract: Disclosed is a technique capable of enhancing the degree of freedom in the layout of a rerouting layer in a wafer level CSP in which defect repairing is performed by cutting a fuse. More specifically, after the defect repairing is performed by irradiating a laser beam to a fuse, an organic passivation layer (photo-sensitive polyimide layer) is filled in a fuse opening. Thereafter, a rerouting layer, a bump land, an uppermost wiring layer, and a solder bump are formed on the organic passivation layer. In the following steps of the defect repairing, the baking process to cure an elastomer layer and the uppermost protection layer is conducted at a temperature below 260° C. in order to prevent the variance of the refresh times of memory cells.

Abstract: A hand device for working robot which can be downsized is provided. The device consists of a robot hand 10, a link means 40 and a workpiece drop prevention means. The robot hand 10 includes a hand base 20, a pair of fingers 21, 21 protruding from the hand base 20 and a movable core 25 provided with a cylinder 24. The link means 40 includes a lever and a connecting pad 43 for connecting the lever and the movable core 25. A workpiece drop prevention means 60 includes a protrusion stick 50 which is supported by a supporting rail 51, a coil spring and an air cylinder for recess 53.

Abstract: A semiconductor integrated circuit device includes a semiconductor substrate, a circuit element formed on one major surface of the semiconductor substrate and constituting an integrated circuit having a plurality of functions or a plurality of characteristics, an internal connection terminal, connected to the integrated circuit, for selecting one of the plurality of functions or one of the characteristics in the integrated circuit, an insulating layer covering the internal connection terminal such that the internal connection terminal is selectively exposed, and an external connection terminal arranged on the insulating layer. One of the plurality of functions or one of the plurality of characteristics is selected by a connection state between the internal connection terminal and the external connection terminal.

Abstract: An image heating apparatus includes a rotatable member; back-up means for cooperating with the rotatable member to form a feeding nip for feeding a recording material; heating means for heating an outer peripheral surface of the rotatable member, the heating means including a heater in the form of a plate cooperable with the rotatable member to form a heating nip.

Abstract: A semiconductor chip 2 is disposed within a device hole as formed in a tape base material 1a of a tape carrier 1, which chip is smaller in thickness than the tape base material 1a, and then sealing is performed by a seal resin 3 to permit both the principal surface and back surface of such semiconductor chip 2 to be coated therewith. And, the position of the semiconductor chip 2 in a direction along the thickness of the tape base 1a is set to correspond to a stress neutral plane of the TCP as a whole.

Abstract: An image forming apparatus which can prevent the electric discharge when the trailing edge of a recording material passes a transferring position, and yet can stabilize the surface potential of a photosensitive drum. A controller changes a transfer bias voltage Vt during the supply of paper to 0 V before the trailing edge of recording paper arrives at a transferring nip part, changes it to a transfer bias voltage V0 during the non-supply of paper after the trailing edge of the recording paper has passed the transferring nip part, and changes a charging bias voltage to a charging bias voltage smaller than a normal charging bias voltage when an area on the photosensitive drum to which 0 V has been applied passes a charging nip portion. The transfer bias voltage V0 during the non-supply of paper is smaller than the transfer bias voltage Vt during the supply of paper.

Abstract: Disclosed is a technique capable of enhancing the degree of freedom in the layout of a rerouting layer in a wafer level CSP in which defect repairing is performed by cutting a fuse. More specifically, after the defect repairing is performed by irradiating a laser beam to a fuse, an organic passivation layer (photo-sensitive polyimide layer) is filled in a fuse opening. Thereafter, a rerouting layer, a bump land, an uppermost wiring layer, and a solder bump are formed on the organic passivation layer. In the following steps of the defect repairing, the baking process to cure an elastomer layer and the uppermost protection layer is conducted at a temperature below 260° C. in order to prevent the variance of the refresh times of memory cells.

Abstract: A switching timing condition for controlling the switching timing from first transfer bias during a non-transfer process to second transfer bias during a transfer process is recognized, and the switching timing of the transfer bias from the non-transfer process to the transfer process is switched according to the content of the recognized switching timing condition.