Patents by Inventor Wen-Ching Hsu

Wen-Ching Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9611548
    Abstract: A wafer rotating apparatus includes a base, a carrying device, a first shaft gear, a power unit, a roller, a second shaft gear and a driving assembly. The base has an accommodating space which the carrying device is disposed in to accommodate the wafer. The first shaft gear is disposed on a side surface of the base. The power unit is assembled to a top of the base and connected to the first shaft gear. The roller is located under the carrying device and supports an edge of the wafer. The second shaft gear is disposed on the side surface of the base and connected to the roller. The driving assembly is connected between the first shaft gear and the second shaft gear. The power unit provides a power through the first gear, the driving unit and the second shaft gear to drive the roller to rotate the wafer.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: April 4, 2017
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Yuan-Hao Chang, Te-Hao Lee, Ying-Ru Shih, Wen-Ching Hsu
  • Patent number: 9593406
    Abstract: The invention provides an optical device and manufacture thereof. The optical device of the invention includes a transparent substrate, a seeding layer, a plurality of nano-rods and a protection layer. The seeding layer is formed to overlay an entrance surface and an exit surface of the transparent substrate. The plurality of nano-rods are formed on the seeding layer. The protection layer is formed to completely overlay the plurality of nano-rods.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: March 14, 2017
    Assignee: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Miin-Jang Chen, Wen-Ching Hsu
  • Publication number: 20170058428
    Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20170062635
    Abstract: A polycrystalline silicon wafer is provided. The polycrystalline silicon wafer, includes a plurality of silicon grains, wherein the carbon content of the polycrystalline silicon wafer is greater than 4 ppma, and the resistivity of the polycrystalline silicon wafer is greater than or equal to 1.55 ?-cm.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20170057829
    Abstract: A method of fabricating a poly-crystalline silicon ingot includes: (a) loading a nucleation promotion layer onto a bottom of a mold; (b) providing a silicon source on the nucleation promotion layer in the mold; (c) heating the mold until the silicon source is melted into a silicon melt completely; (d) controlling at least one thermal control parameter regarding the silicon melt continually to enable the silicon melt to nucleate on the nucleation promotion layer such that a plurality of silicon grains grow in the vertical direction; (e) controlling the at least one thermal control parameter to enable the plurality of the silicon grains to continuously grow with an average grain size increasing progressively in the vertical direction until entirety of the silicon melt is solidified to obtain the poly-crystalline silicon ingot, wherein the nucleation promotion layer is loaded by spreading a plurality of mono-Si particles over the bottom of the mold.
    Type: Application
    Filed: November 14, 2016
    Publication date: March 2, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
  • Publication number: 20170016143
    Abstract: The present disclosure provides a polycrystalline silicon ingot, a polycrystalline silicon brick and a polycrystalline silicon wafer. The polycrystalline silicon ingot has a vertical direction and includes a nucleation promotion layer located at a bottom of the polycrystalline silicon ingot, and a plurality of silicon grains grown along the vertical direction, wherein the silicon grains include at least three crystal directions. The coefficient of variation of grain area in a section above the nucleation promotion layer of the polycrystalline silicon ingot increases along the vertical direction.
    Type: Application
    Filed: May 13, 2016
    Publication date: January 19, 2017
    Inventors: Yu-Min Yang, Cheng-Jui Yang, Hung-Sheng Chou, Wen-Huai Yu, Sung-Lin Hsu, Wen-Ching Hsu
  • Publication number: 20160359005
    Abstract: A semiconductor device includes a substrate, an initial layer, and a superlattice stack. The initial layer is located on the substrate and includes aluminum nitride (AlN). The superlattice stack is located on the initial layer and includes a plurality of first films and a plurality of second films, and the first films and the second films are alternately stacked on the initial layer. If the first films are doped films having dopants selected from a group consisting of carbon, iron, and the combination thereof, the second films do not include dopants substantially; if the second films are doped films having dopants selected from a group consisting of carbon, iron, and the combination thereof, the first films do not include dopants substantially.
    Type: Application
    Filed: March 23, 2016
    Publication date: December 8, 2016
    Inventors: Ming-Shien Hu, Chien-Jen Sun, I-Ching Li, Wen-Ching Hsu
  • Patent number: 9493357
    Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: November 15, 2016
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Wen-Huai Yu, Cheng-Jui Yang, Yu-Min Yang, Kai-Yuan Pai, Wen-Chieh Lan, Chan-Lu Su, Yu-Tsung Chiang, Sung-Lin Hsu, Wen-Ching Hsu, Chung-Wen Lan
  • Patent number: 9490326
    Abstract: The instant disclosure relates to a wafer formed by slicing an ingot. The wafer has at least one side surface adjacent to the slicing path and topped with a nanostructure layer.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: November 8, 2016
    Assignee: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Jian-Jhih Li, Wen-Ching Hsu
  • Publication number: 20160322244
    Abstract: A wafer rotating apparatus includes a base, a carrying device, a first shaft gear, a power unit, a roller, a second shaft gear and a driving assembly. The base has an accommodating space which the carrying device is disposed in to accommodate the wafer. The first shaft gear is disposed on a side surface of the base. The power unit is assembled to a top of the base and connected to the first shaft gear. The roller is located under the carrying device and supports an edge of the wafer. The second shaft gear is disposed on the side surface of the base and connected to the roller. The driving assembly is connected between the first shaft gear and the second shaft gear. The power unit provides a power through the first gear, the driving unit and the second shaft gear to drive the roller to rotate the wafer.
    Type: Application
    Filed: March 22, 2016
    Publication date: November 3, 2016
    Inventors: Yuan-Hao Chang, Te-Hao Lee, Ying-Ru Shih, Wen-Ching Hsu
  • Publication number: 20160312379
    Abstract: A melt gap measuring apparatus is adapted to measure the gap between the bottom of the heat insulating cover and the surface of the raw material melt inside a crucible. The melt gap measuring apparatus includes a first light-guiding probe having a first upper side and a first bottom side which are opposite to each other. The first upper side is exposed to an inner wall of the heat insulating cover, and the first bottom side protrudes from the bottom side of the heat insulating cover. An image capturing device is disposed above the heat insulating cover to capture the image of the first upper side. Moreover, a crystal growth apparatus and a method of measuring the melt gap are also provided.
    Type: Application
    Filed: March 22, 2016
    Publication date: October 27, 2016
    Inventors: Chun-Hung Chen, Wen-Chieh Lan, Masami Nakanishi, Chi-Tse Lee, Ying-Ru Shih, Wen-Ching Hsu
  • Publication number: 20160293707
    Abstract: A semiconductor device includes a substrate, an initial layer, and a buffer stack structure. The initial layer is located on the substrate and includes aluminum nitride (AlN). The buffer stack structure is located on the initial layer and includes a plurality of base layers and at least one doped layer positioned between two adjacent base layers. Each of the base layers includes aluminum gallium nitride (AlGaN), and the doped layer includes AlGaN or boron aluminum gallium nitride (BAlGaN). In the buffer stack structure, concentrations of aluminum in the base layers gradually decrease, concentrations of gallium in the base layers gradually increase, the base layers do not contain carbon substantially, and dopants in the doped layer include carbon or iron.
    Type: Application
    Filed: March 21, 2016
    Publication date: October 6, 2016
    Inventors: Ming-Shien Hu, Chien-Jen Sun, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20160284649
    Abstract: A nanostructured chip includes a substrate and a nanostructured layer, wherein the substrate has a first surface and a second surface on which the nanostructured layer is formed. A method of producing the nanostructured chip includes the step of forming the nanostructured layer on the second surface of the substrate. Whereby, the nanostructured layer effectively disperses a stress to increase the flexural strength of the nanostructured chip. Therefore, during the subsequent procedures to form an epitaxial layer on the first surface, the nanostructured layer is helpful to prevent the epitaxial layer from generating cracks, and prevent the substrate from bowings, or fragments.
    Type: Application
    Filed: March 24, 2016
    Publication date: September 29, 2016
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: JER-LIANG YEH, CHIH-YUAN CHUANG, CHUN-I FAN, CHIEN-JEN SUN, YING-RU SHIH, WEN-CHING HSU
  • Publication number: 20160194782
    Abstract: A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.
    Type: Application
    Filed: March 15, 2016
    Publication date: July 7, 2016
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Sung-Lin Hsu, Cheng-Jui Yang, Pei-Kai Huang, Sheng-Hua Ni, Yu-Min Yang, Ming-Kung Hsiao, Wen-Huai Yu, Ching-Shan Lin, Wen-Ching Hsu, Chung-Wen Lan
  • Patent number: 9378946
    Abstract: A heterostructure including: a substrate having a first primary surface, a second primary surface, and a diffusion layer extending a depth into the substrate from the first primary surface; and an epitaxial layer disposed on the second primary surface of the substrate is disclosed along with methods for production of the same.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: June 28, 2016
    Assignee: Global Wafers Co., Ltd
    Inventors: Yao-Chung Chang, Chih Chin Liang, Wen-Ching Hsu
  • Patent number: 9337375
    Abstract: The invention discloses a seed used for crystalline silicon ingot casting. A seed according to a preferred embodiment of the invention includes a crystal and an impurity diffusion-resistant layer. The crystal is constituted by at least one grain. The impurity diffusion-resistant layer is formed to overlay an outer surface of the crystal. A crystalline silicon ingot fabricated by use of the seed of the invention has significantly reduced red zone and yellow zone.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: May 10, 2016
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Hung-Sheng Chou, Yu-Tsung Chiang, Yu-Min Yang, Ming-Kung Hsiao, Wen-Huai Yu, Sung-Lin Hsu, I-Ching Li, Chung-Wen Lan, Wen-Ching Hsu
  • Patent number: 9315918
    Abstract: A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 19, 2016
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Sung-Lin Hsu, Cheng-Jui Yang, Pei-Kai Huang, Sheng-Hua Ni, Yu-Min Yang, Ming-Kung Hsiao, Wen-Huai Yu, Ching-Shan Lin, Wen-Ching Hsu, Chung-Wen Lan
  • Publication number: 20160056034
    Abstract: A method for manufacturing a wafer includes forming a plurality nano-pillars on a surface of a brick; forming a cover layer on the surfaces of the brick, wherein the cover layer covers the nano-pillars; forming an adhesive layer on the surface of the cover layer; cutting the brick into a plurality of wafers; and removing the cover layer and the adhesive layer on the wafers by a solvent, wherein the solvent reacts with the cover layer but not reacts with the brick.
    Type: Application
    Filed: June 5, 2015
    Publication date: February 25, 2016
    Applicants: SINO-AMERICAN SILICON PRODUCTS INC., GLOBALWAFERS CO., LTD.
    Inventors: Jer-Liang YEH, Chih-Yuan CHUANG, Chun-I FAN, Wen-Ching HSU
  • Publication number: 20150380242
    Abstract: A heterostructure including: a substrate having a first primary surface, a second primary surface, and a diffusion layer extending a depth into the substrate from the first primary surface; and an epitaxial layer disposed on the second primary surface of the substrate is disclosed along with methods for production of the same.
    Type: Application
    Filed: June 25, 2015
    Publication date: December 31, 2015
    Inventors: Yao-Chung Chang, Chih Chin Liang, Wen-Ching Hsu
  • Publication number: 20150361577
    Abstract: A method of casting an ingot includes the following steps: place solid silicon raw materials on a bottom of a containing device, wherein the containing device includes a container and a graphite layer provided on a surrounding wall and an inner bottom of the container, and the solid silicon raw materials are stacked upon the graphite layer on the inner bottom; heat the container to melt the solid silicon raw material into liquid state; cool the container from the bottom up till all of the silicon raw materials are crystallized and solidified. The solidified silicon raw materials become an ingot. Whereby, the graphite layer can effectively prevent impurities of the container from contaminating the ingot.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 17, 2015
    Inventors: Hung-Sheng CHOU, Kuo-Wei Chuang, Yu-Min Yang, Wen-Huai Yu, Sung-Lin Hsu, Wen-Ching Hsu