Patents by Inventor Wen-Ching Hsu

Wen-Ching Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150357290
    Abstract: A laminar structure of semiconductors comprises a substrate, an epitaxial layer, a protective layer, a first layer and a second layer. The epitaxial layer is arranged above the substrate and the protective layer is arranged below the substrate. Thermal expansion coefficients of the epitaxial layer and the protective layer are simultaneously greater than or less than that of the substrate. The first layer is arranged between the substrate and the protective layer; and the second layer is arranged between the substrate and the epitaxial layer, wherein the band gap of the first layer and the second layer are both greater than 3 eV. By a protective layer arranged below the substrate, stress generated between the substrate and the epitaxial layer can be reduced to prevent occurrence of bending or crack. Therefore, yield can be promoted and costs can be reduced. A manufacturing method thereof is also herein provided.
    Type: Application
    Filed: June 9, 2015
    Publication date: December 10, 2015
    Inventors: Wen-Ching HSU, Chia-Wen KO, Chiou-Mei LUO
  • Publication number: 20150307361
    Abstract: Present disclosure provides a multicrystalline silicon (mc-Si) brick, including a bottom portion starting from a bottom to a height of 100 mm, a middle portion starting from the height of 100 mm to a height of 200 mm; and a top portion starting from the height of 200 mm to a top. A percentage of incoherent grain boundary in the bottom portion is greater than a percentage of incoherent grain boundary in the top portion. Present disclosure also provides a multicrystalline silicon (mc-Si) wafer. The mc-Si wafer includes a percentage of non-? grain boundary from about 60 to about 75 and a percentage of ?3 grain boundary from about 12 to about 25.
    Type: Application
    Filed: April 28, 2015
    Publication date: October 29, 2015
    Inventors: Hung-Sheng CHOU, Yu-Min YANG, Wen-Huai YU, Sung Lin HSU, Wen-Ching HSU, Chung-Wen LAN, Yu-Ting WONG
  • Publication number: 20150299895
    Abstract: A stirring apparatus of an ingot casting furnace includes a rotating shaft and at least one fin. The fin is provided onto the rotating shaft, and has a first edge, a second edge of unequal length provided correspondingly, and a third edge connecting the first and the second edges. The rotating shaft can be driven to rotate, which consequently drives the at least one fin to stir materials in a crucible. The length of the first edge is different from that of the second edge in order for the materials in the crucible can be mixed with dopants more uniformly during the stirring process to produce ingots of stable quality.
    Type: Application
    Filed: April 11, 2015
    Publication date: October 22, 2015
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: LU-CHUNG CHUANG, CHIH-CHIEH YU, WEN-CHIEH LAN, JIUNN-YIH CHYAN, I-CHING LI, WEN-CHING HSU
  • Patent number: 9163326
    Abstract: A crystal growth device includes a crucible and a heater setting. The crucible has a bottom and a top opening. The heater setting surrounds the crucible and is movable relative to the crucible along a top-bottom direction of the crucible and between first and second positions. The heater setting includes a first temperature heating zone and a second temperature heating zone higher in temperature than the first temperature heating zone. The heater setting is in the first position when the crucible is in the second temperature heating zone and in the second position when the crucible is in the first temperature heating zone.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: October 20, 2015
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Chung-Wen Lan, Bruce Hsu, Wen-Huai Yu, Wen-Chieh Lan, Yu-Min Yang, Kai-Yuan Pai, Wen-Ching Hsu
  • Publication number: 20150294857
    Abstract: The invention provides a composite substrate, a semiconductor device including such composite substrate, and a method of making the same. In particular, the composite substrate of the invention includes a nitride-based single crystal layer transformed from a nitride-based poly-crystal layer, which has a specific thickness of approximately between 2 nm and 100 nm.
    Type: Application
    Filed: April 15, 2015
    Publication date: October 15, 2015
    Applicants: GLOBALWAFERS CO., LTD.
    Inventors: MIIN-JANG CHEN, HUAN-YU SHIH, WEN-CHING HSU, RAY-MING LIN
  • Publication number: 20150284876
    Abstract: A crystal growth apparatus includes a crucible, a heating device, a thermal insulation cover, and a driving device. The crucible contains materials to be melted, wherein the heating device heats the crucible to melt the materials; the thermal insulation cover is provided upon the materials, wherein the thermal insulation cover includes a main body, which has a bottom surface facing an interior of the crucible, and a insulating member being provided at the main body; the driving device moves the thermal insulation cover towards or away from the materials, whereby, the thermal insulation cover effectively blocks heat conduction and heat convection, which prevents thermal energy from escaping out of the crucible.
    Type: Application
    Filed: March 31, 2015
    Publication date: October 8, 2015
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: LU-CHUNG CHUANG, CHIH- CHIEH YU, WEN-CHIEH LAN, I-CHING LI, WEN-CHING HSU, JIUNN-YIH CHYAN
  • Publication number: 20150259820
    Abstract: A method for manufacturing an isolating layer onto a crucible includes the steps as follows: providing a spraying device for the following spraying steps; heating the crucible and measuring the heated crucible to get a first temperature; spraying a slurry on the inner wall of the crucible to form an isolating layer by a spraying unit with a predetermined spraying manner; measuring the isolating layer to get a second temperature; obtaining a value for the difference between the first and second temperatures and judging whether the difference value in a within predetermined difference scope or not, in which the predetermined difference scope is about 6° C.˜12° C.; when the difference value is not in the predetermined difference scope, adjusting the predetermined spraying manner; when the difference value is in the predetermined difference scope, implementing the above spraying steps to the crucible.
    Type: Application
    Filed: March 12, 2015
    Publication date: September 17, 2015
    Inventors: HUNG-SHENG CHOU, LI WEI LI, WEN-HUAI YU, BRUCE HSU, CHUN-I FAN, WEN CHING HSU
  • Patent number: 9133565
    Abstract: A crystalline silicon ingot and a method of manufacturing the same are provided. Using a crystalline silicon seed layer, the crystalline silicon ingot is formed by a directional solidification process. The crystalline silicon seed layer is formed of multiple primary monocrystalline silicon seeds and multiple secondary monocrystalline silicon seeds. Each of the primary monocrystalline silicon seeds has a first crystal orientation different from (100). Each of the secondary monocrystalline silicon seeds has a second crystal orientation different from the first crystal orientation. Each of the primary monocrystalline silicon seeds is adjacent to at least one of the secondary monocrystalline silicon seeds, and separate from the others of the primary monocrystalline silicon seeds.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: September 15, 2015
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Wen-Chieh Lan, Yong-Cheng Yu, Wen-Huai Yu, Sung-Lin Hsu, Wen-Ching Hsu
  • Publication number: 20150236096
    Abstract: The instant disclosure relates to a wafer formed by slicing an ingot. The wafer has at least one side surface adjacent to the slicing path and topped with a nanostructure layer.
    Type: Application
    Filed: April 29, 2015
    Publication date: August 20, 2015
    Inventors: JIAN-JHIH LI, WEN-CHING HSU
  • Patent number: 9109301
    Abstract: In a crystalline silicon formation apparatus, a quick cooling method is applied to the bottom of a crucible to control a growth orientation of a polycrystalline silicon grain, such that the crystal grain forms twin boundary, and the twin boundary is a symmetric grain boundary, and the crystal grain is solidified and grown upward in unidirection to form a complete polycrystalline silicon, such that defects or impurities will not form in the polycrystalline silicon easily.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: August 18, 2015
    Assignee: Sino-American Silicon Products, Inc.
    Inventors: Chung-Wen Lan, Kimsam Hsieh, Wen-Huai Yu, Bruce Hsu, Ya-Lu Tsai, Wen-Ching Hsu, Suz-Hua Ho
  • Publication number: 20150197873
    Abstract: The invention provides a crucible assembly and method of manufacturing a crystalline silicon ingot by use of such crucible assembly. The crucible assembly of the invention includes a crucible body and a fiber textile article. The fiber textile article is made of a plurality of carbon fibers, and is loaded on a bottom of the crucible body. The fiber textile article has a plurality of intrinsic pores randomly arranged.
    Type: Application
    Filed: January 16, 2015
    Publication date: July 16, 2015
    Inventors: Wen-Huai YU, Hung-Sheng CHOU, Yu-Min YANG, Kuo-Wei CHUANG, Sung-Lin HSU, I-Ching LI, Wen-Ching HSU
  • Patent number: 9080252
    Abstract: An approach is provided for a method to manufacture a crystalline silicon ingot. The method comprises providing a mold formed for melting and cooling a silicon feedstock by using a directional solidification process, disposing a barrier layer inside the mold, disposing one or more silicon crystal seeds on the barrier layer, loading the silicon feedstock on the silicon crystal seeds, heating the mold to obtain a silicon melt, and cooling the mold by the directional solidification process to solidify the silicon melt into a silicon ingot. The mold is heated until the silicon feedstock is fully melted and the silicon crystal seeds are at least partially melted.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: July 14, 2015
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Chung-Wen Lan, Ya-Lu Tsai, Sung-Lin Hsu, Chao-Kun Hsieh, Wen-Chieh Lan, Wen-Ching Hsu
  • Patent number: 9051664
    Abstract: The instant disclosure relates to a nanostructuring process for an ingot surface prior to the slicing operation. A surface treatment step is performed for at least one surface of the ingot in forming a nanostructure layer thereon. The nanostructure layer is capable of enhancing the mechanical strength of the ingot surface to reduce the chipping ratio of the wafer during slicing.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: June 9, 2015
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Jiunn-Yih Chyan, Jian-Jhih Li, Kun-Lin Yang, Wen-Ching Hsu
  • Publication number: 20150140271
    Abstract: The invention provides an optical device and manufacture thereof. The optical device of the invention includes a transparent substrate, a seeding layer, a plurality of nano-rods and a protection layer. The seeding layer is formed to overlay an entrance surface and an exit surface of the transparent substrate. The plurality of nano-rods are formed on the seeding layer. The protection layer is formed to completely overlay the plurality of nano-rods.
    Type: Application
    Filed: November 21, 2014
    Publication date: May 21, 2015
    Inventors: MIIN-JANG CHEN, WEN-CHING HSU
  • Patent number: 8890275
    Abstract: The invention discloses an optoelectronic device and method of fabricating the same. The optoelectronic device according to the invention includes a semiconductor structure combination, a first surface passivation layer formed on an upper surface of the semiconductor structure combination, and a second surface passivation layer formed on the first surface passivation layer. The semiconductor structure combination includes at least one P-N junction. In particular, the interfacial state density of the first surface passivation layer is lower than that of the second surface passivation layer, and the fixed oxide charge density of the second surface passivation layer is higher than that of the first surface passivation layer.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: November 18, 2014
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Miin-Jang Chen, Hsin-Jui Chen, Wen-Ching Hsu
  • Publication number: 20140220301
    Abstract: The invention provides an epitaxial substrate and fabrication thereof. The epitaxial substrate according to the invention includes a crystalline substrate. In particular, the crystalline substrate has an epitaxial surface which is nano-rugged and non-patterned. The epitaxial substrate according to the invention thereon benefits a compound semiconductor material in growth of epitaxy films with excellent quality. Moreover, the fabrication of the epitaxial substrate according to the invention has advantages of low cost and rapid production.
    Type: Application
    Filed: April 11, 2014
    Publication date: August 7, 2014
    Inventors: Jiunn-Yih CHYAN, Jer-Liang YEH, Wen-Ching HSU, Suz-Hua HO
  • Publication number: 20140186631
    Abstract: The invention discloses a seed used for crystalline silicon ingot casting. A seed according to a preferred embodiment of the invention includes a crystal and an impurity diffusion-resistant layer. The crystal is constituted by at least one grain. The impurity diffusion-resistant layer is formed to overlay an outer surface of the crystal. A crystalline silicon ingot fabricated by use of the seed of the invention has significantly reduced red zone and yellow zone.
    Type: Application
    Filed: December 23, 2013
    Publication date: July 3, 2014
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Hung-Sheng CHOU, Yu-Tsung CHIANG, Yu-Min YANG, Ming-Kung HSIAO, Wen-Huai YU, Sung-Lin HSU, I-Ching LI, Chung-Wen LAN, Wen-Ching HSU
  • Patent number: 8749002
    Abstract: A structure and method for air cavity packaging, the structure comprises a carrier having plural die pads and leads, plural dies, plural wires, plural walls, and a lid. The dies are mounted on the die pads. The wires electrically connect the dies to the leads. The plural walls are disposed on the carrier and form plural cavities in a way that each cavity contains at least one die pad and plural leads, and each wall is provided with at least one air vent for exhausting air to the outside. The lid is attached on the plural walls via an adhesive agent to seal the plural air cavities, so that the plural connected air cavity packages are formed.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: June 10, 2014
    Assignee: Win Semiconductors Corp.
    Inventors: Zi-Hong Fu, Sung-Mao Yang, Chun-Ting Chu, Wen-Ching Hsu
  • Patent number: 8742442
    Abstract: A method for patterning an epitaxial substrate includes: (a) forming an etch mask layer over an epitaxial substrate, and patterning the etch mask layer using a patterned cover mask layer to form the etch mask layer into a plurality of spaced apart mask patterns; and (b) etching the epitaxial substrate that is exposed from the mask patterns, and removing the mask patterns such that the epitaxial substrate is formed with a plurality of spaced apart substrate patterns.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: June 3, 2014
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Cheng-Hung Wei, Bo-Wen Lin, Ching-Yen Peng, Hao-Chung Kuo, Wen-Ching Hsu
  • Publication number: 20140127496
    Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.
    Type: Application
    Filed: January 14, 2014
    Publication date: May 8, 2014
    Applicant: SINO-AMERICAN SILICON PRODUCTS INC.
    Inventors: Wen-Huai YU, Cheng-Jui YANG, Yu-Min YANG, Kai-Yuan PAI, Wen-Chieh LAN, Chan-Lu SU, Yu-Tsung CHIANG, Sung-Lin HSU, Wen-Ching HSU, Chung-Wen LAN