Abstract: A dopant boost in the source/drain regions of a semiconductor device, such as a transistor can be provided. A semiconductor device can include a doped epitaxy of a first material having a plurality of boosting layers embedded within. The boosting layers can be of a second material different from the first material. Another device can include a source/drain feature of a transistor. The source/drain feature includes a doped source/drain material and one or more embedded distinct boosting layers. A method includes growing a boosting layer in a recess of a substrate, where the boosting layer is substantially free of dopant. The method also includes growing a layer of doped epitaxy in the recess on the boosting layer.

Abstract: A method for phosphorus removal and recovery using an organic carbon source of urban sewage, including: first filling a biofilm reactor with sewage; stirring under anaerobic conditions, phosphorus being released from a polyphosphate biofilm using an organic carbon source in the sewage; discharging a portion of the sewage after the aforementioned treatment into a recovery tank and storing same as a recovery liquid; performing aerobic aeration on the remaining part of the sewage after anaerobic treatment, such that phosphorus is absorbed by the polyphosphate biofilm until the concentration of phosphorus reaches a requirement for discharge; turning off the aeration device and discharging the sewage; returning the recovery liquid to the biofilm reactor, simultaneously adding sewage to fill the reactor, and repeating the aforementioned steps multiple times; and obtaining a phosphorus recovery liquid when the concentration of phosphorus in the recovery liquid reaches the requirements for a phosphorus recovery proce

Abstract: A method for cleaning a plasma processing chamber comprising one or more cycles is provided. Each cycle comprises performing an oxygen containing plasma cleaning phase, performing a volatile chemistry type residue cleaning phase, and performing a fluorine containing plasma cleaning phase.

Abstract: A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below ?20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.

Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.

Abstract: Various embodiments herein relate to methods, apparatus, and systems for etching a feature in a substrate. Typically the feature is etched in a dielectric-containing stack. The etching process involves cyclically etching the feature and depositing a protective film on sidewalls of the partially etched feature. These stages are repeated until the feature reaches its final depth. The protective film may have a particular composition, for example including at least one of a tungsten carbonitride, a tungsten sulfide, tin, a tin-containing compound, molybdenum, a molybdenum-containing compound, a ruthenium carbonitride, a ruthenium sulfide, an aluminum carbonitride, an aluminum sulfide, zirconium, and a zirconium-containing compound. A number of optional steps may be taken including, for example, doping the mask layer, pre-treating the substrate prior to deposition, removing the protective film from the sidewalls, and oxidizing any remaining protective film.

Abstract: Some implementations described herein provide a method that includes forming a set of fins of a device, where the set of fins comprises an isolation fin disposed between a first fin and a second fin of the set of fins. The method also includes forming an isolation structure on at least one side of the isolation fin, with the isolation fin providing electrical isolation between the first fin and the second fin of the set of fins. Additionally, or alternatively, some implementations described herein provide a method that includes forming a funnel-shaped isolation structure between a first set of fins and a second set of fins. Additionally, or alternatively, some implementations described herein provide a method that includes forming, after forming a first gate structure and a second gate structure, an isolation structure between the first gate structure and the second gate structure.

Abstract: A semiconductor device and method includes: forming a gate stack over a substrate; growing a source/drain region adjacent the gate stack, the source/drain region being n-type doped Si; growing a semiconductor cap layer over the source/drain region, the semiconductor cap layer having Ge impurities, the source/drain region free of the Ge impurities; depositing a metal layer over the semiconductor cap layer; annealing the metal layer and the semiconductor cap layer to form a silicide layer over the source/drain region, the silicide layer having the Ge impurities; and forming a metal contact electrically coupled to the silicide layer.

Abstract: A method, a system and a recording medium for accessory pairing are provided. The method comprises: determining a type of the accessory based on the identifying information of an accessory; recognizing a type of a user body part according to an image; in response to the accessory is applicable to the user body part according to the type of accessory and the type of the user body part, obtaining a first position of the accessory within an environment and obtaining a second position of the user body part within the environment; and configuring the accessory to pair the user body part according to the first position of the accessory and the second position of the user body part.

Abstract: The present disclosure relates to a phenyl-modified polydimethylsiloxane (PDMS) separation membrane, a fabrication method thereof, and a use thereof in the separation of an aromatic compound, and belongs to the technical field of separation membrane materials. A phenyl-modified PDMS separation membrane comprising a substrate layer and a selective layer is provided.

Abstract: A method for selectively etching at least one feature in a silicon oxide region with respect to a lower oxygen containing region is provided. An etch gas comprising a metalloid or metal containing precursor and a halogen containing component is provided. The etch gas is formed into a plasma. At least one feature in the silicon oxide region is selectively etched with respect to the lower oxygen containing region, while simultaneously forming a metalloid or metal containing hardmask over the lower oxygen containing region.

Abstract: In a method for transmit beamforming of a two-dimensional array of ultrasonic transducers, a beamforming pattern to apply to a beamforming space of the two-dimensional array of ultrasonic transducers is defined. The beamforming space includes a plurality of elements, where each element of the beamforming space corresponds to an ultrasonic transducer of the two-dimensional array of ultrasonic transducers, where the beamforming pattern identifies which ultrasonic transducers within the beamforming space are activated during a transmit operation of the two-dimensional array of ultrasonic transducers, such that a generated ultrasonic beam is focused for reflecting from an object in contact with a contact surface of a platen overlying the two-dimensional array of ultrasonic transducers. The beamforming pattern is applied to the two-dimensional array of ultrasonic transducers. A transmit operation is performed by activating the ultrasonic transducers of the beamforming space according to the beamforming pattern.

Abstract: A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below ?20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.

Abstract: Methods for making thin-films on semiconductor substrates, may be patterned using EUV, include: depositing the organometallic polymer-like material onto the surface of the semiconductor substrate, exposing the surface to EUV to form a pattern, and developing the pattern for later transfer to underlying layers. The depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.

Abstract: In an embodiment, a device includes: an isolation region on a substrate; a first semiconductor fin protruding above the isolation region; a second semiconductor fin protruding above the isolation region; and a dielectric fin between the first semiconductor fin and the second semiconductor fin, the dielectric fin protruding above the isolation region, the dielectric fin including: a first layer including a first dielectric material having a first carbon concentration; and a second layer on the first layer, the second layer including a second dielectric material having a second carbon concentration, the second carbon concentration greater than the first carbon concentration.

Abstract: Etching a refractory metal or other high surface binding energy material on a substrate can maintain or increase the smoothness of the metal/high EO surface, in some cases produce extreme smoothing. A substrate having an exposed refractory metal/high EO surface is provided. The refractory metal/high EO surface is exposed to a modification gas to modify the surface and form a modified refractory metal/high EO surface. The modified refractory metal/high EO surface is exposed to an energetic particle to preferentially remove the modified refractory metal/high EO surface relative to an underlying unmodified refractory metal/high EO surface such that the exposed refractory metal/high EO surface after removing the modified refractory metal/high EO surface is as smooth or smoother than the substrate surface before exposing the substrate surface to the modification gas.

Abstract: A display substrate, a preparation method therefor, and a display apparatus. The display substrate includes a first metal layer, a metal oxide layer and a second metal layer, which are stacked on a base. The metal oxide layer includes a first active layer, the first active layer including a channel region, a source transition region, and a drain transition region, wherein both the source transition region and the drain transition region comprise a first region and a second region.

Abstract: Methods and processes to identify neoplastic tissue antigens derived from alternative splicing (AS) are described, in accordance with various embodiments of the invention. Also described are novel tumor antigens that are useful as targets in various immunotherapeutic approaches to treating brain cancer as well as novel engineered T cell Receptors (TCRs) and chimeric antigen receptors (CARs) that target these antigenic peptides.

Abstract: A method is provided. A substrate situated in a chamber is exposed to a halogen-containing gas comprising an element selected from the group consisting of silicon, germanium, carbon, titanium, and tin, and igniting a plasma to modify a surface of the substrate and form a modified surface.

Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.