Abstract: A method for forming a semiconductor device is provided. The method includes forming a gate stack to partially cover a semiconductor structure. The method also includes forming a first semiconductor material over the semiconductor structure. The method further includes forming a second semiconductor material over the first semiconductor material. In addition, the method includes forming a third semiconductor material over the second semiconductor material. The first semiconductor material and the third semiconductor material together surround the second semiconductor material. The second semiconductor material has a greater dopant concentration than that of the first semiconductor material or that of the third semiconductor material.

Abstract: Methods and apparatuses for etching semiconductor material on substrates using atomic layer etching by chemisorption, by deposition, or by both chemisorption and deposition mechanisms in combination with oxide passivation are described herein. Methods involving atomic layer etching using a chemisorption mechanism involve exposing the semiconductor material to chlorine to chemisorb chlorine onto the substrate surface and exposing the modified surface to argon to remove the modified surface. Methods involving atomic layer etching using a deposition mechanism involve exposing the semiconductor material to a sulfur-containing gas and hydrogen to deposit and thereby modify the substrate surface and removing the modified surface.

Abstract: In a method for transmit beamforming of a two-dimensional array of ultrasonic transducers, a beamforming pattern to apply to a beamforming space of the two-dimensional array of ultrasonic transducers is defined. The beamforming space includes a plurality of elements, where each element of the beamforming space corresponds to an ultrasonic transducer of the two-dimensional array of ultrasonic transducers, where the beamforming pattern identifies which ultrasonic transducers within the beamforming space are activated during a transmit operation of the two-dimensional array of ultrasonic transducers, and wherein at least some of the ultrasonic transducers that are activated are phase delayed with respect to other ultrasonic transducers that are activated. The beamforming pattern is applied to the two-dimensional array of ultrasonic transducers. A transmit operation is performed by activating the ultrasonic transducers of the beamforming space according to the beamforming pattern.

Abstract: Methods of and apparatuses for processing substrates having carbon-containing material using atomic layer etch and selective deposition are provided. Methods involve exposing a carbon-containing material on a substrate to an oxidant and igniting a first plasma to modify a surface of the substrate and exposing the modified surface to a second plasma at a bias power to remove the modified surface. Methods also involve selectively depositing a second carbon-containing material onto the substrate using a precursor having a chemical formula of CxHy, where x and y are integers greater than or equal to 1. ALE and selective deposition may be performed without breaking vacuum.

Abstract: A control method suitable for a mobile device comprising a camera includes operations as follows: obtaining a description of a first wireless device adjacent to the mobile device through a wireless communication packet; capturing a first image of a physical environment by the camera; recognizing a first candidate object within the first image; matching the first candidate object with the description of the first wireless device; and in response to that the first candidate object matches with the description of the first wireless device and a first predetermined instruction is received, generating a first command according to the description of the first wireless device, wherein the first command is to be transmitted to the first wireless device over a wireless communication for manipulating the first wireless device.

Abstract: A method of forming a gate dielectric material includes forming a high-K dielectric material in a first region over a substrate, where forming the high-K dielectric material includes forming a first dielectric layer comprising hafnium over the substrate, and forming a second dielectric layer comprising lanthanum over the first dielectric layer.

Abstract: The present disclosure describes an exemplary method to form p-type fully strained channel (PFSC) or an n-type fully strained channel (NFSC) that can mitigate epitaxial growth defects or structural deformations in the channel region due to processing. The exemplary method can include (i) two or more surface pre-clean treatment cycles with nitrogen trifluoride (NF3) and ammonia (NH3) plasma, followed by a thermal treatment; (ii) a prebake (anneal); and (iii) a silicon germanium epitaxial growth with a silicon seed layer, a silicon germanium seed layer, or a combination thereof.

Abstract: A virtual fabrication environment for semiconductor device fabrication that determines a lowest lithography exposure dose range in which one or more defects are still reparable by deposition and etch operations is discussed. Further techniques for repairing line edge roughness caused by lithography are described.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a gate stack to partially cover a semiconductor structure. The method also includes forming a first semiconductor material over the semiconductor structure. The method further includes forming a second semiconductor material over the first semiconductor material. In addition, the method includes forming a third semiconductor material over the second semiconductor material. The first semiconductor material and the third semiconductor material together surround the second semiconductor material. The second semiconductor material has a greater dopant concentration than that of the first semiconductor material or that of the third semiconductor material.

Abstract: A method includes forming a gate stack of a transistor. The formation of the gate stack includes forming a silicon oxide layer on a semiconductor region, depositing a hafnium oxide layer over the silicon oxide layer, depositing a lanthanum oxide layer over the hafnium oxide layer, and depositing a work-function layer over the lanthanum oxide layer. Source/drain regions are formed on opposite sides of the gate stack.

Abstract: A FinFET device and method of forming the same are disclosed. The method includes forming a gate dielectric layer and depositing a metal oxide layer over the gate dielectric layer. The method also includes annealing the gate dielectric layer and the metal oxide layer, causing ions to diffuse from the metal oxide layer to the gate dielectric layer to form a doped gate dielectric layer. The method also includes forming a work function layer over the doped gate dielectric layer, and forming a gate electrode over the work function layer.

Abstract: A control method suitable for a mobile device comprising a camera includes operations as follows: obtaining a description of a first wireless device adjacent to the mobile device over a first wireless communication; capturing a first image of a physical environment by the camera; recognizing a first candidate object within the first image; matching the first candidate object with the description of the first wireless device; and in response to that the first candidate object matches with the description of the first wireless device and a first predetermined instruction is received by the camera, generating a first command according to the description of the first wireless device, wherein the first command is to be transmitted to the first wireless device over a second wireless communication for manipulating the first wireless device.

Abstract: An ultrasonic sensor includes a two-dimensional array of ultrasonic transducers. A signal generator is configured to generate a plurality of transmit signals, wherein each transmit signal of the plurality of transmit signals has a different phase delay relative to other transmit signals of the plurality of transmit signals. A plurality of shift registers is configured to store a beamforming space including a beamforming pattern to apply to the two-dimensional array, wherein the beamforming pattern identifies a transmit signal of the plurality of transmit signals that is applied to each ultrasonic transducer of the beamforming space that is activated during a transmit operation. An array controller is configured to control activation of ultrasonic transducers during a transmit operation according to the beamforming pattern and configured to shift a position of the beamforming space within the plurality of shift registers such that the beamforming space moves within the two-dimensional array.

Abstract: A dopant boost in the source/drain regions of a semiconductor device, such as a transistor can be provided. A semiconductor device can include a doped epitaxy of a first material having a plurality of boosting layers embedded within. The boosting layers can be of a second material different from the first material. Another device can include a source/drain feature of a transistor. The source/drain feature includes a doped source/drain material and one or more embedded distinct boosting layers. A method includes growing a boosting layer in a recess of a substrate, where the boosting layer is substantially free of dopant. The method also includes growing a layer of doped epitaxy in the recess on the boosting layer.

Abstract: A method, a virtual reality (VR) apparatus and a recording medium for fast moving in a virtual reality are provided. The method is applicable to a VR apparatus including a head-mounted display (HMD), a locator and a calculation device. In the method, the calculation device executes an application of the VR to display frames of the application on the HMD. Then, the calculation device detects a moving direction of a user wearing the HMD in a three-dimensional space by using the locator. Afterwards, the calculation device fast moves a field of view of the frames from a current location toward the moving direction.

Abstract: Tin oxide film on a semiconductor substrate is etched selectively in a presence of silicon (Si), carbon (C), or a carbon-containing material (e.g., photoresist) by exposing the substrate to a process gas comprising hydrogen (H2) and a hydrocarbon. The hydrocarbon significantly improves the etch selectivity. In some embodiments an apparatus for processing a semiconductor substrate includes a process chamber configured for housing the semiconductor substrate and a controller having program instructions on a non-transitory medium for causing selective etching of a tin oxide layer on a substrate in a presence of silicon, carbon, or a carbon-containing material by exposing the substrate to a plasma formed in a process gas that includes H2 and a hydrocarbon.

Abstract: Tin oxide films are used as spacers and hardmasks in semiconductor device manufacturing. In one method, tin oxide layer is formed conformally over sidewalls and horizontal surfaces of protruding features on a substrate. A passivation layer is then formed over tin oxide on the sidewalls, and tin oxide is then removed from the horizontal surfaces of the protruding features without being removed at the sidewalls of the protruding features. The material of the protruding features is then removed while leaving the tin oxide that resided at the sidewalls of the protruding features, thereby forming tin oxide spacers. Hydrogen-based and chlorine-based dry etch chemistries are used to selectively etch tin oxide in a presence of a variety of materials. In another method a patterned tin oxide hardmask layer is formed on a substrate by forming a patterned layer over an unpatterned tin oxide and transferring the pattern to the tin oxide.

Abstract: The present disclosure describes an exemplary method to form p-type fully strained channel (PFSC) or an n-type fully strained channel (NFSC) that can mitigate epitaxial growth defects or structural deformations in the channel region due to processing. The exemplary method can include (i) two or more surface pre-clean treatment cycles with nitrogen trifluoride (NF3) and ammonia (NH3) plasma, followed by a thermal treatment; (ii) a prebake (anneal); and (iii) a silicon germanium epitaxial growth with a silicon seed layer, a silicon germanium seed layer, or a combination thereof.

Abstract: A FinFET device and method of forming the same are disclosed. The method includes forming a gate dielectric layer and depositing a metal oxide layer over the gate dielectric layer. The method also includes annealing the gate dielectric layer and the metal oxide layer, causing ions to diffuse from the metal oxide layer to the gate dielectric layer to form a doped gate dielectric layer. The method also includes forming a work function layer over the doped gate dielectric layer, and forming a gate electrode over the work function layer.

Abstract: A dopant boost in the source/drain regions of a semiconductor device, such as a transistor can be provided. A semiconductor device can include a doped epitaxy of a first material having a plurality of boosting layers embedded within. The boosting layers can be of a second material different from the first material. Another device can include a source/drain feature of a transistor. The source/drain feature includes a doped source/drain material and one or more embedded distinct boosting layers. A method includes growing a boosting layer in a recess of a substrate, where the boosting layer is substantially free of dopant. The method also includes growing a layer of doped epitaxy in the recess on the boosting layer.