Abstract: Etching a refractory metal or other high surface binding energy material on a substrate can maintain or increase the smoothness of the metal/high EO surface, in some cases produce extreme smoothing. A substrate having an exposed refractory metal/high EO surface is provided. The refractory metal/high EO surface is exposed to a modification gas to modify the surface and form a modified refractory metal/high EO surface. The modified refractory metal/high EO surface is exposed to an energetic particle to preferentially remove the modified refractory metal/high EO surface relative to an underlying unmodified refractory metal/high EO surface such that the exposed refractory metal/high EO surface after removing the modified refractory metal/high EO surface is as smooth or smoother than the substrate surface before exposing the substrate surface to the modification gas.

Abstract: A method for etching features in a stack below a patterned mask in an etch chamber is provided. The stack is cooled with a coolant with a coolant temperature below ?20° C. An etch gas is flowed into the etch chamber. A plasma is generated from the etch gas. Features are selectively etched into the stack with respect to the patterned mask.

Abstract: A virtual fabrication environment for semiconductor device fabrication that determines a lowest lithography exposure dose range in which one or more defects are still reparable by deposition and etch operations is discussed. Further techniques for repairing line edge roughness caused by lithography are described.

Abstract: A semiconductor device and method includes: forming a gate stack over a substrate; growing a source/drain region adjacent the gate stack, the source/drain region being n-type doped Si; growing a semiconductor cap layer over the source/drain region, the semiconductor cap layer having Ge impurities, the source/drain region free of the Ge impurities; depositing a metal layer over the semiconductor cap layer; annealing the metal layer and the semiconductor cap layer to form a silicide layer over the source/drain region, the silicide layer having the Ge impurities; and forming a metal contact electrically coupled to the silicide layer.

Abstract: A motion detection system, a motion detection method and a computer-readable recording medium thereof are provided. The motion detection system includes one or more haptic feedback devices and a motion sensor. The haptic feedback devices are equipped with one or more haptic feedback elements. The haptic feedback elements are configured to perform a haptic feedback. The haptic feedback elements are triggered to perform a haptic feedback according to a haptic feedback command. A detection value from the motion sensor is modified in response to the haptic feedback elements being triggered by the haptic feedback command. Accordingly, the precision for positioning the haptic feedback devices can be improved.

Abstract: The present disclosure describes an exemplary fabrication method of a p-type fully strained channel that can suppress the formation of {111} facets during a silicon germanium epitaxial growth. The exemplary method includes the formation of silicon epitaxial layer on a top, carbon-doped region of an n-type region. A recess is formed in the silicon epitaxial layer via etching, where the recess exposes the top, carbon-doped region of the n-type region. A silicon seed layer is grown in the recess, and a silicon germanium layer is subsequently epitaxially grown on the silicon seed layer to fill the recess. The silicon seed layer can suppress the formation of growth defects such as, for example, {111} facets, during the silicon germanium epitaxial layer growth.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a gate stack to partially cover a semiconductor structure. The method also includes forming a first semiconductor material over the semiconductor structure. The method further includes forming a second semiconductor material over the first semiconductor material. In addition, the method includes forming a third semiconductor material over the second semiconductor material. The first semiconductor material and the third semiconductor material together surround the second semiconductor material. The second semiconductor material has a greater dopant concentration than that of the first semiconductor material or that of the third semiconductor material.

Abstract: A fin field effect transistor (FinFET) device structure and method for forming the same are provided. The FinFET device structure includes a fin structure extending above a substrate. The fin structure includes a channel region, a portion of the channel region is made of silicon germanium (SiGe), and the silicon germanium (SiGe) has a gradient germanium (Ge) concentration. The FinFET device structure includes a gate structure formed on the channel region of the fin structure.

Abstract: Methods and apparatus for performing high energy atomic layer etching are provided herein. Methods include providing a substrate having a material to be etched, exposing a surface of the material to a modification gas to modify the surface and form a modified surface, and exposing the modified surface to an energetic particle to preferentially remove the modified surface relative to an underlying unmodified surface where the energetic particle has an ion energy sufficient to overcome an average surface binding energy of the underlying unmodified surface. The energy of the energetic particle used is very high; in some cases, the power applied to a bias used when exposing the modified surface to the energetic particle is at least 150 eV.

Abstract: A laser detecting device able to detect and map all the contours a target object can configure and apply at least two scanning point groups on the target object. Each scanning point group includes at least two scanning points. The laser detecting device includes four light sources at different angles of incidence in relation to a diffracting element. A beam receiving element receives all the light reflected by the target object, and a central controller records emitting and receiving times of the light emitted and received. The detection beams sequentially scan the at least two scanning point groups as the central controller switches on in turn one of the four light sources as the others are powered off. Processing of data from the beam receiving element enables a three-dimensional image of the target object to be obtained.

Abstract: A FinFET device and method of forming the same are disclosed. The method includes forming a gate dielectric layer and depositing a metal oxide layer over the gate dielectric layer. The method also includes annealing the gate dielectric layer and the metal oxide layer, causing ions to diffuse from the metal oxide layer to the gate dielectric layer to form a doped gate dielectric layer. The method also includes forming a work function layer over the doped gate dielectric layer, and forming a gate electrode over the work function layer.

Abstract: A method includes providing a substrate having a gate structure over a first side of the substrate, forming a recess adjacent to the gate structure, and forming in the recess a first semiconductor layer having a dopant, the first semiconductor layer being non-conformal, the first semiconductor layer lining the recess and extending from a bottom of the recess to a top of the recess. The method further includes forming a second semiconductor layer having the dopant in the recess and over the first semiconductor layer, a second concentration of the dopant in the second semiconductor layer being higher than a first concentration of the dopant in the first semiconductor layer.

Abstract: In a method for transmit beamforming of a two-dimensional array of ultrasonic transducers, a beamforming pattern to apply to a beamforming space of the two-dimensional array of ultrasonic transducers is defined. The beamforming space includes a plurality of elements, where each element of the beamforming space corresponds to an ultrasonic transducer of the two-dimensional array of ultrasonic transducers, where the beamforming pattern identifies which ultrasonic transducers within the beamforming space are activated during a transmit operation of the two-dimensional array of ultrasonic transducers, and wherein at least some of the ultrasonic transducers that are activated are phase delayed with respect to other ultrasonic transducers that are activated. The beamforming pattern is applied to the two-dimensional array of ultrasonic transducers. A transmit operation is performed by activating the ultrasonic transducers of the beamforming space according to the beamforming pattern.

Abstract: Provided herein are methods and related apparatus that facilitate patterning by performing highly non-conformal (directional) deposition on patterned structures. The methods involve depositing films on a patterned structure, such as a hard mask. The deposition may be both substrate-selective such that the films have high etch selectivity with respect to an underlying material to be etched and pattern-selective such that the films are directionally deposited to replicate the pattern of the patterned structure. In some embodiments, the deposition is performed in the same chamber as a subsequent etch is performed. In some embodiments, the deposition may be performed in a separate chamber (e.g., a PECVD deposition chamber) that is connected to the etch chamber by a vacuum transfer chamber. The deposition may be performed prior to or at selected intermittences during at etch process. In some embodiments, the deposition involves multiple cycles of a deposition and treatment process.

Abstract: The present disclosure relates to treatment of a pulmonary disease. The methods and kits provided herein facilitate relieving the symptoms resulting from the pulmonary disease (e.g., asthma, chronic obstructive pulmonary disease (COPD), etc.).

Abstract: A method of forming a gate dielectric material includes forming a high-K dielectric material in a first region over a substrate, where forming the high-K dielectric material includes forming a first dielectric layer comprising hafnium over the substrate, and forming a second dielectric layer comprising lanthanum over the first dielectric layer.

Abstract: Methods and apparatus for performing high energy atomic layer etching are provided herein. Methods include providing a substrate having a material to be etched, exposing a surface of the material to a modification gas to modify the surface and form a modified surface, and exposing the modified surface to an energetic particle to preferentially remove the modified surface relative to an underlying unmodified surface where the energetic particle has an ion energy sufficient to overcome an average surface binding energy of the underlying unmodified surface. The energy of the energetic particle used is very high; in some cases, the power applied to a bias used when exposing the modified surface to the energetic particle is at least 150 eV.

Abstract: A method for patterning a substrate including multiple layers using a sulfur-based mask includes providing a substrate including a first layer and a second layer arranged on the first layer. The first layer includes a material selected from a group consisting of germanium, silicon germanium and type III/V materials. The method includes depositing a mask layer including sulfur species on sidewalls of the first layer and the second layer by exposing the substrate to a first wet chemistry. The method includes removing the mask layer on the sidewalls of the second layer while not completely removing the mask layer on the sidewalls of the first layer by exposing the substrate to a second wet chemistry. The method includes selectively etching the second layer relative to the first layer and the mask layer on the sidewalls of the first layer by exposing the substrate to a third wet chemistry.

Abstract: A method includes forming a gate stack of a transistor. The formation of the gate stack includes forming a silicon oxide layer on a semiconductor region, depositing a hafnium oxide layer over the silicon oxide layer, depositing a lanthanum oxide layer over the hafnium oxide layer, and depositing a work-function layer over the lanthanum oxide layer. Source/drain regions are formed on opposite sides of the gate stack.

Abstract: A method includes providing a substrate having a gate structure over a first side of the substrate, forming a recess adjacent to the gate structure, and forming in the recess a first semiconductor layer having a dopant, the first semiconductor layer being non-conformal, the first semiconductor layer lining the recess and extending from a bottom of the recess to a top of the recess. The method further includes forming a second semiconductor layer having the dopant in the recess and over the first semiconductor layer, a second concentration of the dopant in the second semiconductor layer being higher than a first concentration of the dopant in the first semiconductor layer.