Power semiconductor module
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Description
Broken lines form no part of the claimed design and surface shading represents contour and not surface ornamentation.
Claims
The ornamental design for a power semiconductor module, as shown and described.
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Patent History
Patent number: D762597
Type: Grant
Filed: Feb 3, 2015
Date of Patent: Aug 2, 2016
Assignee: Infineon Technologies AG (Neubiberg)
Inventors: Andras Bertalan (Warstein-Allagen), Georg Borghoff (Warstein), Alexander Hoehn (Soest)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/516,507
Type: Grant
Filed: Feb 3, 2015
Date of Patent: Aug 2, 2016
Assignee: Infineon Technologies AG (Neubiberg)
Inventors: Andras Bertalan (Warstein-Allagen), Georg Borghoff (Warstein), Alexander Hoehn (Soest)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/516,507
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)