Patents Issued in July 5, 2001
  • Publication number: 20010006211
    Abstract: An optical recording/reproducing apparatus and method to determine a type of disk including a photodetector divided into at least two light receiving sections in a radial direction. A radial subtractor generates a radial push-pull signal from a difference between light receiving signals from a disk and received by the at least two light receiving sections, where the disk includes one of a first disk and a second disk. An upper envelope detector detects an upper envelope signal from the radial push-pull signal and a lower envelope detector detects a lower envelope signal from the radial push-pull signal. A phase comparator detects a phase difference between the upper envelope signal and the lower envelope signal. A type of disk determiner distinguishes the first disk from the second disk according to a magnitude of the phase difference and outputting a signal indicative thereof, where the second disk includes a density higher than the first disk.
    Type: Application
    Filed: December 4, 2000
    Publication date: July 5, 2001
    Inventors: Byoung-ho Choi, Byung-in Ma
  • Publication number: 20010006212
    Abstract: In a solid scanning optical writing device that writes images on a photoreceptor by turning ON/OFF many light shutter elements aligned in an alternating fashion in two rows in the main scanning direction, single-row illumination and double-row illumination of the light shutter elements are alternately performed on a time sharing basis prior to the image writing in order to perform high-quality light amount correction. The positions of the light shutter elements are identified from the light amount data obtained from single-row illumination, and the transmitted light amount for each light shutter element during double-row illumination is sought from the light amount data obtained from double-row illumination. Calculation for shading correction is then performed from these sets of data.
    Type: Application
    Filed: December 13, 2000
    Publication date: July 5, 2001
    Inventor: Atsushi Fujita
  • Publication number: 20010006213
    Abstract: The device is connectable to a specimen-carrier table of non-eucentric type for the acquisition, by means of a scanning electron microscopic, of images taken in an angularly offset manner for stereoscopic examination of a specimen. A specimen-carrier table comprises a support member which is translatable along a first, vertical axis, as well as along a second and a third horizontal axis of which one is parallel and the other orthogonal to the interocular direction of the observer, and is turnable about its own axis as well as about the second axis.
    Type: Application
    Filed: December 22, 2000
    Publication date: July 5, 2001
    Inventor: Piero Iulita
  • Publication number: 20010006214
    Abstract: An X-ray detector comprising a scintillator including a doped alkali halogenide, and comprising an array of photodiodes including at least one photodiode containing a semiconductor material, with a color transformer containing a photoluminescent phosphor being arranged between the scintillator and the array of photodiodes, enables a larger part of the X-radiation to be used for image analysis.
    Type: Application
    Filed: December 20, 2000
    Publication date: July 5, 2001
    Inventors: Herbert Friedrich Boerner, Hans Nikol, Herfried Karl Wieczorek
  • Publication number: 20010006215
    Abstract: Detection of submicron scale cracks and other mechanical and chemical surface anomalies using PET. This surface technique has sufficient sensitivity to detect single voids or pits of sub-millimeter size and single cracks or fissures of millimeter size; and single cracks or fissures of millimeter-scale length, micrometer-scale depth, and nanometer-scale length, micrometer-scale depth, and nanometer-scale width. This technique can also be applied to detect surface regions of differing chemical reactivity. It may be utilized in a scanning or survey mode to simultaneously detect such mechanical or chemical features over large interior or exterior surface areas of parts as large as about 50 cm in diameter. The technique involves exposing a surface to short-lived radioactive gas for a time period, removing the excess gas to leave a partial monolayer, determining the location and shape of the cracks, voids, porous regions, etc., and calculating the width, depth, and length thereof. Detection of 0.
    Type: Application
    Filed: January 4, 1999
    Publication date: July 5, 2001
    Applicant: Regents of the University of California
    Inventors: THOMAS E COWAN, RICHARD H HOWELL, CARLOS A COLMENARES
  • Publication number: 20010006216
    Abstract: A sample has a first mark and a second mark formed in a layer upper than the first mark on a Si substrate. The first and second marks are arrange such that they do not have an overlapping area in a direction in which relative positions of the first and second marks are measured. The sample is scanned with an electron beam, detecting a first scattered-electron signal from the sample on a line including the first mark, and a second scattered-electron signal from the sample on a line including the second mark. Based on the first and second scattered-electron signal, representative positions of the first and second marks are obtained, and a positional misalignment amount of the first and second marks is further obtained.
    Type: Application
    Filed: December 27, 2000
    Publication date: July 5, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Toru Koike
  • Publication number: 20010006217
    Abstract: A method of generating EUV radiation is described, comprising the steps of:
    Type: Application
    Filed: November 30, 2000
    Publication date: July 5, 2001
    Applicant: U. S. PHILIPS CORPORATION
    Inventor: Theodorus Hubertus Josephus Bisschops
  • Publication number: 20010006218
    Abstract: A motor-driven pan-tilt unit such as a pan-tilt camera mount designed to remotely control panning and tilting motion of, for example, a surveillance camera is provided.. The pan-tilt unit includes a pan mechanism, a transmitting unit, and an optical signal transmitting unit. The pan mechanism has a stationary housing and a rotary shaft in connection with the camera. The transmitting unit includes a plurality of conductive rings and a plurality of conductive contacts. Each of the conductive rings is mounted on one of the rotary shaft and an inner wall of the stationary housing in electrical contact with one of the conductive contacts to establish transmission of electric power and control signals required for a tilt mechanism and the camera. The optical signal transmitting unit includes a light-emitting element and a light-sensitive element.
    Type: Application
    Filed: December 27, 2000
    Publication date: July 5, 2001
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noboru Takada, Katsumi Yano
  • Publication number: 20010006219
    Abstract: An optical information processing apparatus for use in optical computing, optical image processing, and the like and, more particularly, a small-sized integrated optical information processing apparatus having multiple arrays, a high pixel density and a large number of pixels. The optical information processing apparatus includes a light emitting device array 11 in which light emitting devices 6 are inserted in through holes provided in a silicon substrate for receiving light emitting devices, a semiconductor arithmetic circuit chip 17, and a glass substrate 16 provided with diffraction type optical devices. Thus, a small-sized optical information processing apparatus having multiple arrays and a high pixel density can be realized.
    Type: Application
    Filed: December 28, 2000
    Publication date: July 5, 2001
    Inventors: Hideo Kawai, Kazushi Higashi
  • Publication number: 20010006220
    Abstract: An apparatus for evaluating a fiber web running in a card includes a camera for scanning the fiber web along a length and width portion thereof to detect useful fibers and empty locations in the fiber web and to generate signals representing the useful fibers and empty locations; and an evaluating device connected to the camera for determining a distribution of useful fibers per area unit in the fiber web from the signals.
    Type: Application
    Filed: January 10, 2001
    Publication date: July 5, 2001
    Inventor: Fritz Hosel
  • Publication number: 20010006221
    Abstract: Apparatus for reading information stored in a memory layer (15) which includes a shielding device (22), and an X-ray cassette and an X-ray table for use with the apparatus, are disclosed. The shielding device (22) serves to shield a reader device (10) from an information recording beam (25). The reader device (10) includes a receptor (12) to receive emission radiation (17) that contains an image of the information recorded in the memory layer (15). Instead of the shielding device (22), it is also possible to provide a converter (29) that serves to convert an information-recording beam (25) into converted radiation (28) that possesses less energy than the information recording beam (25).
    Type: Application
    Filed: December 12, 2000
    Publication date: July 5, 2001
    Inventors: Herbert Gebele, Juergen Mueller, Hans Schaller
  • Publication number: 20010006222
    Abstract: An X-Ray cassette (1) and a device (10) for reading information stored in a memory layer (15) are disclosed. This device (10) contains a radiation source (11) to excite a row (34) of the memory layer (15). The row (34) emits an emission radiation (17) because of this excitation. The device (10) based on the invention contains a receptor (12) to receive the emission radiation (17). The receptor (12) includes a number of light-sensitive surfaces (18) that are arranged in adjacent rows. According to the invention, the dimension of the light-sensitive surfaces (18) of the receptor (12) arranged perpendicular to the orientation (A) of the rows (34) is greater than that oriented along the row direction (B). Alternatively or additionally, the device can include an optical projector (14) by means of which the emission radiation (17) is projected onto the receptor (12).
    Type: Application
    Filed: December 12, 2000
    Publication date: July 5, 2001
    Inventors: Herbert Gebele, Robert Fasbender, Martin Lind, Juergen Mueller, Georg Reiser
  • Publication number: 20010006223
    Abstract: A transport device for X-ray cassettes, each having a phosphor sheet stimulable by X-rays, is provided in a cassette processing apparatus (100), which is of simple physical construction and allows rapid and reliable processing of X-ray cassettes of different formats in a space-saving and user-friendly fashion. The apparatus has a plurality of transporters (11, 12, 21, 22) which are arranged in a horizontal plane (E) and are spaced apart from one another in the transport direction (T) and also perpendicular thereto. A conveying mechanism (30) which, in the area of the spacings (A1, A2, A3) between the transport means, can be conveyed vertically in and out as far as the plane (E) in such a way that lowering effects a transfer of an X-ray cassette into a cassette receiving device (50), and raising effects a transfer out of the receiving device (50).
    Type: Application
    Filed: October 5, 1998
    Publication date: July 5, 2001
    Inventor: GERD HOITZ
  • Publication number: 20010006224
    Abstract: In chemical mechanical polishing of a substrate comprising a tantalum-containing metal film, a slurry for chemical mechanical polishing comprising a silica polishing grain and an inorganic salt in an amount of 0.01 wt % to 10 wt % both inclusive may be used to prevent dishing and erosion, as well as to achieve an improved polishing rate for tantalum without any damage to tantalum.
    Type: Application
    Filed: December 20, 2000
    Publication date: July 5, 2001
    Inventors: Yasuaki Tsuchiya, Tomoko Wake, Tetsuyuki Itakura, Shin Sakurai, Kenichi Aoyagi
  • Publication number: 20010006225
    Abstract: The present invention relates to a slurry used for chemical mechanical polishing of a substrate having a copper-containing film at the surface, which slurry contains an abrasive, an oxidizing agent, and an adhesion-inhibitor preventing adhesion of a polishing product to a polishing pad. With the polishing slurry of the present invention, even when the copper-containing metal film to be polished has a large thickness or a large area and therefore the amount of the copper-containing metal to be polished is large, adhesion of polishing product to a polishing pad is suppressed and CMP can be completed satisfactorily in a single polishing operation without discontinuation.
    Type: Application
    Filed: December 22, 2000
    Publication date: July 5, 2001
    Inventors: Yasuaki Tsuchiya, Tomoko Wake, Tetsuyuki Itakura, Shin Sakurai, Kenichi Aoyagi
  • Publication number: 20010006226
    Abstract: To sufficiently stabilize a hydroxyalkyl (meth)acrylate in spite of its easily polymerizable property, a hydroxyalkyl saturated-carboxylate and/or alkylene glycol as well as a phenol compound is added thereto.
    Type: Application
    Filed: December 1, 2000
    Publication date: July 5, 2001
    Applicant: Nippon Shokubai Co., Ltd.
    Inventors: Tokumasa Ishida, Yasuhiro Shingai, Masatoshi Ueoka
  • Publication number: 20010006227
    Abstract: A liquid crystal display element has a liquid crystal layer including at least nematic liquid crystal composition and a chiral agent and held between a pair of substrates.
    Type: Application
    Filed: December 26, 2000
    Publication date: July 5, 2001
    Inventors: Nobuyuki Kobayashi, Masako Iwamatsu, Katsuhiko Asai
  • Publication number: 20010006228
    Abstract: A plasma picture screen fitted with a phosphor layer comprising a red phosphor activated by Eu3+shows an improved red color point (x≧0.64 and y≦0.35) and shorter decay times &tgr;1/10 as compared with the standard phosphor (Y,Gd)BO3. The phosphor according to the invention has a lattice in which the activator Eu3+occupies a location which has no inversion symmetry.
    Type: Application
    Filed: December 19, 2000
    Publication date: July 5, 2001
    Applicant: U. S. Philips Corporation
    Inventors: Thomas Justel, Walter Mayr, Hans Nikol
  • Publication number: 20010006229
    Abstract: An inert-gas mixture for use in metal inert-gas welding, in particular of nickel materials, is distinguished by a proportion by volume of N2 of 0.5-2.0%, and the rest is argon.
    Type: Application
    Filed: December 15, 2000
    Publication date: July 5, 2001
    Inventors: Achim Wakum, Ulrich Sroka
  • Publication number: 20010006230
    Abstract: A manhole cover removing tool includes an elongated body having an upper end with a handle attached and a lower end defining a pivot area. A first elongated member is attached to the body so as to extend generally transversely therefrom in a first direction and terminate in a pointed end designed to engage an open pick hole type of manhole cover. A second elongated member is attached to the body so as to extend generally transversely therefrom in a second direction, generally opposite to the first direction, and terminate in a flattened end designed to engage a recessed pick hole type of manhole cover. In a preferred embodiment the handle, elongated body and one of the first and second elongated members are formed integrally from a single metal rod.
    Type: Application
    Filed: January 26, 2001
    Publication date: July 5, 2001
    Inventor: Garrett M. Goldman
  • Publication number: 20010006231
    Abstract: Methods and devices for providing temporary handrail systems such as those used to surround the periphery of a building rooftop. A number of handrail sections are reversibly interconnected to one another to form a continuous protective rail. In practice, the rail is quite stable and resistant to tipping. In described embodiments, the handrail systems of the present invention feature load-distributing support bases and weight support platforms. Weights are selectively added to the weight support platforms to anchor the handrail in place. The weight support platforms are located above the surface of the roof and do not contact the roof surface. The weight load is transmitted via a support leg downwardly to a load-distributing support base that is placed in contact with the roof. As a result, the roof membrane is not damaged by a point load applied to it. In addition, a portion of the weight load from the weight support platform is transmitted directly to the vertical support rails of the rail sections.
    Type: Application
    Filed: March 1, 2001
    Publication date: July 5, 2001
    Inventor: Ronald G. McCracken
  • Publication number: 20010006232
    Abstract: A triode field emission device using a field emission material and a driving method thereof are provided. In this device, gate electrodes serving to take electrons out of a field emission material on cathodes are installed on a substrate below the cathodes, so that the manufacture of the device is easy. Also, electrons emitted from the field emission material are controlled by controlling gate voltage.
    Type: Application
    Filed: December 28, 2000
    Publication date: July 5, 2001
    Inventors: Yong-soo Choi, Jun-hee Choi, Nae-sung Lee, Jong-min Kim
  • Publication number: 20010006233
    Abstract: Integrated circuits are provided which permit backside probing while being operated. Conductive trenches are fabricated into the surface of semiconductor chip at preselected locations. Access to specific electrically connected nodes of the integrated circuit can be effected through the conductive trenches by backside thinning and milling of the semiconductor chip followed by e-beam probe or mechanical probe usage.
    Type: Application
    Filed: January 29, 2001
    Publication date: July 5, 2001
    Inventor: David P. Vallett
  • Publication number: 20010006234
    Abstract: There are provided a semiconductor device having uniform electric characteristics that is a high insulation voltage transistor in which a low concentration impurity diffusion layer is used for a source region and a drain region, and a method of manufacturing the semiconductor device.
    Type: Application
    Filed: February 26, 2001
    Publication date: July 5, 2001
    Inventor: Kohji Kanamori
  • Publication number: 20010006235
    Abstract: To offer a semiconductor light-emitting device capable of preventing a short circuit failure caused by adhesion of the solder, change of a beam shape, and decrease of a beam output.
    Type: Application
    Filed: December 5, 2000
    Publication date: July 5, 2001
    Inventor: Masafumi Ozawa
  • Publication number: 20010006236
    Abstract: A semiconductor memory device has a hierarchical or divided wordline structure wordline structure. Sub-wordline activation signals are arranged such that the number of sub-wordline drive units in memory blocks to which one sub-wordline activation signal is supplied is identical to that of sub-wordline drive units in memory blocks to which the other sub-wordline activation signal is supplied. Upon such sub-wordline activation signal arrangement, power consumption is not imbalanced when each of the sub-wordline activation signals has high level of a boosting voltage.
    Type: Application
    Filed: January 5, 2001
    Publication date: July 5, 2001
    Applicant: Samsung Electronics
    Inventor: Jae-Hoon Kim
  • Publication number: 20010006237
    Abstract: A solid state image sensor is provided with a primary first-conductivity-type semiconductive region which serves as a charge storage region of a photo-sensing area and a secondary first-conductivity-type semiconductive region for enlarging a charge collecting region of the photo-sensing area.
    Type: Application
    Filed: December 27, 2000
    Publication date: July 5, 2001
    Applicant: Sony Corporation
    Inventor: Hideshi Abe
  • Publication number: 20010006238
    Abstract: An image sensor includes a plurality of unit pixels for sensing a light beam to generate an image data. Each of the unit pixels includes, a photoelectric element for sensing a light beam incident thereto and generating photoelectric charges, a transistor including a gate dielectric formed adjacent to the photoelectric element and a gate electrode formed on top of the gate dielectric and a capacitor structure including an insulating film formed on a portion of the photoelectric element and a bottom electrode, wherein the insulating film and the gate dielectric are made of a same material and the bottom electrode and the gate electrode are made of a same material.
    Type: Application
    Filed: December 19, 2000
    Publication date: July 5, 2001
    Inventors: Jin-Su Han, Hoon-Sang Oh
  • Publication number: 20010006239
    Abstract: A semiconductor device for use in a memory cell including an active matrix provided with a transistor and a first insulating layer formed around the transistor; a capacitor structure formed on top of the first insulating layer, composed of a bottom electrode, a capacitor thin film placed on top of the bottom electrode and a top electrode formed on top of the capacitor thin film; a second insulating layer formed on top of the transistor and the capacitor structure; a metal interconnection formed on top of the second insulating layer and the active matrix to electrically connect the transistor to the capacitor structure; and a hydrogen barrier layer formed on top of the metal interconnection.
    Type: Application
    Filed: December 19, 2000
    Publication date: July 5, 2001
    Inventors: Bee-Lyong Yang, Seaung-Suk Lee, Suk-Kyoung Hong, Nam-Soo Kang
  • Publication number: 20010006240
    Abstract: A method is provided for forming a contact in an integrated circuit by chemical vapor deposition (CVD). In one embodiment, a titanium precursor and a silicon precursor are contacted in the presence of hydrogen, to form titanium silicide. In another embodiment, a titanium precursor contacts silicon to form to form titanium silicide.
    Type: Application
    Filed: February 21, 2001
    Publication date: July 5, 2001
    Applicant: Micron Technology Inc.
    Inventors: Trung T. Doan, Gurtej Singh Sandhu, Kirk Prall, Sujit Sharan
  • Publication number: 20010006241
    Abstract: A semiconductor device for use in a memory cell including an active matrix provided with a transistor and a first insulating layer formed around the transistor; a capacitor structure, formed on top of the first insulating layer, composed of a bottom electrode, a capacitor thin film placed on top of the bottom electrode and a top electrode formed on top of the capacitor thin film; a hydrogen barrier layer, formed on the capacitor structure, for protecting the capacitor structure from hydrogen diffusion; a second insulating layer formed on top of the transistor and the capacitor structure; and a metal interconnection formed on top of the second insulating layer to electrically connect the transistor to the capacitor structure.
    Type: Application
    Filed: December 19, 2000
    Publication date: July 5, 2001
    Inventor: Bee-Lyong Yang
  • Publication number: 20010006242
    Abstract: A semiconductor device and a method for making a semiconductor device having a pillar-shaped capacitor storage node compatible with a high dielectric film, wherein the pillar shaped capacitor storage node includes a thick conductive metal layer that is easily etched and a thin conductive layer completely coating the thick conductive metal layer. The thin conductive layer protects the thick conductive metal layer during subsequent high dielectric deposition and annealing and various oxidation process.
    Type: Application
    Filed: February 23, 2001
    Publication date: July 5, 2001
    Inventors: Dong-Hwa Kwak, Yoo-Sang Hwang, Tae-Young Chung
  • Publication number: 20010006243
    Abstract: An input-output ESD protection device is formed on a semiconductor substrate. A MOS protection device has a drain diffusion layer, a gate, a source diffusion layer, and a body, respectively. An input-output pad is connected to the drain diffusion layer. An internal circuit is connected to the gate. A control circuit is connected to the body. A first fixed voltage terminal is connected to the source diffusion layer. The body is electrically isolated from the semiconductor substrate.
    Type: Application
    Filed: December 26, 2000
    Publication date: July 5, 2001
    Inventor: Yasuyuki Morishita
  • Publication number: 20010006244
    Abstract: A first isolating trench with a predetermined depth is formed in a region where high voltage semiconductor elements are formed on a semiconductor substrate, and a portion of the walls of the first isolating trench is etched corresponding to a depth of a second isolating trench shallower than the first isolating trench to form a third isolating trench. An oxide film filled into the third isolating trench provides isolation between the high voltage semiconductor elements. Then, the second isolating trench is formed in a region where low voltage semiconductor elements are formed, and an oxide film filled into the second isolating trench is used to provide isolation between the low voltage semiconductor elements.
    Type: Application
    Filed: December 11, 2000
    Publication date: July 5, 2001
    Applicant: NEC CORPORATION
    Inventors: Masakuni Shimizu, Eiji Io
  • Publication number: 20010006245
    Abstract: With a view to providing a technique for highly-selective etching of Ru (ruthenium) with a photoresist as an etching mask, an Ru film, which is an lower electrode material deposited on the side walls and bottom surface of a hole, is covered with a photoresist film, followed by isotropic dry etching in a gas atmosphere containing an ozone gas, whereby a portion of the Ru film outside of the hole is removed.
    Type: Application
    Filed: December 28, 2000
    Publication date: July 5, 2001
    Inventors: Takashi Yunogami, Yoshitaka Nakamura, Kazuo Nojiri, Sukeyoshi Tsunekawa, Toshiyuki Arai, Miwako Nakahara, Shigeru Ohno, Tomonori Saeki, Masaru Izawa
  • Publication number: 20010006246
    Abstract: A method of manufacturing semiconductor devices is provided, including the formation of a conductive plug and the minimizing of the step-height of an interlayer dielectric layer. An etching composition is also provided for such a manufacturing method. The method of manufacturing semiconductor devices includes the steps of forming an insulating layer over a semiconductor substrate, forming contact holes in the insulating layer, forming a conductive layer over the insulating layer to burying the contact holes, rotating the semiconductor substrate, and etching the conductive layer by supplying an etching composition on the rotating semiconductor substrate, and spin-etching the tungsten layer using an etching composition such that the conductive layer remains only inside the contact holes and does not remain over the insulating layer.
    Type: Application
    Filed: January 22, 2001
    Publication date: July 5, 2001
    Inventors: Gyu-Hwan Kwag, Se-Jong Ko, Kyung-Seuk Hwang, Jun-Ing Gil, Sang-O Park, Dae-Hoon Kim, Sang-Moon Chon, Ho-Kyoon Chung
  • Publication number: 20010006247
    Abstract: The present invention provides a layout structure of an interconnection which feeds a fixed voltage level to a sense amplifier provided in a cell array block of a semiconductor memory device, wherein the interconnection selectively extends only an inside of an outside edge of a second conductivity type outside well region provided along one peripheral side of a first conductivity type well region, in which the cell array block is provided.
    Type: Application
    Filed: December 22, 2000
    Publication date: July 5, 2001
    Applicant: NEC Corporation
    Inventor: Akemi Maruyama
  • Publication number: 20010006248
    Abstract: A micromachined structure having electrically isolated components is formed by thermomigrating a dopant through a substrate to form a doped region within the substrate. The doped region separates two portions of the substrate. The dopant is selected such that the doped region electrically isolates the two portions of the substrate from each other via junction isolation.
    Type: Application
    Filed: January 19, 2001
    Publication date: July 5, 2001
    Applicant: Georgia Tech Research Corporation
    Inventors: Mark G. Allen, Charles C. Chung
  • Publication number: 20010006249
    Abstract: A semiconductor structure including a silicon wafer having silicon regions, and at least one GexSi1−x region integrated within the silicon regions. The silicon and GexSi1−x regions can be substantially coplanar surfaces. The structure can include at least one electronic device configured in the silicon regions, and at least one electronic device of III-V materials configured in said at least one GexSi1−x region. The structure can be, for example, an integrated HI-V/Si semiconductor microchip. In accordance with another embodiment of the invention there is provided a method of fabricating a semiconductor structure, including providing a silicon wafer with a surface; forming a pattern of vias within the surface of the wafer; and depositing regions of GexSi1−x within vias. The method can include the step of processing the wafer so that the wafer and GexSi1−x regions have substantially coplanar surfaces.
    Type: Application
    Filed: September 8, 1998
    Publication date: July 5, 2001
    Inventor: EUGENE A FITZGERALD
  • Publication number: 20010006250
    Abstract: An aspect of the present invention provides a semiconductor chip package that can accommodate many outer leads in a relatively small package outline. The package includes a package body and outer leads along the outline of the package body. The package body outline has concave portions to increase the number of outer leads without increasing the package footprint. For example, the package can have a QFP outline with concave portions on the sides of the QFP outline. The package can have an SOP outline with concave portions on two opposite sides of the SOP outline.
    Type: Application
    Filed: December 28, 2000
    Publication date: July 5, 2001
    Inventors: Je Bong Kang, Jae Won Lee, Heui Seog Kim
  • Publication number: 20010006251
    Abstract: A semiconductor device comprising: a tape substrate which supports a semiconductor chip, said chip having surface electrodes, said tape substrate being provided with a plurality of leads corresponding to the surface electrodes of the semiconductor chip and bonded thereto, and with dummy leads formed in vacant regions in corner portions of the tape substrate where the leads are not formed; conductive members for bonding the surface electrodes of the semiconductor chip to the leads of the tape substrate; and a plurality of external terminals arranged on an outside periphery of the semiconductor chip and mounted on the tape substrate.
    Type: Application
    Filed: December 22, 2000
    Publication date: July 5, 2001
    Inventors: Yoshinori Miyaki, Yasuhisa Hagiwara, Seiichi Ichihara, Hisao Nakamura, Hidenori Suzuki
  • Publication number: 20010006252
    Abstract: A method of making a stacked microelectronic assembly includes providing a flexible substrate having a plurality of attachment sites, test contacts and conductive terminals, and including a wiring layer with leads extending to the attachment sites. The method includes assembling a plurality of microelectronic elements to the attachment sites and electrically interconnecting the microelectronic elements and the leads. The flexible substrate is then folded so as to stack at least some of the microelectronic elements in substantially vertical alignment with one another to provide a stacked assembly with the conductive terminals exposed at the bottom end of the stack and the test contacts exposed at the top end of the stack.
    Type: Application
    Filed: February 2, 2001
    Publication date: July 5, 2001
    Inventors: Young Kim, Belgacem Haba, Vernon Solberg
  • Publication number: 20010006253
    Abstract: A connection component for a microelectronic device such as a semiconductor chip incorporates a support layer and conductive structures extending across a surface of the support layer. The conductive structures have anchors connecting them to the support layer, and releasable or unanchored portions.
    Type: Application
    Filed: February 6, 2001
    Publication date: July 5, 2001
    Inventors: Masud Beroz, Thomas H. DiStefano, Anthony B. Faraci, Joseph Fjelstad, Belgacem Haba
  • Publication number: 20010006254
    Abstract: A thin film multilayered structure comprises a single crystal Si substrate; a MgO buffer layer epitaxially grown on said single crystal Si substrate; and a metallic thin film made of Ir or Rh epitaxially grown on said MgO buffer layer.
    Type: Application
    Filed: December 21, 2000
    Publication date: July 5, 2001
    Applicant: Murata manufacturing Co. , Ltd.,
    Inventor: Xiao-min Li
  • Publication number: 20010006255
    Abstract: A semiconductor device having improved metal line structure has a first dielectric layer formed on a semiconductor substrate, a metal film pattern formed on the first dielectric layer, an interface protection layer on the metal film pattern, and a second dielectric layer on the interface protection layer, wherein the second dielectric layer contains a reactive material, e.g., fluorine, which is prevented by the interface protection layer from diffusing to the metal film pattern and reacting with the metal in the metal film pattern to form a damage film, e.g., metal fluoride, which is a highly resistive material that, if formed on the semiconductor device, would reduce the reliability of the metal film pattern and thus reduce the reliability of the semiconductor device as a whole.
    Type: Application
    Filed: February 20, 2001
    Publication date: July 5, 2001
    Inventors: Dong-chul Kwon, Young-jin Wee, Hong-jae Shin, Sung-jin Kim
  • Publication number: 20010006256
    Abstract: A semiconductor device comprising: a first interconnect layer 1 comprising a first electrode 10 and a second electrode 20 with a plurality of a tooth-shaped teeth 11, 21 and a connection portion 12, 22 for connecting the plurality of teeth, the first electrode 10 and the second electrode 20 being disposed in a mutually staggered fashion from opposite directions; a second interconnect layer 2 comprising a third electrode 30 and a fourth electrode 40 with a plurality of tooth-shaped teeth 31, 41 and a connection portion 32, 42 for connecting the plurality of teeth, the third electrode 30 and the fourth electrode 40 being disposed in mutually staggered fashion from opposite directions; wherein the teeth 11 of the first electrode 10 overlap with either teeth 31 of the third electrode 30 or teeth 41 of the fourth electrode 40, and the electrodes are connected so that potentials on the overlapping teeth are different.
    Type: Application
    Filed: January 5, 2001
    Publication date: July 5, 2001
    Applicant: NEC Corporation
    Inventor: Yuuji Nakashima
  • Publication number: 20010006257
    Abstract: A three-dimensional system-on-chip structure comprises a plurality of chips and a plurality of plugs respectively fabricated in the chips. The chips are stacked on top of each other and each includes a periphery circuitry region. A plurality of contact pads is fabricated in each of the periphery circuitry regions. The plugs are formed in the corresponding stacked chips, and are electrically connected to the corresponding contact pads of two of the corresponding chips which are adjacent to each other, or two of the corresponding chips which are not adjacent to each other.
    Type: Application
    Filed: March 1, 2001
    Publication date: July 5, 2001
    Inventors: Chian-Gauh Shih, Hsin-Pang Lu
  • Publication number: 20010006258
    Abstract: A stacked semiconductor package including: a first chip; a plurality of first leads of which one side of each of the first leads is attached to the first chip by an insulating adhesive member and electrically connected to the first chip; a first molding compound for sealing the first chip and the first leads, including holes for exposing a predetermined portion of each of the plurality of the first leads, and the first molding compound does not cover a side of the first leads opposite the holes; a first conductive portion formed within the holes included in the first molding compound; an external terminal electrically connected to the first conductive portion; a second chip; a plurality of second leads attached on the second chip by the insulating adhesive member, and being electrically connected to the second chip; a second molding compound for sealing the second chip and the second leads, and exposing a predetermined portion of the second leads; a plurality of conductive connection units for electrically co
    Type: Application
    Filed: January 3, 2001
    Publication date: July 5, 2001
    Applicant: Hyundai Electronics Industries Co., Ltd.
    Inventor: Ki-Rok Hur
  • Publication number: 20010006259
    Abstract: A QFP adapted to lowering the heat resistance and increasing the number of pins, and a method of producing the same. The QFP includes a heat-radiating metal plate having bumpers formed at the four corners thereof as a unitary structure, a semiconductor chip mounted on the heat-radiating metal plate, leads provided on the heat-radiating metal plate and surrounding the peripheries of the semiconductor chip, bonding wires for connecting the leads to the semiconductor chip, and a sealing resin member for sealing part of the semiconductor chip, inner leads of the leads, bonding wires and part of the heat-radiating metal plate. The tips of the bumpers integrally formed with the heat-radiating metal plate are positioned outside the tips of the outer leads that are protruding from the sealing resin member. In the QFP producing method, the heat- radiating metal plate having the bumpers and the lead frame having the leads are secured outside the sealing resin member.
    Type: Application
    Filed: February 28, 2001
    Publication date: July 5, 2001
    Applicant: Hitachi, Ltd.
    Inventors: Kuniharu Muto, Atsushi Nishikizawa, Jyunichi Tsuchiya, Toshiyuki Hata, Nobuya Koike, Ichio Shimizu
  • Publication number: 20010006260
    Abstract: A humidifier includes a housing, a wick, a fan, and a wick change indicator. The housing has a upper and bottom portions. The bottom portion is formed with an air inlet and a reservoir. The reservoir holds water while supporting the wick. The wick is seated in the reservoir so that it is partially submerged in the water. The upper portion is formed with an air outlet with the fan mounted therein generally above the top of the wick. The wick change indicator generally includes at least one hygrometer and a display. At least one hygrometer is positioned within the airflow for measuring the exit-relative humidity of the airflow.
    Type: Application
    Filed: December 1, 2000
    Publication date: July 5, 2001
    Inventors: Yigal Offir, Neville R. Glenn, Paul Powers, Robert S. VannRox