Abstract: A method of manufacturing a semiconductor component includes forming an electrically insulative layer (220) over a semiconductor substrate where a first portion of the electrically insulative layer is located over a first region (560) of the semiconductor substrate and where a second portion of the first layer is located over a second region (550) of the semiconductor substrate. An isolation region (610) is formed in the semiconductor substrate between the first and second regions of the semiconductor substrate. After forming the isolation region, the second portion of the first layer is removed, and, after removing the second potion of the first layer, an epitaxial layer (630) is grown over the second region of the semiconductor substrate.

Abstract: In a liquid phase growth process comprising immersing a substrate in a melt held in a crucible, a crystal material having been dissolved in the melt, and growing a crystal on the substrate, at least a group of substrates to be immersed in the melt held in the crucible are fitted to the supporting rack at a position set aside from the center of rotation of the crucible or supporting rack, and the crystal is grown on the surface of the substrate thus disposed. This can provide a liquid phase growth process which can attain a high growth rate, can enjoy uniform distribution of growth rate in each substrate and between the substrates even when substrates are set in a large number in one batch, and can readily keep the melt from reaction and contamination even when the system has a large size, and provide a liquid phase growth system suited for carrying out the process.

Abstract: There is disclosed a method for manufacturing a silicon carbide film in which a crystal orientation continued on a single crystal substrate surface and silicon carbide is allowed to epitaxially grow, the method comprising the steps of: entirely or partially providing the substrate surface with a plurality of undulations extended parallel in one direction; and allowing silicon carbide to grow on the substrate surface.

Abstract: A technique for forming a film of material (12) from a donor substrate (10). The technique has a step of forming a weakened region in a selected manner at a selected depth (20) underneath the surface. An energy source is directed to a selected region of the donor substrate to initiate a controlled cleaving action of the substrate (10) at the selected depth (20), whereupon the cleaving action provides an expanding cleave front to free the donor material from a remaining portion of the donor substrate.

Abstract: A process of producing a semiconductor article is disclosed which comprises the steps of epitaxially growing on at least one surface of a single-crystal substrate a plurality of single-crystal semiconductor layers differing from each other in at least one of the kind and the concentration of an impurity, making porous the plurality of single-crystal semiconductor layers so as to form a high porosity layer and a low porosity layer, forming a non-porous single-crystal layer on a surface of the single-crystal semiconductor layer as made porous, and bonding and single-crystal substrate and a support substrate to each other, wherein the bonded single-crystal substrate and support substrate are separated at at least one of a location in the high porosity layer and an interface of the high porosity layer with a layer adjacent thereto.

Abstract: A crystal growth method includes forming a mask layer capable of impeding crystal growth on a substrate in such a way a first nitride semiconductor layer has irregularities at a surface thereof exposed at a window region opened at a part of the mask layer, and growing a second nitride semiconductor layer over a region including the surface of the mask layer through crystal growth from the irregularities. Through-type dislocations can be reliably prevented from propagation due to the discontinuity of crystals at the irregularities and also to lateral crystal growth.

Abstract: The present invention provides for a method of manufacturing a Group III-V compound semiconductor, which grows a nitrogen-contained Group III-V compound semiconductor of the p-type conductivity, without performing any particular post-processing after growing the compound semiconductor, and which prevents a deterioration in the yield of manufacturing light emitting elements due to post-processing. [1] A method of manufacturing a Group III-V compound semiconductor which contains p-type impurities and which is expressed by a general formula InxGayAlzN (0≧x≧1,0≧z≧1, x+y+z=1), by thermal decomposition vapor phase method using metalorganics, the method being characterized in that carrier gas is inert gas in which the concentration of hydrogen is 0.5 % or smaller in capacity.

Abstract: A method and apparatus for homoepitaxial growth of freestanding, single bulk crystal Gallium Nitride (GaN) are provided, wherein a step of nucleating GaN in a reactor results in a GaN nucleation layer having a thickness of a few monolayers. The nucleation layer is stabilized, and a single bulk crystal GaN is grown from gas phase reactants on the GaN nucleation layer. The reactor is formed from ultra low oxygen stainless steel.

Abstract: A single crystal silicon growth apparatus, comprising: a chamber where a silicon substrate is to be inserted; a heat source for rising the temperature in an interior of the chamber; a cooling line for rapidly dropping the temperature in the interior of the chamber; a gas sprayer for providing a source gas and a purge gas inside the chamber; a gas inflow line connected to the gas sprayer for inflowing the source gas and the purge gas into the gas sprayer; and a gas exhausting line for maintaining the interior of the chamber with a vacuum.

Abstract: A surface preparation method and semiconductor device constituted so as to enable the prevention of carrier accumulation resulting from Si acting as a donor, without making the constitution of a semiconductor manufacturing apparatus complex. When forming an epitaxial layer either on the surface of a substrate, or on the surface of a base layer, Si or an Si compound that exists on the surface of a substrate, or on the surface of a base layer, is removed in accordance with a thermal cleaning process that uses an As hydride gas as the cleaning gas.

Abstract: An easy method of forming purified carbon nanotubes from which graphitic phase or carbon particles are removed, using a high-density plasma. Carbon nanotubes are grown on a substrate using a plasma chemical vapor deposition method at a high plasma density of 1011 cm−3 or more. The carbon nanotube formation includes: growing a carbon nanotube layer on a substrate to have a predetermined thickness by plasma deposition; purifying the carbon nanotube layer by plasma etching; and repeating the growth and the purification of the carbon nanotube layer. For the plasma etching, a halogen-containing gas, for example, a carbon tetrafluoride gas, is used as a source gas.

Abstract: A method for making a multilayered structure with a single crystal film bonded to a polycrystalline substrate has the steps of: bonding a single crystal film to a polycrystalline substrate; and growing an epitaxial layer on said single crystal film bonded to said polycrystalline substrate.

Abstract: A method of forming a semiconductor structure including providing a single crystal semiconductor substrate of GaP, and fabricating a graded composition buffer including a plurality of epitaxial semiconductor Inx(AlyGa1-y)1-xP alloy layers. The buffer includes a first alloy layer immediately contacting the substrate having a lattice constant that is nearly identical to that of the substrate, subsequent alloy layers having lattice constants that differ from adjacent layers by less than 1%, and a final alloy layer having a lattice constant that is substantially different from the substrate. The growth temperature of the final alloy layer is at least 20° C. less than the growth temperature of the first alloy layer.

Abstract: This invention is directed to a novel a single crystal silicon wafer. In one embodiment, this wafer comprises: (a) two major generally parallel surfaces (i.e., the front and back surfaces); (b) a central plane between and parallel to the front and back surfaces; (c) a front surface layer which comprises the region of the wafer extending a distance of at least about 10 &mgr;m from the front surface toward the central plane; and (d) a bulk layer which comprises the region of the wafer extending from the central plane to the front surface layer.

Abstract: The present invention provides a biaxially textured laminate article having a polycrystalline biaxially textured metallic substrate with an electrically conductive oxide layer epitaxially deposited thereon and methods for producing same. In one embodiment a biaxially texture Ni substrate has a layer of LaNiO3 deposited thereon. An initial layer of electrically conductive oxide buffer is epitaxially deposited using a sputtering technique using a sputtering gas which is an inert or forming gas. A subsequent layer of an electrically conductive oxide layer is then epitaxially deposited onto the initial layer using a sputtering gas comprising oxygen. The present invention will enable the formation of biaxially textured devices which include HTS wires and interconnects, large area or long length ferromagnetic and/or ferroelectric memory devices, large area or long length, flexible light emitting semiconductors, ferroelectric tapes, and electrodes.

Abstract: The specification describes a lithographic technique in which alignment marks are defined in a first semiconductor layer and the alignment marks are then covered with a protective SiO2 layer. After subsequent semiconductor layer growth steps, which selectively deposit on the former semiconductor layer but not on the protective layer, the alignment marks remain undistorted and visible to the exposure tool for subsequent processing.

Abstract: A method of removing contaminants from a surface in a silicon substrate processing chamber. The method includes coating the surface which has been exposed to contaminants including metal particles with a material preferably including silicon. During coating, contaminants are collected by the material being applied. The method further includes removing the material and any contaminants that have been collected by the material during coating. The method can be performed after the surface has been exposed to contaminants from ambient air or moisture during cleaning or preventive maintenance procedures, for example. Also, the method is preferably performed before any baking procedures or before the chamber is heated to drive out any moisture that has been introduced to the chamber.

Abstract: A method for fabricating gallium arsenide (GaAs) based structure groups with inverted crystallographic orientation to form wavelength converters that utilizes germanium as a crystallographic neutral template layer deposited on a GaAs substrate. A crystallographic inverted gallium arsenide layer is grown on top of the template layer. In a selective trench etching process areas of the substrate are exposed again for a consecutive collective deposition of GaAs.

Abstract: A method of growing a Group III-V nitrite buffer layer on a substrate made of a different material by molecular beam epitaxy is provided, which compensates for lattice mismatching between a material of the substrate and a material of a further layer to be grown on the substrate. The method includes the steps of: placing the substrate in a vacuum chamber at a reduced pressure suitable for epitaxial growth and at an elevated temperature; and supplying species to the vacuum chamber to be used in the epitaxial growth including a nitrogen precursor species supplying nitrogen to the substrate to cause epitaxial growth on the substrate of the buffer layer. The elevated temperature is in the range of 300 to 800 ° C., and a supply rate of nitrogen to the substrate is such as to cause epitaxial growth on the substrate of the Group III-V nitride buffer layer of uniform thickness less than 2000 Å at a growth rate in the range of 2 to 10 &mgr;m/hr.

Abstract: The invention encompasses methods of treating semiconductive material wafers and ingots to alleviate slippage within monocrystalline lattices of the wafers and ingots. The invention further encompasses monocrystalline semiconductive material wafers and monocrystalline semiconductive ingots which are treated to alleviate slippage within a crystalline lattice of the wafers and ingots. In one aspect, the invention includes a method of forming a semiconductive material wafer comprising: a) forming an ingot of semiconductive material, said ingot comprising an outer periphery; b) forming a wafer from the ingot, the wafer comprising said outer periphery; and c) doping said outer periphery with strength-enhancing dopant atoms.

Abstract: A method for manufacturing a metal oxide semiconductor transistor having a raised source/drain is described. A first spacer is formed on a sidewall of a gate electrode. An epitaxial layer is then formed on the exposed surface of the substrate and a top surface of the gate electrode. A light implantation step is then performed on the substrate while using the gate electrode and the first spacer as a first mask. Thereafter, a second spacer is formed on the sidewall of the gate electrode. A heavy implantation step is then performed on the substrate while using the gate electrode, the first spacer and the second spacer as a second mask. The epitaxial layer is then formed before the forming of the extension structure of the source/drain. Therefore, dopants in a source/drain extension structure avoid suffering the high temperature needed to form the epitaxial layer so that the redistribution of the dopants is prevented.

Abstract: The invention provides a process for depositing an epitaxial layer on a crystalline substrate, comprising the steps of providing a chamber having an element capable of heating, introducing the substrate into the chamber, heating the element at a temperature sufficient to decompose a source gas, passing the source gas in contact with the element; and forming an epitaxial layer on the substrate.

Abstract: A SiGe monocrystalline etch-stop material system on a monocrystalline silicon substrate. The etch-stop material system can vary in exact composition, but is a doped or undoped Si1−xGex alloy with x generally between 0.2 and 0.5. Across its thickness, the etch-stop material itself is uniform in composition. The etch stop is used for micromachining by aqueous anisotropic etchants of silicon such as potassium hydroxide, sodium hydroxide, lithium hydroxide, ethylenediamine/pyrocatechol/pyrazine (EDP), TMAH, and hydrazine. For example, a cantilever can be made of this etch-stop material system, then released from its substrate and surrounding material, i.e., “micromachined”, by exposure to one of these etchants. These solutions generally etch any silicon containing less than 7×1019 cm−3 of boron or undoped Si1−xGex alloys with x less than approximately 18. Alloying silicon with moderate concentrations of germanium leads to excellent etch selectivities, i.e.

Abstract: In order to reduce boron concentration between a silicon substrate and an Si or Si1-xGex layer which is epitaxially grown in a CVD (chemical vapor deposition) apparatus, the silicon substrate is pretreated, before being loaded into the CVD apparatus, such as to prevent the substrate from being contaminated by boron in a clean room. Further, in accordance with one embodiment, a CVD growth chamber itself is cleaned, before the substrate is loaded into the growth chamber, using an F2 gas at a predetermined temperature of the substrate, thereby to remove boron residues in the growth chamber.

Abstract: There are disclosed a method for producing an SOI substrate comprising forming an oxide layer on a surface of at least one silicon wafer among two silicon wafers, closely contacting one wafer with the other wafer so that the oxide layer should be interposed between them, subjecting the wafers to a heat treatment to firmly bond the wafers, and making a device processing side wafer thinner to a desired thickness, wherein a silicon single crystal wafer obtained by growing a silicon single crystal ingot doped with nitrogen by the Czochralski method, and slicing the single crystal ingot into a silicon single crystal wafer is used as the device processing side wafer, and an SOI substrate produced by the method. The present invention provides a method for producing SOI substrates, in particular thin film SOI substrates having an SOI layer thickness of 1 &mgr;m or less, exhibiting a small crystal defect size in the SOI layer, and SOI substrates with low cost and high productivity.

Abstract: An isolation trench is formed from a first isolation trench in an integrated circuit substrate between active regions in the integrated circuit substrate. An insulating layer is formed in the first isolation trench, wherein the insulating layer includes a portion that protrudes from the first isolation trench. A second isolation trench is formed on the first isolation trench and self-aligned to the active regions in the integrated circuit substrate, wherein the second isolation trench includes the protruding portion of the insulating layer. By forming the isolation trench in two steps, the isolation trench may be formed to the appropriate depth without developing a seam in the insulating layer. In particular, the first isolation trench is formed to a depth and filled with the insulating layer which protrudes from the trench. The second isolation trench is built up around the protruding insulating layer to provide the total depth for adequate isolation of the active areas.

Abstract: A method for producing thick, high quality GaN substrates uses an epitaxially deposited film is used as a substrate material for further device or epitaxial processing. The film is deposited using an epitaxial technique on a thin substrate called the disposable substrate. The deposited film is thick enough so that upon cooling the thermal mismatched strain is relieved through cracking of the lower disposable substrate and not the newly deposited epitaxy. The epitaxial film now becomes a platform for either further epitaxial deposition or device processing.

Abstract: A method of fabricating a semiconductor device by the use of laser crystallization steps is provided. During these crystallization steps, an amorphous or polycrystalline semiconductor is crystallized by laser irradiation in such a way that generation of ridges is suppressed. Two separate laser crystallization steps are carried out. First, a laser irradiation step is performed in a vacuum, using somewhat weak laser light. Then, another laser irradiation step is performed in a vacuum, in the atmosphere, or in an oxygen ambient with intenser laser light. The first laser irradiation conducted in a vacuum does not result in satisfactory crystallization. However, this irradiation can suppress generation of ridges. The second laser irradiation step is performed in a vacuum, in the atmosphere, or in an oxygen ambient to achieve sufficient crystallization, but no ridges are produced.

Abstract: A method for making n-type semiconducting diamond by use of CVD in which n-type impurities are doped simultaneously with the deposition of diamond. As the n-type impurities, an Li compound and a B compound, both, are used at once. After doping, a diamond film thus obtained is etched to peel off its surface. The n-type semiconducting diamond is superior in specific resistivity, 10.sup.-2 .OMEGA.cm or less.

Abstract: A process for the fabrication on a monocrystal silicon substrate of epitaxial layers of a III-V nitride compound semi-conductor having the structure In.sub.x Al.sub.y Ga.sub.1-x-y N (0.ltoreq.x, 0.ltoreq.y, x+y.ltoreq.1). The process consists of the following steps. A parcel-like structure is created on the surface of a monocrystal silicon substrate. The silicon surface within the parcels is uncovered and the edges of the parcels are covered by a masking material. By means of epitaxial growth of the nitride compound semiconductor exclusively within the parcels on the silicon surface, local islands are created on whose edges the dislocations generated by the lattice mismatches are able to break down. Finally, components are fabricated in and on the parcels.

Abstract: In a semiconductor substrate comprising a silicon substrate having a porous region, and a semiconductor layer provided on the porous region, the semiconductor layer comprises a single-crystal compound and is formed on the surface of the porous region with its pores having been sealed at the surface. This substrate can be produced by a process comprising the steps of heat-treating the silicon substrate 11 having a porous region, to seal pores at the surface of the porous region 13, and forming a single-crystal compound-semiconductor layer 14 by heteroepitaxial growth on the porous region having the pores sealed by the heat treatment.Single-crystal compound semiconductor films with less crystal defects can be formed on large-area silicon substrates in a high productivity, a high uniformity, a high controllability and a great economical advantage.

Abstract: A method of crystal growth of a GaN layer with an extremely high surface planarity over a GaAs substrate is provided, wherein a GaAs substrate is heated to a temperature in the range of 600.degree. C. to 700.degree. C. without supplying any group-V element including arsenic to form a Ga-rich surface on the GaAs substrate, before a first source material including N and a second source material including Ga are supplied along with a carrier gas onto a surface of the GaAs substrate to form a GaN layer over the GaAs substrate.

Abstract: The invention encompasses methods of treating semiconductive material wafers and ingots to alleviate slippage within monocrystalline lattices of the wafers and ingots. The invention further encompasses monocrystalline semiconductive material wafers and monocrystalline semiconductive ingots which are treated to alleviate slippage within a crystalline lattice of the wafers and ingots. In one aspect, the invention includes a method of forming a semiconductive material wafer comprising: a) forming an ingot of semiconductive material, said ingot comprising an outer periphery; b) forming a wafer from the ingot, the wafer comprising said outer periphery; and c) doping said outer periphery with strength-enhancing dopant atoms.

Abstract: The surface 1a of a single crystal .alpha.-SiC substrate 1 is adjusted so as to have a surface roughness equal to or lower than 2,000 angstroms RMS, and preferably equal to or lower than 1,000 angstroms RMS. On the surface 1a of the single crystal .alpha.-SiC substrate 1, a polycrystalline .alpha.-SiC film 2 is grown by thermal CVD to form a complex is placed in a porous carbon container and the carbon container is covered with .alpha.-SiC powder. The complex is subjected to a heat treatment at a temperature equal to or higher than a film growing temperature, i.e., in the range of 1,900 to 2,400.degree. C. in an argon gas flow, whereby single crystal .alpha.-SiC is integrally grown on the single crystal .alpha.-SiC substrate 1 by crystal growth and recrystallization of the polycrystalline .alpha.-SiC film 2. It is possible to stably and efficiently produce single crystal SiC of a large size which has a high quality and in which any crystal nucleus is not generated.

Abstract: A method to grow diamond crystal by an utilization of liquid template on which carbon precursor is deposited. The liquid template is to replace the conventional solid template to improve the quality and the size of the diamond crystal through the inherent property of the liquid. Its ideal smoothness, its amorphosity and therefore, an absence of the grain boundary, and its high surface mobility for carbon aggregation to form diamond crystal, thus to grow diamond crystal.

Abstract: A non-linear optical thin film layer system (10) is provided for integrated optics applications where a non-linear optical thin film layer (18) is integrated with a gallium-arsenide substrate (12). A first encapsulating layer (20) is deposited on lower surface (26), peripheral sides (30), and an upper surface peripheral region (28) of said gallium-arsenide substrate (12). A second encapsulating and buffer layer (14) is epitaxially grown on an upper surface of said gallium-arsenide substrate (12) and on the encapsulated upper surface peripheral region (28) of said gallium-arsenide substrate (12). A perovskite layer (16) is epitaxially grown on an upper surface of the layer (14). A non-linear optical thin film layer (18) is epitaxially grown on an upper surface of the perovskite layer (16) and is lattice matched to this layer.

Abstract: A process for producing a Group III--V compound semiconductor represented by the general formula In.sub.x Ga.sub.y Al.sub.z N (provided that x+y+z=1, 0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, and 0.ltoreq.z.ltoreq.1) employs a support member for forming the semiconductor, wherein the member constitutes SiC which is obtained by converting a graphite base material into SiC. In another embodiment, the member comprises a graphite-SiC composite wherein at least a surface layer part of a graphite substrate is converted into SiC. The member of the invention has superior chemical and mechanical stability, thereby making it useful in high-productivity production devices for making compound semiconductors.

Abstract: A bonded substrate and a process for its production is provided to solve the problem involved in the heat treatment which tends to cause troubles such as break, separation and warpage of the substrates bonded. A single-crystal semiconductor epitaxially grown on a porous semiconductor substrate is bonded to an insulator substrate, and the semiconductor substrate is removed by etching, grinding, or a combination of the both, where no heat treatment is carried out or, even if carried out, only once.

Abstract: Method of preferentially-ordering a thermally sensitive element (50) may comprise the step of forming a first thin film layer of electrically conductive material (75). A thin film layer of thermally sensitive material (80) may be formed on a surface of the first layer of electrically conductive material (75). A second thin film layer of electrically conductive material (85) of lanthanum strontium cobalt oxide (LSCO) may be formed on a surface of the layer of thermally sensitive material (80) opposite the first thin film layer (75). A nucleation layer (87) may be formed in communication with the surface of the layer of thermally sensitive material (80) opposite the first thin film layer (75). The layer of thermally sensitive material (80) may be crystallized beginning at the surface of the thermally sensitive layer (80) in communication with nucleation layer (87). The nucleation layer (87) may be removed.

Abstract: The present invention provides a process for selectively depositing diamond films, which includes two stages of diamond deposition and the gas source used is a mixture of C.sub.x H.sub.y plus CO.sub.2 or C.sub.x H.sub.y O.sub.z plus CO.sub.2. In the period between the first and second stage, the substrate is immersed in an aqueous solution of HF plus HNO.sub.3. The obtained diamond films exhibit good crystallinity and selectivity and the growth rate is fast.

Abstract: A manufacturing method for manufacturing a semiconductor substrate has first annealing step for annealing silicon single crystal to permit oxygen embryos or oxygen precipitations grown from the oxygen embryos precipitating in a predetermined region and a second annealing step for permitting said oxygen embryos or said oxygen precipitations to contract using a second temperature range higher than the first temperature range, said second temperature range being high enough to contract said oxygen embryos and low enough to prevent redistribution of boron from affecting to device characteristics, to form a denuded zone in said predetermined region at the principal surface. An inspection method for inspecting a semiconductor substrate further has measuring step, subsequent to said first and second annealing steps for measuring the density of oxygen embryos grown into oxygen precipitations among those precipitated in said silicon single crystal.

Abstract: In fabricating a semiconductor device, a semiconductor layer containing Al and a cap layer not containing Al are successively grown on a semiconductor substrate and are placed in a halogen gas environment where a chemical reaction between a halogen and an oxide film naturally formed on the cap layer removes the oxide film. Then, without exposing the layer to the atmosphere, the halogen gas environment is replaced with a dry-etching environment and the cap layer is dry-etched to a desired depth. Then, without exposing a semiconductor layer to the atmosphere, the dry-etching environment is replaced with a crystal growth environment. Subsequently, another semiconductor layer is grown on the semiconductor layer. A regrowth interface of excellent cleanliness is realized and the crystallinity of the regrown semiconductor layer is improved.

Abstract: An epitaxially grown layer having a large area and an uniform thickness is formed on an insulating layer. The surface of a silicon substrate (2) is oxidized to form a silicon dioxide layer (4) acting as insulating layer. The silicon dioxide layer (4) is then provided with an opening (10) by etching with the aid of resist (6). After removing the resist (6), a silicon seed crystal layer (11) is selectively grown in the opening (10). Next, the silicon dioxide layer (4) is subjected to etchback using hydrofluoric acid, so that the side face (14) of the seed crystal layer (11) is emerged. The following epitaxial growth on the basis of the seed crystal layer (11) is allowed sufficient growth in the lateral direction. As a result, an epitaxially grown layer having (16) a large area and an uniform thickness is realized.

Abstract: With a view to optimizing the donor killing process performed in the semiconductor wafer fabricating process, a heat-treating operation is performed in a thermal furnace above at least 900 .degree. C. for a predetermined time so that growth of the initial oxygen precipitates, induced into the crystal lattices during single-crystal growth, is suppressed.

Abstract: A head drum is coated with double films, each having different characteristics, by forming a first diamond-like hard carbon film of high degree of hardness and then forming a second diamond-like hard carbon film of a lower degree of hardness thereon. The degree of hardness of the second film is lower than that of the first film. The double coating is performed by means of a synthesizing apparatus which comprises a reactor consisting of a power supply electrode, a workpiece support and and an annular ground electrode spaced from the stacked head drums by a predetermined distance.

Abstract: To reduce a dislocation density within a gallium nitride crystal and make cleaving possible, after forming a thin film of silicon carbide and a first gallium nitride crystal on a silicon substrate, only the silicon substrate is removed in an acid solution such as hydrofluoric acid and nitric acid as they are mixed. Following this, a second gallium nitride crystal is formed on the remaining thin film of silicon carbide and the first gallium nitride crystal.

Abstract: A concept and process is disclosed by which an epitaxially deposited film is removed from its substrate at elevated temperatures to inhibit thermal mismatch strain induced defect generation in the epitaxial layer. The process occurs by gas phase reactions of an intermediate layer purposely deposited to react with a component in the gas stream during or after epitaxial growth. While the concept of an intermediate layer has been used extensively to improve the crystal quality of the epitaxial layer this is not the purpose of this interlayer. Although this interlayer may aid in nucleation of the epitaxial layer, the objective is to separate the epitaxial material on top of the interlayer from the substrate below the interlayer at or near the growth temperature to reduce the effects of the thermal mismatch between the substrate and epitaxial layers. An application is an addition to the above invention. A thick epitaxially deposited film can now be removed from its substrate at elevated temperatures.

Abstract: The invention provides a method of fabricating an SOI substrate including the steps of introducing crystal defects at a desired depth in a silicon substrate, and thereafter, implanting oxygen or nitrogen ions into the silicon substrate, and thermally annealing the silicon substrate. The method of the present invention makes it possible to fabricate an SOI substrate with fewer crystal defects and lower fabrication cost than is possible according to the prior art.

Abstract: The invention concerns a method of producing a surface layer structure by doping a matrix with metal ions. The aim of the invention is to provide a method of this kind in which the depth distribution of the metal ions in the substrate can be regulated, thus optimumizing the doping without incurring any of the disadvantages inherent in the prior art methods. This is achieved by first depositing matrix material on a suitable substrate by laser ablation in an atmosphere of oxygen, thus forming a on surface of the substrate a first layer a matrix material. Dopant is then deposited on the surface of the first layer, followed by more matrix material. The result is a uniform doping of the deposited matrix at a defined depth in the surface layer structure.

Abstract: The conventional fabrication processes of SOI substrate employed wet etching for removing a porous single-crystal Si region, but wet etching involved difficulties in management of concentration for fabricating SOI substrates in high volume, which caused reduction in productivity.Therefore, provided is a fabrication process of SOI substrate comprises a step of forming a non-porous single-crystal Si region on a surface of a porous single-crystal Si region of a single-crystal Si substrate having at least the porous single-crystal Si region, a step of bonding a support substrate through an insulating region to a surface of the non-porous single-crystal Si region, and a step of removing the porous single-crystal Si region, wherein the step of removing the porous single-crystal Si region comprises a step of performing dry etching in which an etch rate of the porous single-crystal Si region is greater than that of the non-porous single-crystal Si region.