Abstract: A packaged die (112) for an integrated circuit (62) that eliminates the wire bonds required in the prior art, and provides integrated circuit packaging while the circuit (62) is still in a wafer format. A wafer substrate (64) on which the integrated circuits (62) have been fabricated is patterned and etched to form signal and ground vias (74, 72) through the substrate (64). A back-side ground plane (82) is deposited in contact with the ground vias (72). A protective layer (90) is formed on the top surface (76) of the substrate (64), and a protective layer (98) is formed on the bottom surface (84) of the substrate (64), where the bottom protective layer (98) fills in removed substrate material between the integrated circuits (62). Vias (106) are formed through the bottom protective layer (98), and the wafer substrate (64) is diced between the integrated circuits (62).

Abstract: The present invention provides a printed circuit board, which includes a dielectric substrate having via holes formed in the thickness direction, and a conductor including a conductive filler is filled in the via holes. The dielectric substrate has patterned wiring layers on both surfaces, and the wiring layers are connected electrically with each other by the conductor. The dielectric substrate is made of a glass cloth or a glass nonwoven fabric impregnated with a thermosetting epoxy resin mixed with fine particles, and the conductive filler in the conductor has an average particle diameter larger than that of the fine particles. Accordingly, the printed circuit board has an improved moisture resistance as a whole and also excellent connection reliability and repair resistance. In addition, the dielectric substrate of the printed circuit board has an improved mechanical strength such as flexural rigidity. The present invention also provides a method of manufacturing such a printed circuit board.

Abstract: A printed circuit board (PCB) comprises a number of electrically conductive layers. Instead of coating, or plating, a PCB through-hole with an electrically conductive material to form a via (for the purpose of connecting together signal paths across the electrically conductive layers)—the via is formed by placing a conductive stake, or conductive pin, in the through-hole.

Abstract: Non-circular vias and methods of cutting away material in a printed circuit board (PCB) so as to form non-circular vias. Laser ablation or plasma ablation is used to remove PCB material about a centerline. This type of material removal allows lateral movement to effect non-circular patterns. Exemplary shapes are convoluted circle vias, square vias, extended/elongated vias, and trench vias. The trench vias may be micro milled to form a coaxialised structure that provides noise suppression and EMI protection, and are elongated to be even greater than three times the diameter of a circular micro-via.

Abstract: In case of manufacturing a flexible multilayer circuit board which comprises an internal layer circuit board which can be a cable portion and an external layer circuit board which can be a component mounting portion laminated on one side or both sides of the internal layer circuit board at a predetermined position and which has a through hole plated conduction portion 12 formed at predetermined positions of the internal layer circuit board and the external layer circuit board, surface protection layers 3 and 5 formed on external surfaces of wiring patterns 1 and 4 of the internal layer circuit board are formed in a region retreated toward the outside from a position of a through hole 13 for a through hole plated conduction portion 12.

Abstract: A manufacturing method of a printed wiring board. On a conductor plate 1, approximately conical conductor bumps 1a, 1a, . . . are formed, the conductor bumps 1a, 1a, . . . being caused to penetrate through a prepreg 5 to project tip ends of the conductor bumps 1a, 1a, . . . from an opposite side of the prepreg 5. The tip ends of the conductor bumps 1a, 1a, . . . and interconnection patterns 7a and 7b on surfaces of core material 17A, before bonding, are exposed to plasma to activate. The activated tip ends of the conductor bump 1a, 1a, . . . and interconnection patterns 7a and 7b on the surface of the core material are stacked to bond both.

Abstract: A printed wiring board includes at least one insulator sheet having through holes filled with conductive material and a conductive wiring pattern. The wiring pattern is embedded in the insulator sheet so that an upper surface of the wiring pattern and surrounding portions of the insulator sheet form a flat surface. The insulator sheet may be made from a glass-epoxy prepreg or of a polyester or polyimide sheet coated with an adhesive or glue. The wiring pattern can be transferred to the insulator sheet from a surface of a releasable supporting sheet.

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact extends from a central conductor, and has a peripheral portion adapted to contract radially inwardly toward the central conductor response to a force applied by a contact pad defining a central hole on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts contract radially inwardly and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by friction welding, or by a conductive bonding material carried on the contacts themselves.

Abstract: In one embodiment, a contactor (200) is provided. The contactor (200) comprises a device side (210), a test circuit board side (155), and a thickness (110). The device side (210) is in communication with at least three electrical contact points (140, 141, 142) of the device (170). The test circuit board side (155) includes a fourth electrical contact point (193) in electrical communication with the circuit board (150). The contactor (200) also includes a first electrical pathway (220) between the first electrical contact point (140) and the second electrical contact point (142). The first electrical pathway (220) bypasses the circuit board (150). The contactor (200) further includes a second electrical pathway (270) between the third electrical contact point (142) and the fourth electrical contact point (193).

Abstract: A multi-layer interconnection board, includes a multi-layer structure in which plural interconnections are provided and which includes a ground layer, and a hole part provided in the multi-layer structure. A conductive part is provided on an internal wall part of the hole part.

Abstract: A connection structure of the present invention has a board with a through hole perforating therethrough, a land formed around the through hole, and a lead extending from an electronic component and disposed in the through hole. The land includes a wall surface land portion formed on a wall surface of the through hole, and front and back surface land portions formed on the front and back surfaces of the board respectively. A fillet connecting the land and the lead includes upper and lower fillet portions respectively contacting with the front and back surface land portions. A profile of the upper fillet portion is smaller than that of the lower fillet portion and is not smaller than that of the through hole. Therefore, occurrence of lift-off is effectively reduced while using a lead-free solder material.

Abstract: A through-hole formed in a printed circuit board is prevented from being contaminated with dampproof liquid coated on circuit elements. To prevent the dampproof liquid from flowing into the through-hole, a barrier such as a bank surrounding the through-hole is formed in a screen-printing process for printing other patterns on the circuit board. The barrier is easily and precisely formed in a space between the through-hole and the circuit elements coated with the dampproof liquid without requiring an additional manufacturing cost. The through-hole is surely protected against the dampproof liquid, while eliminating a conventional process of masking the through-hole.

Abstract: A high density printed wiring board is prepared by applying an essentially solid material into plated through holes such that the metallized layers within the through hole are unaffected by chemical metal etchants. In this manner, lateral surface metallized layers can exclusively be reduced in thickness by use of said chemical agents. These thinned lateral surface metallized layers are ultimately converted into fine pitch, 25 to 40 microns, circuitry, thereby providing high density boards. Since the through hole wall metallization is unaffected by the etching process, excellent electrical connection between the fine line circuitry is obtained. Various printed wiring board embodiments are also presented.

Abstract: A package module of an IC device comprises a substrate, at least one semiconductor device, and an interconnected layer. The substrate has a first surface and a second surface, wherein the substrate further contains a plurality of metal plugs, which penetrate the substrate and connect the first surface and the second surface. The semiconductor device is located on the first surface of the substrate, wherein the semiconductor device contains a plurality of metal pads, each of which is connected to one of the metal plugs. The interconnected layer is formed on the second surface of the substrate, wherein the interconnected layer is comprised of a plurality of metal circuits, a plurality of land pads, and a plurality of via pads, wherein each of the metal plugs is connected to one of the metal circuits.

Abstract: Power and ground planes used in Printed Circuit Boards (PCBs) having porous, conductive materials allow liquids (e.g., water and/or other solvents) to pass through the power and ground planes, thus decreasing failures in PCBs (or PCBs used as laminate chip carriers) caused by cathodic/anodic filament growth and delamination of insulators. Porous conductive materials suitable for use in PCBs may be formed by using metal-coated organic cloths (such as polyester or liquid crystal polymers) or fabrics (such as those made from carbon/graphite or glass fibers), using metal wire mesh instead of metal sheets, using sintered metal, or making metal sheets porous by forming an array of holes in the metal sheets. Fabrics and mesh may be woven or random. If an array of holes is formed in a metal sheet, such an array may be formed with no additional processing steps than are performed using conventional PCB assembly methods.

Abstract: A producing method of a multilayer circuit board for ensuring that a circuit board, such as an interposer, is provided on the multilayer circuit board. The method includes the steps forming the interposer on a support board; forming a multilayer circuit board separately from the interposer; joining the interposer formed on the support board to the multilayer circuit board; and then removing the support board. According to this method, even if the production of the interposer fails after the production of the multilayer circuit board, it is possible to scrap the interposer only and there is no need to scrap it together with the multilayer circuit board. Besides, although the interposer is thin and limp, since it is formed on the support board, the interposer can surely and readily be joined to the multilayer circuit board.

Abstract: In accordance with the invention, a semiconductor device having an electrical input/output contact surface is hermetically sealed and provided with connections via a submount such as a two-level ceramic substrate. The device is provided with a contact surface having a sealable peripheral contact and one or more interior contacts. The submount is provided with a peripheral sealable contact corresponding to the device peripheral contact and one or more feed-through contacts corresponding to the device interior contacts. The sealable peripheral contacts surround the interior contacts providing heremetic sealing.

Abstract: A method of fabricating a multilayer ceramic substrate includes stacking one or a plurality of unfired ceramic greensheets on one or both sides of a previously fired ceramic substrate, thereby forming a stack, each unfired ceramic greensheet having a firing temperature substantially equal to or lower than a firing temperature of the previously fired ceramic substrate, stacking a restricting greensheet on the unfired ceramic greensheet composing an outermost layer of the stack, the restricting greensheet having a higher firing temperature than each unfired ceramic greensheet, firing the stack at the firing temperature of the unfired ceramic green sheets with or without pressure applied via the restricting greensheet while the stack is under restriction by the restricting greensheet, thereby integrating the stack, and eliminating remainders of the restricting greensheet after the firing step.

Abstract: The present invention provides a unique, high density, electronic package having a conductive composition for filling vias or through holes to make reliable vertical or Z-connects from a dielectric layer to adjacent electrical circuits. The through holes may be plated or non-plated prior to filling. A description for making high density electronic packaging using this feature is also disclosed.

Abstract: A method of manufacturing a multilayer wiring board comprising a step of forming an upper wiring layer (27), a part thereof being electrically connected to a pillar-shaped metallic body (24a), after he pillar-shaped metal body (24a) is formed on a lower wiring layer (22) is characterized in that the step of forming the metallic body includes a sub-step of forming a plating layer (24) constituting the metallic body, a sub-step of forming a mask layer (25) on the surface where the metal body is formed, of the plating layer, and a sub-step of etching the plating layer. The manufacture can be carried out with simple equipment combination of conventional steps and the wiring layer can be made fine.

Abstract: An apparatus including a substrate, and a surface mount component coupled with a top surface of the substrate, where the component includes side surfaces and a bottom surface, and the bottom surface is disposed adjacent to the top surface of the substrate. The side surfaces and the bottom surface of the surface mount component define a lower portion therebetween, the lower portion recessed away from the bottom component surface to allow solder to flow freely around a mounting lead of the surface mount component, for example, during the reflow process.

Abstract: A multi-layer circuit comprises a circuit and a resin covered conductive layer disposed on the circuit, wherein the resin covered conductive layer comprises a liquid crystalline polymer resin laminated to a conductive layer. Such multi-layer circuits are particularly useful for high density circuit applications.

Abstract: The invention relates to a coaxial conductor having an inner conductor (S), an outer conductor (U) encasing the inner conductor (S) at least partly, and a dielectric (E) placed between the two. The coaxial conductor (K) is formed in a multi-layer circuit board (M) primarily by means of vias (2a-2h) and strip conductors (1a-1i). According to an embodiment of the coaxial conductor of the invention, the inner conductor (S) is formed substantially parallel to the board layers (3a-3e) of the multi-layer circuit board (M), the inner conductor (S) is formed of at least one strip conductor (1a, 1b) or at least one electroconductive via (2a) or a combination of the same, and the outer conductor (U) is formed of at least four electroconductive vias (2b-2h) and at least two strip conductors (1c-1i). The dielectric (E) is at least partly formed of the material of the board layers (3a-3e). The invention relates also to a method for manufacturing this coaxial conductor.

Abstract: An electrical structure, and associated method of formation, that includes a complex power-signal (CPS) substructure. The CPS substructure is formed and tested to determine whether the CPS substructure satisfies electrical performance acceptance requirements. The testing includes testing for electrical shorts, electrical opens, erroneous impedances, and electrical signal delay. If the CPS substructure passes the tests, then a dielectric-metallic (DM) laminate is formed on an external surface of the CPS substructure. The DM laminate includes an alternating sequence of an equal number N of dielectric layers and metallic layers such that a first dielectric layer of the N dielectric layers is formed on an external surface of the CPS substructure. N is at least 2. A multilevel conductive via is formed through the DM laminate and is electrically coupled to a metal layer of the CPS substructure.

Abstract: A circuit board includes a number of orifices, a number of conductors engaged in the orifices of the circuit board and each having an aperture, and an insulating layer applied onto the conductors for preventing a weld metal material from being attached onto the conductors. One or more couplers each includes a bar for securing the prongs together. The weld metal material may be prevented from being applied between the bar and the conductors, for preventing the coupler from being separated from the conductors, and for preventing the prongs from being shortaged.

Abstract: An electrically conducting bonding connection (B) is produced between an electronic circuit (S) arranged on an electrically conducting support plate (1) and the support plate (1) by providing a hole (4, 5), into which an electrically conducting bonding element (2) with a bondable surface (3) is pressed in such a way that the support plate (1) and the bonding element (2) enter into an electrically conducting and frictional connection; the bonding connection is subsequently produced with the bonding element (2).

Abstract: An opening portion is provided in a connecting portion of a flexure blank, an opening end portion of an insulating base layer is coated with a conductive member without exposing the opening end portion of the insulating base layer in the connecting portion, and a lower surface of the conductive member of the opening portion in the connecting portion of the flexure blank is structured such as to form the same surface as the lower surface of the insulating base layer.

Abstract: High aspect ratio (5:1-30:1) and small (5 &mgr;m-125 &mgr;m) diameter holes in a dielectric substrate are provided, which are filled with a solidified conductive material, as well as a method of filling such holes using pressure and vacuum. In certain embodiments, the holes are lined with conductive material and/or capped with a conductive material. The invention also contemplates a chip carrier formed by such material.

Abstract: A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained.

Abstract: An electronic package and method of making the electronic package is provided. A layer of dielectric material is positioned on a first surface of a substrate which includes a plurality of conductive contacts. At least one through hole is formed in the layer of dielectric material in alignment with at least one of the plurality of conductive contacts. A conductive material is positioned in the at least one through hole substantially filling the through hole. At least one conductive member is positioned on the conductive material in the through hole and in electrical contact with the conductive material. The electronic package improves field operating life of an assembly which includes a semiconductor chip attached to a second surface of the substrate and a printed wiring board attached to the conductive members.

Abstract: The present invention provides a through-hole structure for connecting a connector to a printed circuit board, the through-hole structure comprising a signal through-hole having a conductive layer therein for supplying a signal to the printed circuit board, power through-holes having a conductive layer therein for supplying power to the printed circuit board, and dielectric constant adjusting portions formed among the signal through-hole and the power through-holes. Moreover, the present invention provides a printed circuit board having the above-described through-hole structure formed therein.

Abstract: A multilayer wiring board comprising a plurality of conductor patterns stacked with an insulating layer composed of a thermosetting resin interposed between adjacent conductor patterns, wherein the insulating layers are each formed of a pair of film-like thermosetting resin layers and a resin film having a lower coefficient of linear expansion than, and sandwiched between, the thermosetting resin layers, and wherein the electrical connection between the stacked conductor patterns is established by vias formed through the insulating layers. A method of fabricating such a multilayer wiring board is also disclosed.

Abstract: A method and product for fabricating a printed circuit board assembly comprising a via, wherein the method inhibits the flow of molten solder into the via during a wave soldering step, thereby preventing heat transfer that might otherwise degrade a solder joint at a top pad that is thermally coupled to the via. The method comprises the steps of: (1) fastening a bottom component to the bottom surface of the circuit board by a screening and reflow of solder paste that also generates a solder plug in the via; (2) fastening top components to the top surface of the circuit board by a screening and reflow of solder paste, wherein the top components comprise ball grid arrays and other surface mount devices that are to be affixed to pads which are connected to vias; and (3) wave soldering the bottom surface to affix additional components onto the circuit board, such as pin-in-hole components placed on the top surface.

Abstract: A substrate and a method of making the substrate is provided. The substrate includes a layer of metal with at least one through hole therein, the layer of metal having an adhesion promoting layer thereon. A layer of a partially cured low-loss polymer or polymer precursor is positioned on the adhesion promoting layer and a plurality of conductive circuit lines are positioned on a portion of the partially cured dielectric layer. The substrate can be used as a building block in the fabrication of a multilayered printed circuit board.

Abstract: An interconnection structure comprises: an interlayer insulating film; and first interconnection layer to which low potential is applied and second interconnection layer to which high potential is applied when the interconnection structure is used, formed with the interlayer insulating film therebetween; and a via hole formed in the interlayer insulating film for electrically connecting the first interconnection layer and second interconnection layer. Overlap regions including regions of the first interconnection layer and the second interconnection layer faced said via hole are formed for both the first interconnection layer and second interconnection layer.

Abstract: A press-fit pin connection checking method using a first printed circuit board having a plurality of through holes in which a plurality of press-fit pins of a first press-fit connector are adapted to be respectively press-fitted, and a checking conductor pattern formed so as to be electrically insulated from all of the through holes and to, surround all of the through holes for engagement with the first press-fit connector. The press-fit pin connection checking method includes the steps of mounting the first press-fit connector on the first printed circuit board, providing a checking jig having a second printed circuit board and a second press-fit connector mounted on the second printed circuit board, engaging the second press-fit connector of the checking jig with the first press-fit connector, and selectively connecting the checking conductor pattern of the first printed circuit board to output lands of the checking jig.

Abstract: The present invention is directed to a high-performance system on a clip which uses multi-layer wiring/insulation through-hole interconnections to provide short wiring and controlled low-impedance wiring including ground planes and power supply distribution planes between chips.

Abstract: There is provided a fuse relay junction block for use in automobiles capable of not only considerably reducing the number of assembling process but also realizing small sized, lightweight compact block, thereby enhancing reliability and achieving a low cost material by aggregating the conventional plural pieces of boards to form a multilayered circuit structure. The fuse relay junction block comprises a box cover having a plurality of connection ports through which wirings of electronic wiring systems are connected to terminals of wiring members and a plurality of filling ports for fuses, a box body engaged in the box cover, a multilayered board housed between the box cover and the box body, wherein said wiring members being arranged on not less than two layers of board and integrated with primary molded portions by insert molding to form a network structure, said network structure is subjected to an insert to form a secondary molded portion.

Abstract: An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.

Abstract: A method and structure relating to multisegmented plated through holes. A substrate includes a dielectric layer sandwiched between a first laminate layer and a second laminate layer. A through hole is formed through the substrate. The through hole passes through nonplatable dielectric material within the dielectric layer. As a result, subsequent seeding and electroplating of the through hole results in a conductive metal plating forming at a wall of the through hole on a segment of the first laminate layer and on a segment of the second laminate layer, but not on the nonplatable dielectric material of the dielectric layer. Thus, the conductive metal plating is not continuous from the first laminate layer to the second laminate layer.

Abstract: A substrate structure for an integrated circuit package. The substrate is electrically connected to a circuit board and an integrated circuit. The substrate includes a plurality of metal sheets and glue. The metal sheets are arranged opposite to each other. Each of the metal sheets includes a first surface and a second surface. The glue is used for sealing the plurality of metal sheet to form the substrate. The first surfaces and second surfaces of the metal sheets are exposed to the outside of the glue so as to form a plurality of signal input terminals for electrically connecting to the integrated circuit and a plurality of signal output terminals for electrically connecting to the circuit board. Thus, the signal output terminals of the metal sheets can be electrically connected to the circuit board smoothly. Furthermore, the signal transmission distance between the integrated circuit and the circuit board can be shortened so that better signal transmission effect can be obtained.

Abstract: A laminate printed circuit board of the present invention includes wirings respectively extending from terminals provided on the front and rear of the board. The wirings are each connected to an intermediate layer via a respective blind through hole. A wiring provided on the intermediate layer plays the role of a lead for plating. The circuit is capable of reducing a wiring area and noise.

Abstract: The invention provides an electrically conductive composition for use in a through hole of an electric component, comprising a noble metal powder, a base metal powder and an organic vehicle, the amount of the base metal to 100 parts by weight of the noble metal is about 1 to 95 parts by weight. The composition provides baked electrodes free from structural defects, such as a discontinuity or separation due to shrinkage on calcination.

Abstract: The wiring board 1 is provided with the first resin insulating layer 7, the first filled via 19 penetrating it and filled and formed by the plating, and the second conductor layer 29 formed by the plating on them. In them, the second conductor layer 29 comprises the first resin insulating layer 7, the electroless plating layer 33 formed on the first filled via 19, and the electrolytic plating layer 37 composed of plating particle of substantially uniform size, formed thereon.

Abstract: An adapter is provided for mounting a ball grid array device on a pin-type integrated circuit socket, and includes a base plate and an interfacing plate. The base plate has a device mounting side formed with a plurality of solder pads thereon. The base plate is further formed with a plurality of upper through holes, each of which corresponds to one of the solder pads. The interfacing plate is formed with a plurality of lower through holes that correspond respectively with the upper through holes and are coaxial therewith. The interfacing plate further has a socket confronting side with a plurality of insert pins depending therefrom. Electrical conductors are provided on the base plate and the interfacing plate for connecting electrically and respectively the solder pads and the insert pins via the upper and lower through holes.

Abstract: An insulator is provided between interconnect layers oppositely placed. The interconnect layers are connected between by connection members provided through the insulator. The connection members at one and the other ends are connected between in their center positions. A shield layer is provided spaced from the intermediate connection layer generally on a same plane as the intermediate connection layer. The interconnect layers where considered generally as a circular cylinder have a diameter m, and the intermediate connection layer where considered generally as circular has a diameter r, r<m is given where the connection members are high in characteristic impedance than the interconnect layers, and r<m is given where the connection members are low in characteristic impedance then the interconnect layers.

Abstract: A multilayer printed circuit board and a corresponding fabrication method are disclosed, which circuit board achieves a relatively high degree of wiring density and a relatively high degree of wiring design freedom. These advantages are obtained in the inventive printed circuit board by electrically connecting power conductors or ground conductors using through holes. On the other hand, signal conductors in any two adjacent signal wiring layers are electrically connected using via holes extending only through an intervening electrically insulating layer. Preferably, the electrically insulating layer is a layer of photosensitive resin and the via holes are formed using conventional photolithographic techniques.

Abstract: An insulator substrate or printed circuit board (PCB) having a filled and plated via. A sidewall of the via and preferably opposite sides of the insulator substrate are first plated with a conductive material. The plated via is then filled with an electrically conductive fill composition. A conductive cap layer is preferably formed over both ends of the conductive fill composition and the opposite surfaces of the insulator substrate, and can be bonded to a surface mount contact as a land or a pad.

Abstract: Removable mask films 303 are formed on the both sides of the substrate having the adhesive layer 302 by applying and drying a resin varnish 304 including a ultraviolet-absorbing agent, and fine through holes 306 are formed by using a third harmonics YAG solid-state laser light with a relatively short wavelength not longer than that in the ultraviolet range in such a way that the effects of such a residual strain as the conventional embodiment forming a removable mask film by a laminating process may be decreased as well as the more fine hole drilling compared with conventional embodiment using the carbon dioxide gas laser with a relatively long wavelength may be performed.

Abstract: A front-and-back electrically conductive substrate includes a plurality of posts composed of a material that can be anisotropically etched and having an electrically conductive portion that has at least a first surface and a second surface that communicate with each other, and an insulative substrate that supports the plurality of posts.