Abstract: A printed substrate having a structure to prevent breakage of the printed substrate by distributing stress which acts on a border of reinforcement patterns provided in the substrate. The printed substrate includes multiple layer conductive patterns, through-holes which pass through the conductive patterns and the printed substrate, and reinforcement patterns formed around the perimeters of the through-holes in the multiple layers of the printed substrate. The sizes and/or shapes of the reinforcement patterns in each layer differ such that stress acting on the border of the reinforcement pattern is distributed.

Abstract: A via-structure off a multilayer interconnection ceramic substrate for a multi-chip module, a semiconductor package and an insulating substrate has a high strength and a high reliability being produced at a low cost. A gap is provided at an interface between a via-conductor and ceramics, and filled with a resin. The resin is preferably of a thermosetting polyimide resin or a benzo-cyclo-butene resin.

Abstract: An interconnect sheet for connecting multiple layers of a circuit board for the manufacture of high interconnect density PWBs. The interconnect sheet preferably comprises an area array grid of 0.003 inch solder columns having a 0.006 inch pitch. The interconnect sheet is preferably used to attach two or more multi-layer boards by placing one sheet at every interconnect surface. This interconnect mechanism has an advantage of redundancy of contact and therefore lower susceptibility to failure than other methods. The interconnect sheet of the present invention also offers a large tolerance for registration error without shorting adjacent pads. The preferred method of fabrication of the interconnect sheet begins with creating equally spaced holes through a 0.5 ounce double sided laminate comprising a dielectric sheet and copper plates on either side of the dielectric. These holes are filled with solder paste and the sheet undergoes a baking process to shrink the paste.

Abstract: Hermetically sealed chip packages are described which are capable of withstanding elevated temperatures and accompanying temperature fluctuations. The chip packages feature electrically conductive, hermetic vias which provide electrical pathways through generally dielectric ceramic substrates employed in the chip package. Methods of forming such hermetic vias are also disclosed.

Abstract: The invention is directed to a printed circuit board arrangement for plug-type connections composed of a blade connector and spring clip, whereby the individual contact passages are surrounded by electrically conductive shield plates that are connected to contactings carrying shield potential that are attached both at the backplane side as well as at the assembly side, and whereby both the contact blades and contact springs as well as the contactings are contacted and secured with press-in technique in the printed circuit boards fashioned as multi-layer multilayers. In order to create an adequate interconnect lead-through width between the contactings, the shield potential in the printed circuit board arrangement of the invention is conducted in a separate shield printed circuit board (3) that is electrically separated from the multilayer (1) by an insulating foil (2).

Abstract: A printed-circuit board includes an insulating substrate, at least one insulating layer formed on the substrate, a circuit pattern formed on the layer, and a protective coating layer formed on the insulating layer having the circuit pattern formed thereon. The circuit pattern has a location to be cut, if necessary. A material of the protective coating layer is at least partially eliminated from two zones which are disposed at sides of the location to be cut, and a material of the insulating layer may be further at least partially eliminated from those zones.

Abstract: Structures are described having vias with more than one electrical conductor at least one of which is a solid conductor which is formed by inserting the wire into the via in a substrate wherein the wire is attached to an electrically conductive plate which is spaced apart from the substrate by a spacer which leave a space between the substrate and plate. The space is filled with a dielectric material. The space with via between the conductor and via sidewall is filled with a dielectric material. The via is used for making transformers and inductors wherein one of the via conductors is used for inner windings and another of the via conductors is used for outer windings.

Abstract: A printed circuit board arrangement and method of making the same are provided, the printed circuit board arrangement comprising a first printed circuit board having a component carrying side and an opposite printed circuit side, a second printed circuit board having a component carrying side and an opposite printed circuit side, and securing structure securing the second printed circuit board to the first printed circuit board, the securing structure comprising a plurality of conductive jumper wires each having a generally L-shaped configuration and having opposite ends one of which is secured to the printed circuit side of the second printed circuit board and the other of which is secured to the printed circuit side of the first printed circuit board.

Abstract: A printed circuit board is manufactured by steps of forming on a laminate a plurality of penetrating holes, a plurality of semi-circular grooves, and a plurality of semi-circular through-holes. The plurality of penetrating holes are formed at predetermined locations along a straight line on the laminate board whose two surfaces are copper plated. The plurality of semi-circular grooves are formed from the penetrating holes which are cut into halves by a slit forming process. The plurality of semi-circular through-holes are formed using a jig member inserted into said slit and forming a copper plated layer on a surface of each of said semi-circular grooves. Highly reliable semi-circular through-holes can be formed because no peeling or burrs develop in the copper plated layer.

Abstract: The method for manufacturing a printed circuit board having an electrode on an end surface of a substrate has the steps of forming a hole at a predetermined position of a laminate board whose two surfaces are copper plated, filling in the hole with copper paste, forming a circuit pattern such that a copper foil portion remains only in one half of the hole, and etching an exposed region of the substrate. No mechanical process is used in the formation of the end face through-hole so that it is free from the development of burrs in or peeling off of a conductive layer.

Abstract: A transducer signal terminator for providing electrical connections between a plurality of read/write transducer lead wires and a preamplifier includes a substrate having a plurality of layers and has a plurality of intermediate strips attached to the substrate. A plurality of head pads are located on the substrate to provide interconnection points between the lead wires and the substrate. Each intermediate strip is placed on the substrate such that each of a plurality of holes therein is aligned with one of the head pads on the substrate. An electrical connection is then formed between each head pad and a corresponding conductive pad of the intermediate strip.

Abstract: A multi-layer wiring assembly including a stack of insulating layers, e.g. of polyimide, alternating with wiring patterns, typically of copper. To establish the circuit pattern, successive wiring patterns are connected to one another through the intervening insulating layers at predetermined locations, by metal stud connections. The studs are formed during assembly of the stack by wire-bonding a stud onto an underlying wiring pattern through a through-hole of the insulating layer above, and then stamping the exposed end of the wire-bonded stud to spread it into contact with the uppermost wiring pattern. The wire-bonded studs e.g. of Au, form strong bonds with the underlying conductor and are quick to apply in an automated process using a wire-bonding machine.

Abstract: A module substrate consists of a substrate mounting electronic parts on one surface thereof, a conductor for electrically conducting the electronic parts mounted on the substrate to the other surface of the substrate, a conductive solder for attaching the conductor to a base substrate movably contacting the other surface of the substrate to electrically connect the electronic parts with the base substrate, and a deformable bushing for holding the conductor to maintain the attachment of the conductor to the base substrate regardless of whether the base substrate is moved.

Abstract: A pot core matrix transformer has a large number of connections from its secondary winding, the connections being fairly evenly distributed around the bottom surface. If these connections are terminated in a circuit board which has been optimized for good thermal conductivity, the temperature rise in the transformer will be small, even with very high current densities. Embodiments are shown for mounting directly on a heat sink and for surface mounting on a circuit card.

Abstract: An interconnect sheet for connecting multiple layers of a circuit board for the manufacture of high interconnect density PWBs. The interconnect sheet preferably comprises an area array grid of 0.003 inch solder columns having a 0.006 inch pitch. The interconnect sheet is preferably used to attach two or more multi-layer boards by placing one sheet at every interconnect surface. This interconnect mechanism has an advantage of redundancy of contact and therefore lower susceptibility to failure than other methods. The interconnect sheet of the present invention also offers a large tolerance for registration error without shorting adjacent pads. The preferred method of fabrication of the interconnect sheet begins with creating equally spaced holes through a 0.5 ounce double sided laminate comprising a dielectric sheet and copper plates on either side of the dielectric. These holes are filled with solder paste and the sheet undergoes a baking process to shrink the paste.

Abstract: A multilayer printed circuit board and a corresponding fabrication method are disclosed, which circuit board achieves a relatively high degree of wiring density and a relatively high degree of wiring design freedom. These advantages are obtained in the inventive printed circuit board by electrically connecting power conductors or ground conductors using through holes. On the other hand, signal conductors in any two adjacent signal wiring layers are electrically connected using via holes extending only through an intervening electrically insulating layer. Preferably, the electrically insulating layer is a layer of photosensitive resin and the via holes are formed using conventional photolithographic techniques.

Abstract: A two-sided printed circuit board including a base having a first surface, a second surface substantially parallel to the first surface, and a plurality of through-holes formed in the base; a first conductive layer provided on the first surface of the base; a second conductive layer provided on the second surface of the base; and a conductive particle buried in each of the through-holes in a pressurized state for electrically connecting the first conductive layer and the second conductive layer.

Abstract: An electrical interconnect structure for connecting a substrate to the next level of packaging or to a semiconductor device. The interconnect structure includes at least two layers of polymeric material, one of the layers having a capture pad and the second of the layers having a bonding pad electrically connected to the capture pad. The bonding pad and the second layer of polymeric material are at the same height so that the bonding pad is level with the second layer of polymeric material. Finally, there is a cap of electrically conducting metallization on the bonding pad and extending beyond the second layer of polymeric material. The cap is of a different composition than the bonding pad.

Abstract: A process for fabricating embedded ground plane and shielding structures using sidewall insulators in high frequency circuits having vias or contacts. A conductive ground plane disposed between two dielectric layers has vias formed by removing insulating dielectric and conductive ground plane material according to a single photo-lithography masking operation. A sidewall insulator formed on vertical sidewalls of the vias, electrically isolates the ground plane from interconnect metal passing from a lower interconnect layer to an upper interconnect layer through the vias. Alternatively, shielding structures incorporating multiple sidewall insulators and upper and lower shielding may be fabricated to entirely encapsulate the lower interconnect metal from external environments. Process efficiency and yield are increased due to the simplified processing of the embedded ground plane and shielding structures.

Abstract: An improved multilayer integrated circuit package. The package, which has a plurality of layers of conducting leads, has metal vias which connects leads in a first layer connected to leads in a second layer. The improvement comprises having at least on of the vias with a cross-section such that the via is much larger in a first direction than in a second direction generally perpendicular to the first direction.

Abstract: There is disclosed a high density electronic connector assembly (system) having a first insulating portion and a second insulating portion adapted to be mated together and held in precise dimensional relation to each other with a suitable steady force. There are a plurality of contact members projecting down beneath the first portion on very close centers. There is a like plurality of socket holes in the second portion, with a respective printed-circuit (conductor) land at the bottom of each hole. Each land is adapted to act as a spring element to establish a minimum normal contact force. Seated in each hole is a small metal ball. Each ball is adapted to press against a respective contact member of the first portion when the upper and lower portions are fully mated. There is also disclosed a method of seating and re-flow soldering the balls to the respective lands in the socket holes.

Abstract: A printed circuit board includes an array of conductive pads including component-mounting holes disposed on first and second surfaces thereon. An array of conductive attachment lands arranged in pairs of first and second attachment lands are disposed on the first and second surfaces. The first and second attachment lands are insulated from one another and separated by a distance selected to allow attachment of standard sized components therebetween on the first and second surfaces of said circuit board. First and second conductive power distribution planes are disposed on the first and second surfaces and are insulated from the conductive pads and the second attachment lands disposed thereon.

Abstract: The multilayer printed wiring board of this invention consists of a base substrate, a plurality of multilayer interconnections formed by lamination of metal wiring layer and insulation layer on the base substrate and ceramic substrates provided with through holes for electrical connection of the multilayer interconnections and inserted between two multilayer interconnections. The manufacturing method comprises lamination of metal wiring layers and insulation layers on both sides of ceramic substrates to form multilayer interconnections, forming of a multilayer interconnection on the base substrate by laminating a wiring layer and an insulation layer, and integration of the ceramic substrates with metal wiring layers and the base substrate placed together under heated and pressurized conditions.

Abstract: A method of manufacturing a hermetically sealed conductive feedthrough, particularly for use in ceramic substrates or housing, comprises the steps of inserting an active alloy containing preform into a predetermined insertion hole in a presintered ceramic article and heating the assembly to a temperature to achieve a brazing reaction at the interface of the article and active alloy to produce a hermetically sealed conductive feedthrough. The invention further discloses a non-melting connector pin which may be fixed to the active alloy feedthrough during the above heating step.

Abstract: A structure and method for forming contact structures in integrated circuits. A buffer layer is formed over an underlying conductive element. A first conductive layer is then deposited over the buffer layer and patterned to define a first interconnect layer. While the first interconnect layer is patterned, the buffer layer protects the underlying conductive element from damage. Portions of the buffer layer which are not covered by the first interconnect layer are then removed, and a second conductive layer is deposited over the integrated circuit. The second conductive layer is then anisotropically etched to form conductive sidewall spacers alongside the vertical sidewalls of the first interconnect layer, where at least one of the conductive sidewall spacers makes electrical contact with the underlying conductive element. Therefore, a conductive contact is made between the underlying conductive element and the first interconnect layer through at least one of the conductive sidewall spacers.

Abstract: A conductive line is applied to a substrate by aligning the conductive line in juxtaposition with a selected area of the substrate; bonding the conductive line to the substrate; and detaching the conductive line from a carrier in which the conductive line is suspended. The carrier has a carrier opening defined by sidewalls, and conductive material is suspended by the sidewalls of the carrier opening so as to be embedded within the carrier opening, and form the conductive line.

Abstract: Described herein are interconnected mutilayer boards and their fabrication processes. Multilayer conductor lines of a skeleton structure are formed by conducting multilayer metallization while including all resist layers and metallic under-conductive layers and then removing the resist layers and metallic under-conductive layers at once. Spaces between the multilayer conductor lines of the skeleton structure are then filled with a solventless varnish so that insulating layers are formed. Modules making use of such interconnected multilayer boards and computers having such modules are also described.

Abstract: A method and apparatus are provided for mounting a circuit component such as a gate array device 12 on a printed circuit board 14. The component 12 may include a plurality of pin-type electrical contacts 18 wherein a first portion of the pin-type contacts 18 have been replaced by button-type contacts. In one embodiment, at least two of the pin-type contacts 22, 24 have been retained and serve the dual purpose of locating the gate array device 12 on the printed circuit board 14 and attaching the gate array device 12 to the printed circuit board 14. A sheet of boron nitride 26 is positioned between the printed circuit board 14 and the circuit component, e.g., the gate array device 12. The sheet of boron nitride 26 includes a plurality of openings extending therethrough in a pattern corresponding to the pattern of electrical contacts 18 on the gate array device 12. The openings 32 in the sheet of boron nitride 26 that correspond to the button-type contacts have resilient electrical contacts 34 disposed therein.

Abstract: The present integrated circuit package provides both a high density of conductor poles, and reduced crosstalk noises between the conductor poles. The conductor poles are received within holes in an insulating substrate. The insulating substrate has a laminated, multi-layer ceramic substrate structure comprising insulating plates having metallized layers thereon which constitute a portion of the walls of the holes. In addition, insulating layers for insulating the metallized layers from the conductor poles are formed within a selected number of the holes.

Abstract: Disclosed is a multilayer ceramic substrate for electronic applications including:(a) at least one internal layer having vias at least partially filled with a metallic material;(b) at least one sealing layer having vias at least partially filled with a composite material that is a mixture of ceramic and metallic materials wherein at least one via from the internal layer is aligned with at least one via from the sealing layer; and(c) a cap of material interposed between the aligned vias.Also disclosed is a method of forming the multilayer ceramic substrate.

Abstract: An improved rework method and rework pin for repairing and reworking multilayer printed circuit boards are described. The rework pin is constructed of conductive material having a configuration that accommodates the configuration of through holes in a multilayer printed circuit board assembly. The rework pin includes a cup-like structure at one end for cooperating with component leads, an elongated electrically insulated portion and an electrically conductive tip portion extending beyond the thickness of the multilayer board.

Abstract: A through hole is formed by a drill in a defective through hole in a board. An insulating resin is coated on the inner surface of the through hole and a cylindrical conductor is closely fixed with an adhesive to the hole h1 to form a reproduced through hole. Thereafter, as usual, a part lead is inserted into and soldered in the reproduced through hole to thereby recover the connection of the lead with the wiring circuit copper foil impaired by the recovering operation of the defective through hole using an external lead.

Abstract: A circuit board comprising a dielectric composite (20,22,24) clad with electrical circuitry (16,38) is provided with an improved electrical interconnection between alternate conductive circuitry planes of the substrate. Connecting features (18,40) integral with the conductive circuitry on each conductive plane of the substrate extend into a through hole (30) of the substrate toward each other and are fused (46) to one another by irradiation from a laser beam. In another embodiment a connecting feature (52) from only one of the circuit layers (50) extends into the through hole (66) of the dielectric (60,62,64) and is electrically connected and physically bonded to the circuitry layer on the other side of the substrate by means of fusion or a drop (68) of electrically conductive resin interposed between the raised connector feature and the opposed circuit layer (74).

Abstract: An electrically connectable module is manufactured from a substrate of an electrically insulating polymer matrix doped with an electrically insulating fibrous filler capable of heat conversion to an electrically conductive fibrous filler to form a fiber-doped substrate. One end of an electrical connector is embedded in the fiber-doped substrate to locate the one end adjacent the surface of the substrate while exposing an opposite end of the electrical connector. The surface of the fiber-doped substrate is locally heated preferably with a laser to form a conductive trace by the in-situ heat conversion of the electrically insulating fibrous filler, the localized heating including the one end of the electrical connector to electrically connect the electrical connector to the conductive trace. In another embodiment, a conductive material is electrodeposited on the conductive trace by applying a voltage to the opposite end of the electrical connector.

Abstract: An improved circuit board structure and method of forming the same are provided. The circuit board includes an insulating core and has plated through holes connecting the circuitry on both sides and intermediate layers of the core. A permanent dielectric material is applied on at least one surface of the board covering the circuitry and plated through holes. Vias are formed through the dielectric material and signal lines are formed on the top of the dielectric material connected to the circuitry onto the board through the vias. Additional layers of dielectric material with additional wiring and vias can also be formed for multi-level wiring.

Abstract: A double sided or multi-layered printed circuit board comprises an insulating substrate having conductors on opposed major surfaces thereof which are electrically connected together via a through-hole. A sealing member composed of conductive resin fills the through-hole. An insulating layer covers the conductors and sealing member, and an electronic wave-shielding layer covers the insulating layer.

Abstract: Terminations (10, 40, 70, 90) for flexible printed circuitry comprises thermosetting epoxy or polyimide prepreg sheets (36, 56, 64, 88, 102) in the rigid portion, instead of thermoplastic acrylic adhesive, partial coverlays (20, 50, 84, 94) instead of full coverlays and, as desired, rigidized members of epoxy or polyimide glass (16, 52, 54, 86) or prepreg internally as well as externally of the terminations. Anchor pads 34 secured to plated-through holes (38) minimize z-axis expansion of the terminations.