Abstract: A sheet metal component (8) for pattern conduction comprises a lead portion (8a) that is connected to an end portion of a first portion (8c1) of a ceiling portion (8c) by a coupling portion (8d) forming a first bend (R1); and a portion to be soldered (8b) that is bent inwardly from an end portion (8c2E, 8c3E) of a longitudinally protruding second portion (8c2, 8c3) of the ceiling portion (8c), which is connected to the first portion (8c1), so as to form a second bend (R2).

Abstract: An anisotropic electro-conductive adhesive layer 14 including an adhesive 15 made of a thermosetting or thermoplastic resin containing electro-conductive particles 16 dispersed therein is formed on a basic electro-conductive adhesive layer 14 to be electrically connected with first circuit pattern 12 via the electro-conductive particles 16. Thereby, the production process can be simplified and the production cost can be reduced. Also, the micro-circuit patterns can be arranged at a high density.

Abstract: A high density printed wiring board is prepared by applying an essentially solid material into plated through holes such that the metallized layers within the through hole are unaffected by chemical metal etchants. In this manner, lateral surface metallized layers can exclusively be reduced in thickness by use of said chemical agents. These thinned lateral surface metallized layers are ultimately converted into fine pitch, 25 to 40 microns, circuitry, thereby providing high density boards. Since the through hole wall metallization is unaffected by the etching process, excellent electrical connection between the fine line circuitry is obtained. Various printed wiring board embodiments are also presented.

Abstract: Conductive materials that have low coefficients of thermal expansion (CTEs) and that are used for power and ground planes are disclosed. Fibrous materials (such as carbon, graphite, glass, quartz, polyethylene, and liquid crystal polymer fibers) with low CTEs are metallized to provide a resultant conductive material with a low CTE. Such fibers may be metallized in their individual state and then formed into a fabric, or these materials may be formed into a fabric and then metallized or a combination of both metallizations may be used. In addition, a graphite or carbon sheet may be metallized on one or both sides to provide a material that has a low CTE and high conductivity. These metallized, low CTE power and ground planes may be laminated with other planes/cores into a composite, or laminated into a core which is then laminated with other planes/cores into a composite. The resultant composite may be used for printed circuit boards (PCBs) or PCBs used as laminate chip carriers.

Abstract: The present invention provides a printed wiring board formed with a film thereon, wherein the printed wiring board has at least a first reference mark and at least a first scale mark separated from the first reference mark, and the film has at least a second reference mark and at least a second scale mark separated from the second reference mark, and the second scale is positioned to overlap the first scale, and the first scale mark has a first scale and the second scale mark has a second scale which is so different from the first scale as to allow measuring a necessary amount of compensation in alignment to the film with reference to the printed wiring board.

Abstract: A high density printed wiring board is prepared by applying an essentially solid material into plated through holes such that the metallized layers within the through hole are unaffected by chemical metal etchants. In this manner, lateral surface metallized layers can exclusively be reduced in thickness by use of said chemical agents. These thinned lateral surface metallized layers are ultimately converted into fine pitch, 25 to 40 microns, circuitry, thereby providing high density boards. Since the through hole wall metallization is unaffected by the etching process, excellent electrical connection between the fine line circuitry is obtained. Various printed wiring board embodiments are also presented.

Abstract: The invention presents an ion conductor with high reliability, that is one of the following perovskite oxides: {circle over (1)} perovskite oxide of the composition BaZr1-xCexO3-p (0<x<0.8); {circle over (2)} perovskite oxide consisting essentially of Ba, Zr, Ce and O, and substantially conducting protons only; {circle over (3)} perovskite oxide of the composition BaZr1-x-yCexMyO3-p (M, O≦x<1,0<y<1, x+y<1) that is a single-phase polycrystal of cubic, tetragonal or orthorhombic crystal structure whose unit cell edges a, b and c (with a≧b≧c) satisfy 0.8386 nm<a<0.8916 nm and b/a≧0.90; {circle over (4)} perovskite oxide of the same composition as in {circle over (3)} that is a single-phase sintered product with a density of at least 96% of the theoretical density; and {circle over (5)} perovskite oxide of the same composition as in {circle over (3)} that is a single-phase sintered product with 1 to 30 &mgr;m granular diameter.

Abstract: A printed circuit board has: a base material layer having a first via hole; and an insulating layer having a second via hole, the insulating layer being provided on one surface of the base material layer, wherein a cross-sectional area of the second via hole is smaller than a cross-sectional area of said first via hole, and wherein the first and second via holes are filled with a conductive material.

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts expand radially and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by conductive bonding material carried on the contacts themselves.

Abstract: A method for fabricating a printed circuit board assembly comprising a via, wherein the method inhibits the flow of molten solder into the via during a wave soldering step, thereby preventing heat transfer that might otherwise degrade a solder joint at a top pad that is thermally coupled to the via. The method comprises the steps of: (1) fastening a bottom component to the bottom surface of the circuit board by a screening and reflow of solder paste that also generates a solder plug in the via; (2) fastening top components to the top surface of the circuit board by a screening and reflow of solder paste, wherein the top components comprise ball grid arrays and other surface mount devices that are to be affixed to pads which are connected to vias; and (3) wave soldering the bottom surface to affix additional components onto the circuit board, such as pin-in-hole components placed on the top surface.

Abstract: A wiring board has vias which penetrate the wiring board from one side to the other side. The vias are radially arranged in the direction from one side to the other side so that the interval between the vias on one side can be made smaller than the interval between the vias on the other side. In order to prevent the vias from being electrically short-circuited to each other, even if the interval between the vias provided on one side of the wiring board is extremely reduced, a plurality of vias are radially arranged in the direction from one side of the wiring board to the other side so that an interval between the vias on one side of the wiring board can be made smaller than interval of the vias on the other side. A conductor forming the core portion of the via is coated with a sheath portion made of insulating material.

Abstract: A method and product for fabricating a printed circuit board assembly comprising a via, wherein the method inhibits the flow of molten solder into the via during a wave soldering step, thereby preventing heat transfer that might otherwise degrade a solder joint at a top pad that is thermally coupled to the via. The method includes the steps of: (1) fastening a bottom component to the bottom surface of the circuit board by a screening and reflow of solder paste that also generates a solder plug in the via; (2) fastening top components to the top surface of the circuit board by a screening and reflow of solder paste, wherein the top components have ball grid arrays and other surface mount devices that are to be affixed to pads which are connected to vias; and (3) wave soldering the bottom surface to affix additional components onto the circuit board, such as pin-in-hole components placed on the top surface.

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts expand radially and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by conductive bonding material carried on the contacts themselves.

Abstract: An assembly including a back plate and a circuit board coupled to the back plate with mechanical fasteners is provided. The fastener has an end and a head with a top surface. The top surface of the head is between the top and bottom surfaces of the circuit board, inclusively, such that the head is either below or flush with the top surface of the circuit board. This allows solder to be deposited onto the circuit board with an automated surface mounted assembly system and components to be attached to the circuit board after the circuit board is attached to back plate. The circuit board has an opening that receives the head of the fastener. A portion of this opening has a diameter as large as the diameter of the widest portion of the head and another portion of this opening, located closer to the back plate has a smaller diameter.

Abstract: A substrate for mounting an electronic part and a method for producing the same, which allows a conductive pin to be inserted and secured in a through hole without exerting any damage thereto. The substrate for mounting an electronic part is formed of a through hole piercing an insulating substrate and a conductive pin with its head inserted into the through hole. The head of the conductive pin is provided with a plurality of projections to its side wall, each projecting radially in 4 or more directions. Those projections form a plurality of pairs, each of which is extending in an opposite direction from an axial center of the head. Those projection pairs include a primary projection pair having a largest length and a secondary projection pair having a second largest length. The length of the primary projection pair is equal to or more than an inside diameter of the through hole. The length of the secondary projection pair is less than the inside diameter of the through hole.

Abstract: Methods of filling apertures, for example, through holes, in substrates are provided. The methods utilize a dielectric film, preferably a photoimageable dielectric film, which is employed to fill the apertures and to form a dielectric film disposed above the substrate at the same time. As a result, the aperture fill material is the same as, and indeed continuous with, the dielectric film which is disposed on the substrate. The method employs the following steps: providing a substrate having apertures; providing a dielectric film disposed on the substrate covering the apertures, reflowing the dielectric film to flow into the apertures and to form a dielectric film adherent to the substrate, to provide a continuous dielectric extending from the dielectric film into the apertures. In certain embodiments, after filling, additional apertures, such as vias, are photoimaged in the dielectric film. Preferably the vias are then metallized, and circuitry formed atop the dielectric film.

Abstract: The present invention relates generally to a new method and apparatus to enable high yielding double sided and/or multipass screening in the manufacture of multilayer ceramic packages. Also, the present invention enables the screened features to be buried partially or fully with flat surface being available for high yielding post-sinter operations.

Abstract: A novel inductor termed a suspended printed inductor (SPI) and an LC-type printed filter constructed using the suspended printed inductor is disclosed. The LC-type suspended printed filter is formed over any suitable substrate material, such as a dielectric substrate, with greatly reduced effects on filter performance due to the characteristics of the material. SPIs are characterized by the absence of a ground plane. A ground plane may physically still exist but it is located at a sufficient distance form the printed circuit board such that the distance can be considered virtual infinity from an RF circuit perspective. A number of different types of inductors can be fashioned as a suspended printed type inductor, including serpentine line inductors or transmission line inductors. The suspended printed inductor can be utilized to construct numerous types of filters such as low pass, high pass, band pass, band stop or any combination thereof.

Abstract: A printed circuit assembly and method of making the same facilitates the attachment of high density modules onto a printed circuit board. In one embodiment, the high density modules are attached to the printed circuit board using an adhesive having a conductive material disposed within at least one via. In an alternate embodiment, an adhesive layer including a plurality of non-conductive "gauge particles" disposed within a non-conductive adhesive is used to attach the module to the printed circuit board. When the adhesive layer is disposed between a module and a printed circuit, individual gauge particles are interposed or sandwiched at various points between the layers such that the diameters of the particles control the layer separation throughout overlapping areas of thereof, thereby permitting careful control over layer separation.

Abstract: Connecting pads in pad rows in a signal layer are connected to another signal layer through a plurality of through hole rows each including a plurality of plated through holes that extend through a power source layer. Each of the through hole rows includes a plurality of through holes arranged side by side between each two adjacent pad rows corresponding thereto. These plated through holes each face the space between each two adjacent connecting pads in each corresponding pad row, and are arranged at intervals about twice as long as the intervals between the connecting pads. Each two adjacent through hole rows are located with an offset not smaller than the diameter of each pad in the longitudinal direction of the rows, and the power source layer includes a plurality of clear regions that are cleared of a conductor and penetrated individually by the through holes.

Abstract: An apparatus and method for surface-mounting ball grid array integrated circuit (IC) devices to printed circuit boards. A thin single- or multi-layer sheet of nonconductive material having a plurality of apertures corresponding to the leads of the IC device to be mounted is interposed between the ball grid array and the circuit board prior to solder processing to facilitate solder application, device alignment, and solder retention. An assembly guide is located on the top surface of the aid to assist in the orientation and placement of the IC device during assembly. In a further aspect, the disclosed assembly aid helps compensate for non-planarity in the IC device array or circuit board, and maintains a minimum standoff distance between the IC package and the circuit board to preclude undue solder joint deformation. The assembly aid also allows for reworking of the surface mount by facilitating localized placement of the solder prior to reflow processing without masking or other additional processing steps.

Abstract: A method of making a circuitized substrate such as a printed circuit board having at least one hole therein which comprises the steps of providing a layer of dielectric, forming at least one (and preferably several) holes therein, positioning a thin layer of support material atop the dielectric layer and over the hole(s), positioning a quantity of fill material on the thin layer of support material (preferably before positioning the thin layer on the dielectric) and thereafter applying a predetermined force sufficient to cause the thin support layer to rupture or otherwise deform (including melting from heat application thereto) such that the fill material is forcibly driven into the accommodating hole(s). Subsequent steps can include forming a layer of circuitry on the substrate's external surface and over the filled holes such that an electrical component such as a ball grid array (BGA), semiconductor chip, etc. may be directly positioned on and/or over the hole(s).

Abstract: A conductive paste composition, which is superior in electrical connection reliability and has properties required for a via-filling conductive paste composition is disclosed. The via-filling conductive paste composition contains a solvent in an amount of not more than 5 parts by weight per 100 parts by weight of the total amount of components A to D:A: 86 to 95 parts by weight of silver-coated copper particles made by coating surfaces of copper particles having an average particle diameter of 1 to 10 .mu.m with silver, a proportion of silver to the total amount of copper particles and coated silver being from 0.5 to 20% by weight,B: 2 to 8 parts by weight of a liquid epoxy resin having two or more epoxy groups,C: 2 to 8 parts by weight of a resol-type phenol resin, andD: 0.5 to 5 parts by weight of a curing agent for an epoxy resin, wherein the composition has a viscosity not more than 1000 Pa.multidot.s.

Abstract: A multi-layered circuit substrate and a manufacturing method thereof comprising the steps of coating the upper surface of a substrate with a photosensitive insulating layer; exposing and developing the photosensitive insulating layer to form a photosensitive insulating layer of predetermined pattern and pattern spaces; forming a conductive layer by printing a conductive ink in the pattern spaces; and forming a plurality of layers by performing the previous steps, each layer comprising a photosensitive insulating layer of predetermined pattern and pattern spaces and a conductive layer formed in the pattern spaces.

Abstract: Pads which are attached to a high density printed circuit board (PCB) having a plurality of through-holes opening on the top surface. A plurality of pads are formed on a carrier sheet so that each of the pads have a copper layer proximate to the carrier sheet and a joining metal layer formed on top of said copper layer. The plurality of pads are positioned on the carrier sheet so that they are aligned with the through-hole pattern on the top surface of the PCB, the pads bing laminated to the through-holes on the top surface using the joining metal, and the carrier sheet being separated from the plurality of pads that are joined to the through-holes so that the copper layer is exposed. The pads may possess a variety of shapes such as disk-shaped, elongated, or rectangular, and can cover one or multiple through-holes. An electrical component may be soldered to the pad.

Abstract: A number of non-circular vias are defined in a printed wiring board layer. The vias are preferably elliptical, with their long dimensions oriented at an angle to the primary axes of the via or grid array. By providing elongated, non-circular vias, it is possible to decrease the pitch of the via array, or provide improved routing of escape traces.

Abstract: A substrate for mounting an electronic part and a method for producing the same, which allows a conductive pin to be inserted and secured in a through hole without exerting any damage thereto. The substrate for mounting an electronic part is formed of a through hole piercing an insulating substrate and a conductive pin with its head inserted into the through hole. The head of the conductive pin is provided with a plurality of projections to its side wall, each projecting radially in 4 or more directions. Those projections form a plurality of pairs, each of which is extending in an opposite direction from an axial center of the head. Those projection pairs include a primary projection pair having a largest length and a secondary projection pair having a second largest length. The length of the primary projection pair is equal to or more than an inside diameter of the through hole.

Abstract: A conductive paste compound for via hole filling includes a conductive filler at 80 to 92 weight percent with an average particle size of from 0.5 to 20 .mu.m and specific surface of from 0.1 to 1.5 m.sup.2 /g, a liquid epoxy resin at 4.5 to 20 weight percent containing 2 or more epoxy groups with room temperature viscosity of 15 Pa.sec or less, and a hardener at 0.5 to 5 weight percent, wherein the viscosity is 2,000 Pa.sec or less and the volatile amount is 2.0 weight percent or less. A filling paste and a printed circuit board with use thereof are provided which can conduct an inner-via-hole connection between electrode layers without using a through-hole plating technique.The conductive paste comprises a metallic particle such as copper, an epoxy resin, a hardener, and if necessary, a dispersant. The paste having low viscosity and low volatility under high shear is used to fill holes disposed in a laminated substrate.

Abstract: Multiple vias are produced coaxially or in axis parallel alignment in a first or primary through-hole in a printed circuit board, chip carrier or like electrical device by producing a primary metallized through hole or via which is then filled or coated with a dielectric material which is also placed on both surfaces of the device at the ends of the via. The dielectric material inside the via can then be provided with at least one coaxial through-hole or multiple axis parallel through holes which can be metallized to form conductive paths between the surfaces of the device. Portions of the dielectric surface layer can be removed to expose contacts to the inner metallized via. Successive coaxial vias can be made in any number by the method of the invention. In addition electrical signal paths can be isolated within voltage or ground co-axial conductors.

Abstract: In accordance with the present invention, there are provided novel vertically interconnected assemblies and compositions useful therefore. Invention assemblies comprise substrate boards with multiple layer electronic assemblies. The multiple layers comprise individual layers of circuitry separated and adhered by dielectric materials selectively coated and/or filled with a transient liquid phase sintered (TLPS) material. The TLPS is formulated to be electrically conductive, and thereby serves to convey current between the layers of circuitry. In addition, the TLPS is easily workable so that it is amenable to automated, stepwise construction of multilayer circuitry without the need for labor intensive drilling and filling of conductive vias.

Abstract: A printed circuit board capable of suppressing radiation noise efficiently includes a first conductive layer where a plurality of power lines are provided at predetermined spacing along one direction, a second conductive layer where a plurality of power lines are provided at predetermined spacing along a direction orthogonal to the one direction, and a plurality of plated through holes for connecting the power lines on the first conductive layer and the power lines on the second conductive layer at the overlapping points of those lines. The power lines contain thin lines and thick lines spaced between a plurality of the thin lines. The predetermined spacing is determined based on a rising time or falling time of the output signal of the IC to be mounted on the circuit board.

Abstract: The invention relates to an integrated circuit device comprising (i) a substrate, (ii) metallic circuit lines positioned on the substrate, and (iii) a porous dielectric material positioned on the circuit lines. The dielectric material comprises the reaction product of an organic polysilica and polyamic ester preferably terminated with an alkoxysilyl alkyl group.

Abstract: A ball grid array (BGA) integrated circuit package which has a plurality of vias connected to a plurality of solder pads located on a bottom surface of a package substrate. Each via has a portion located within a solder pad to increase the routing space of the substrate, and a portion located outside the solder pad to allow outgassing from the via. The bottom surface also has a solder mask which covers the vias and contains a number of holes that expose the solder pads. The holes allow solder balls to be attached to the solder pads. The solder balls can be reflowed to attach the package to a printed circuit board.

Abstract: A flip chip is soldered to an array of flexible pillars of compliant dielectric material on a circuit board. Each pillar has an electrically conductive core electrically coupled to the circuit board. The pillars absorb movement due to differences in the coefficient of thermal expansion of the chip and board, and hence reduce the possibility of fatigue failure of the solder joint. The pillars are manufactured by forming a layer of compliant dielectric material on the circuit board, forming blind holes in the layer, filling the holes with electrically conductive material overlapping the edges of the holes, and then laser ablating to remove the compliant dielectric material except where protected by the electrically conductive material.

Abstract: A method and structure for routing electrically conductive interconnect paths through a printed circuit board. The printed circuit board includes a plurality of insulating layers and conductive layers, including at least one electrically conductive voltage supply layer for receiving a first supply voltage. A plurality of voltage supply pad patterns are located at the upper surface of the printed circuit board. Each voltage supply pad pattern includes two or more electrically conductive pads which are coupled by one or more electrically conductive traces. Electrically conductive via plugs extend through the printed circuit board to connect the voltage supply layer to the voltage supply pad patterns. Each via plug is connected to one corresponding voltage supply pad pattern, thereby allowing each via plug to provide the first supply voltage to a plurality of pads at the upper surface of the printed circuit board.

Abstract: A method of constructing a printed circuit board module and the module which comprises providing a substrate core having a first aperture extending therethrough and a pair of printed circuit boards, each board having at least one electrically conductive layer, secured to the substrate core and having a second aperture therethrough aligned with the first aperture. An electrically conductive member having an electrically insulating member is disposed around the electrically conductive member. The electrically conductive member having an electrically insulating member disposed therearound is positioned so that the electrically insulating member is disposed in the first aperture and the electrically conductive member extends into the second aperture of each of the printed circuit boards. The printed circuit boards are secured to the substrate core to lock the electrically insulating member in the first aperture.

Abstract: A three dimensional packaging architecture for ultimate high performance computers and methods for fabricating thereof are described. The package allows very dense packaging of multiple integrated circuit chips for minimum communication distances and maximum clock speeds of the computer. The packaging structure is formed from a plurality of subassemblies. Each subassembly is formed from a substrate which has on at least one side thereof at least one integrated circuit device. Between adjacent subassemblies there is disposed a second substrate. There are electrical interconnection means to electrically interconnect contact locations on the subassembly to contact locations on the second substrate. The electrical interconnection means can be solder mounds, wire bonds and the like. The first substrate provides electrical signal intercommunication between the electronic devices and each subassembly. The second substrate provides ground and power distribution to the plurality of subassemblies.

Abstract: A ground connecting pattern of the printed circuit board is separated by forming a spiral circuit pattern element onto a printed circuit board. The separated ground connecting patterns are electrically connected by an electric part, thereby suppressing radiation noises of the printed circuit board.

Abstract: A conductive plug is formed in drilled-through vias of a printed circuit board of a polymer ink composition by a method of flooding the vias of a printed circuit board having parchment paper attached to an underside while the printed circuit board is on a vacuum table to form a first layer of the conductive plug within the vias. A second layer of the conductive plug within the via is formed by placing a stencil over the circuit board and flooding the holes of the stencil in order to form a second layer of the conductive plug within the vias of the printed circuit board.

Abstract: There are provided conductive bumps arranged at predetermined positions penetrated through an insulating layer during a press integration stage to ensure electrical and thermal conductivities between a wiring pattern and a conductive metal as well as electrical connections between the wiring patterns. More specifically, the sharp tip of the conductive bump is subjected to plastic deformation to form the interconnections between the wiring patterns or between the wiring pattern and the conductive metal. Also provided is a method of manufacturing a printed wiring board. A synthetic resin sheet is sandwiched by the surface on which conductive bumps are formed into a laminate. The laminate is heated until the resin component of the synthetic resin sheet in a plastic state or up to a temperature not lower than the glass transition temperature of that resin. At that time, the conductive bumps are forced against the synthetic resin sheet and are penetrated therethrough.

Abstract: A shielded printed wiring board is disclosed which provides electrical and magnetic isolation for the signal layers located thereon. The printed wiring board includes a signal layer laminated between two non-conductive dielectric layers. The bottom side of the printed wiring board has a conductive layer coated thereon. Grooves are routed through the printed circuit board on both sides of each signal layer extending from the top layer partially through to the conductive layer. Conductive metallic coatings are then provided to coat the board and thereby encapsulate the signal layer in a ground envelope, separated by a controlled thickness dielectric. In an alternate embodiment, a plurality of layers are laminated one on top of the other to provide a multilayer printed wiring board.

Abstract: A circuit board has holes extending therethrough, and a solder layer disposed on a first side of the board. Terminals have been pushed through respective holes and into contact with the solder layer. The terminals have been welded to the first side of the circuit board in a fluxless manner by an irradiated energy beam.

Abstract: A cover layer of a flexible printed circuit includes a first hole and a plurality of openings. The first hole has substantially the same diameter as that of a positioning piece of an inspection machine. A distance between the first hole and each of the openings is predetermined. After the cover layer is adhered to the base member, a second hole is formed on the base member inside the first hole. A diameter of the second hole is smaller than that of the first hole. At the time of a continuity test, the second hole is deformed by a insertion of the portioning piece, so that the positioning piece is inserted into the first hole. As a result, the flexible printed circuit is positioned on the basis of the first hole.

Abstract: A unique general-purpose circuit board and a unique burning jig implement a wiring pattern for the trial manufacture of a new electronic circuit. The circuit board is implemented as an insulative plate on which horizontal and vertical parallel conductive lines are provided, and in which through holes are formed at the junctions of the lines. Each through hole is surrounded by four conductive portions insulated from each other and each being connected to a particular conductive line. The burning jig has a flat base and burning pins studded on the base and each corresponding to one of the through holes. Each burning pin has four metal pieces at one end thereof. The four metal pieces are insulated from each other and respectively correspond to the four conductive portions surrounding a single through hole.

Abstract: A multilevel interconnect structure for use in a semiconductor device includes a lower metal wiring having an aluminum or aluminum alloy film and a high melting point metal or high melting point metal alloy film. An interlayer insulating film is deposited on the lower metal wiring and a via hole is formed in the interlayer insulating film. A plug made of aluminum or aluminum alloy is formed in the via hole. An upper metal wiring has an aluminum or aluminum alloy film and a high melting point metal or high melting point metal alloy film. The plug directly contacts the aluminum or aluminum alloy film of at least one of the lower and upper metal wirings to decrease the via resistance without reducing the electromigration reliability.

Abstract: An electrical device is provided having a conductive coating or layer chemically grafted to a support substrate to produce a durable, conductive surface permanently attached to the underlying substrate material. The grafted layer can be embodied in an electrical contact, and can also be embodied as electrical traces and contact areas of circuit boards and electrical and electronic devices and components. In another embodiment, the grafted layer can be provided in an RFI/EMI shield or ground plane.

Abstract: A supporting member or first synthetic resin sheet with conductive bumps disposed at predetermined positions are superposed on a second synthetic resin sheet under the condition that the resin component of the second synthetic resin sheet is plastic deformed or the temperature thereof exceeds a glass transition temperature so that the conductive bumps are pierced into the second synthetic resin sheet. In other words, the conductive bumps are pierced vertically into the second synthetic resin sheet so as to form through-type conducive lead portions exposed to the first (supporting substrate) and second synthetic resin sheets. The through-type conductive lead portions are used to electrically connect electric devices and circuit and to connect wiring pattern layers. The conductive bumps can be precisely and densely formed and disposed by printing method or plating method. The conductive bumps can be pushed and pierced into the second synthetic resin sheet.

Abstract: An apparatus is adapted to be secured in a substrate having at least one conductive path and at least one aperture therein. The apparatus includes a cap and a tubular shaft, connected to the cap and positioned in a first aperture of the substrate. The tubular shaft has an electrically conductive wall portion and perforations therethrough, with the electrically conductive wall portion being operatively connected to a first conductive path of the substrate, and the perforations are adapted to permit flowthrough of material. The material facilitates the securing of at least the tubular shaft to the substrate.

Abstract: An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad on the engaged circuit panel. Thus, when the circuit panels are compressed with the interposers, the contacts expand radially and wipe across the pads. The wiping action facilitates bonding of the contacts to the pads, as by conductive bonding material carried on the contacts themselves.

Abstract: A two-sided printed circuit board including a base having a first surface, a second surface substantially parallel to the first surface, and a plurality of through-holes formed in the base; a first conductive layer provided on the first surface of the base; a second conductive layer provided on the second surface of the base; and a conductive particle buried in each of the through-holes in a pressurized state for electrically connecting the first conductive layer and the second conductive layer.