Abstract: An assembly includes a first packaged device that contains a first image sensor having first fiducial marks thereon. On a portion of the first packaged device at a predetermined location relative to the first fiducial marks is adhesive, and a first connection body is fixed within the adhesive and registered at the predetermined location relative to the first fiducial marks. The first connection body is mated into the first counter hole formed in a plate at a predetermined location.

Abstract: A solid-state imaging device and a method for manufacturing the same are provided. The solid-state imaging device includes a structure that provides a high sensitivity and high resolution without variations in spectral sensitivity and without halation of colors, and prevents light from penetrating into an adjacent pixel portion. A plurality of photodiodes are formed inside a semiconductor substrate. A wiring layer includes a laminated structure of an insulating film and a wire and is formed on the semiconductor substrate. A plurality of color filters are formed individually in a manner corresponding to the plurality of photodiodes above the wiring layer. A planarized film and a microlens are sequentially laminated on each of the color filters. In the solid-state imaging device, each of the color filters has an refraction index higher than that of the planarized film and has, in a Z-axis direction, an upper surface in a concave shape.

Abstract: A semiconductor package including a substrate including an epoxy-based material, an image sensor chip mounted on the substrate, and an attaching part provided between the substrate and the image sensor chip may be provided. The attaching part may include a first attaching part, and a second attaching part provided around the first attaching part. The first attaching part may achieve high reliability of the semiconductor package in association with the second attaching part. The second attaching part may include a material having a low rigidity. Thus, it is possible to reduce or prevent warpage of the image sensor chip from occurring. Due to the presence of the second attaching part, a plane coverage ratio of the first attaching part relative to the image sensor chip can be reduced. Thus, the warpage of the image sensor chip can be reduced or prevented more effectively.

Abstract: A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template.

Abstract: A solid-state imaging apparatus including an insulating structural body having a through opening, a wiring part formed on a front surface of the structural body, a solid-state imaging element which is connected to the wiring part and also is attached to the structural body so as to close the through opening, a translucent member which is opposed to the solid-state imaging element and is attached to the structural body through an adhesive inside an adhesion region R so as to close the through opening, and a solder resist film with which at least a part of the front surface of the structural body is covered, and is characterized in that a region R0 in which the solder resist film is selectively removed is had in the adhesion region R and the removed region R0 is filled with the adhesive.

Abstract: A semiconductor device including a device substrate having a front side and a back side. The semiconductor device further includes an interconnect structure disposed on the front side of the device substrate, the interconnect structure having a n-number of metal layers. The semiconductor device also includes a bonding pad disposed on the back side of the device substrate, the bonding pad extending through the interconnect structure and directly contacting the nth metal layer of the n-number of metal layers.

Abstract: An image capturing apparatus having pixels is provided. Each pixel includes a photoelectric conversion unit including a charge accumulation region, an output unit configured to output a signal based on a potential of a node electrically connected to the charge accumulation region, and a connection unit configured to electrically connect a capacitance to the node. The charge accumulation region includes a first portion and a second portion. Charge is configured to be first accumulated in the first portion, and, after the first portion is saturated, be accumulated in the second portion. The output unit is configured to output a first signal based on the potential of the node before the capacitance is connected thereto, and, then a second signal based on the potential of the node after the capacitance is connected thereto.

Abstract: A radiation receiver has a semiconductor body including a first active region and a second active region, which are provided in each case for detecting radiation. The first active region and the second active region are spaced vertically from one another. A tunnel region is arranged between the first active region and the second active region. The tunnel region is connected electrically conductively with a land, which is provided between the first active region and the second active region for external electrical contacting of the semiconductor body. A method of producing a radiation receiver is additionally indicated.

Abstract: According to one embodiment, a solid-state imaging device includes a semiconductor layer including first and second regions, a pixel portion provided in the first region, electrodes provided in the second region and configured to penetrate the semiconductor layer, and a guard ring provided in the second region and configured to penetrate the semiconductor layer and electrically isolate the pixel portion from the electrodes. An upper surface of the semiconductor layer in the second region is lower than an upper surface of the semiconductor layer in the first region.

Abstract: An integrated circuit (IC) comprises a plurality of photovoltaic (PV) cells formed over a passivation layer of a target integrated circuit (TIC), wherein at least one PV cell of the plurality of PV cells is usable as a light sensing device; an interface to an energy storage unit; the TIC comprising at least: a control unit; and a switching circuit, the switching circuit coupled to the plurality of PV cells, the energy storage, and the control unit; wherein the control unit is configured to control at least the switching circuit to configure a connection scheme, wherein the connection scheme devises at least one first PV cell of the plurality of PV cells to connect to the energy storage and at least one second PV cell to connect to the control unit for light detection.

Abstract: A solid-state imaging device according to one embodiment includes a plurality of signal output units. Each of the plurality of signal output units includes a first input terminal electrode group that includes a plurality of terminal electrodes for inputting a reset signal, a hold signal, a horizontal start signal, and a horizontal clock signal and a first output terminal electrode that provides output signals. The solid-state imaging device further includes a second input terminal electrode group that includes a plurality of terminal electrodes for receiving the reset signal, the hold signal, the horizontal start signal, and the horizontal clock signal, a plurality of switches that switch an electrode group which is connected with integrating circuits, holding circuits, and a horizontal shift register between the first input terminal electrode group and the second input terminal electrode group, and a second output terminal electrode.

Abstract: A first substrate has a plurality of photoelectric conversion units arranged in two dimensions. A second substrate has a plurality of photoelectric conversion units arranged in two dimensions. A plurality of photoelectric conversion units are arranged in a region of the second substrate corresponding to a region of the first substrate where one photoelectric conversion unit is arranged. The imaging signals based on signal charges stored in the photoelectric conversion units and the light field signals based on signal charges stored in the photoelectric conversion units are read.

Abstract: Pixel electrodes have end portions inclined at inclination angles ?, where 30°???85°, relative to a substrate surface of a substrate. An organic layer disposed on the pixel electrodes is formed by vapor deposition using deposition beams that enter the substrate surface at incident angles ? smaller than 90°??max, where ?max is the maximum inclination angle among the inclination angles of the end portions of the pixel electrodes, under a deposition substrate temperature condition lower than the glass transition temperature of the organic layer.

Abstract: A solid-state imaging apparatus in which a first substrate, a second substrate electrically connected to the first substrate through a connector and circuit elements disposed in the first substrate and in the second substrate, and forming pixels, each of the pixels includes a photoelectric conversion element disposed in the first substrate and configured to generate a signal corresponding to an amount of incident light, and a signal holder disposed in the second substrate in correspondence with the photoelectric conversion element and configured to hold an output signal corresponding to the signal generated by the corresponding photoelectric conversion element, and the signal holder is formed by laminating a capacitance element including a plurality of electrodes on a plurality of layers within the second substrate.

Abstract: A method of forming a pattern on a silicon layer of a substrate, to be processed, wherein a semiconductor device is formed at a front surface side of the substrate that is supported by a support substrate at the front surface side, includes an etching step of etching the substrate by plasma via a mask having a predetermined pattern formed at a back surface side of the silicon layer of the substrate; and a cleaning step of cleaning the substrate by plasma using cleaning gas obtained by mixing CF series gas and inert-gas, after the etching step.

Abstract: A solid-state imaging device is provided with a pixel region in which a plurality of pixels including photoelectric conversion films are arrayed and pixel isolation portions are interposed between the plurality of pixels, wherein the photoelectric conversion film is a chalcopyrite-structure compound semiconductor composed of a copper-aluminum-gallium-indium-sulfur-selenium based mixed crystal or a copper-aluminum-gallium-indium-zinc-sulfur-selenium based mixed crystal and is disposed on a silicon substrate in such a way as to lattice-match the silicon substrate concerned, and the pixel isolation portion is formed from a compound semiconductor subjected to doping concentration control or composition control in such a way as to become a potential barrier between the photoelectric conversion films disposed in accordance with the plurality of pixels.

Abstract: Pixels, imagers and related fabrication methods are described. The described methods result in cross-talk reduction in imagers and related devices by generating depletion regions. The devices can also be used with electronic circuits for imaging applications.

Abstract: Methods of forming isolation structures are disclosed. A method of forming isolation structures for an image sensor array of one aspect may include forming a dielectric layer over a semiconductor substrate. Narrow, tall dielectric isolation structures may be formed from the dielectric layer. The narrow, tall dielectric isolation structures may have a width that is no more than 0.3 micrometers and a height that is at least 1.5 micrometers. A semiconductor material may be epitaxially grown around the narrow, tall dielectric isolation structures. Other methods and apparatus are also disclosed.

Abstract: A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.

Abstract: An aggregation of semiconductor devices, comprising: a first layer comprising a first surface and a second surface; a second layer comprising a first region and a second region; and a plurality of semiconductor devices disposed between the first layer and the second region wherein a shape of the second region comprises a curve and a mark.

Abstract: A solid-state imaging device with a layout in which one sharing unit includes an array of photodiodes of 2 pixels by 4×n pixels (where, n is a positive integer), respectively, in horizontal and vertical directions.

Abstract: Demultiplexing systems and methods are discussed which may be small and accurate without moving parts. In some cases, demultiplexing embodiments may include optical filter cavities that include filter baffles and support baffles which may be configured to minimize stray light signal detection and crosstalk. Some of the demultiplexing assembly embodiments may also be configured to efficiently detect U.V. light signals and at least partially compensate for variations in detector responsivity as a function of light signal wavelength.

Abstract: An object is to prevent a reduction of definition (or resolution) (a peripheral blur) caused when reflected light enters a photoelectric conversion element arranged at a periphery of a photoelectric conversion element arranged at a predetermined address. A semiconductor device is manufactured through the steps of: forming a structure having a first light-transmitting substrate, a plurality of photoelectric conversion elements over the first light-transmitting substrate, a second light-transmitting substrate provided so as to face the plurality of photoelectric conversion elements, a sealant arranged so as to bond the first light-transmitting substrate and the second light-transmitting substrate and surround the plurality of photoelectric conversion elements; and thinning the first light-transmitting substrate by wet etching.

Abstract: A device includes a metal pad at a surface of an image sensor chip, wherein the image sensor chip includes an image sensor. A stud bump is disposed over, and electrically connected to, the metal pad. The stud bump includes a bump region, and a tail region connected to the bump region. The tail region includes a metal wire portion substantially perpendicular to a top surface of the metal pad. The tail region is short enough to support itself against gravity.

Abstract: A semiconductor element layer has a pixel region in which a plurality of photodiodes are provided and a peripheral circuit region in which a peripheral circuit for processing the device is provided, a power supply line to supply an electric power to the peripheral circuit, provided at a first side of the semiconductor element layer in the peripheral circuit region, a first wiring layer to supply the electric power to the power supply line, provided at a second side of the semiconductor element layer in the peripheral circuit region, and a plurality of first through-electrodes, provided in the peripheral circuit region and passing through the semiconductor element layer between the first side and the second side. At least a part of the first through-electrodes electrically connect between the power supply line and the first wiring layer.

Abstract: A flexible substrate for a display device comprises a polymer resin, an inorganic fiber material, and an antistatic agent, and has a surface resistivity of less than 1011?. A display device includes the flexible substrate.

Abstract: In the present invention, one or more inventive designs and techniques allow formation of high speed complementary metal oxide semiconductor (CMOS) process compatible tunneling devices that are formed on low dielectric loss sheet-substrates (such as silicon or germanium for infrared or quartz and sapphire for visible or near infrared) having the first and the second smooth planar surfaces and an intermediate surface in the form of a hole, or slit, or a side edge, which extends between and connects the first and second surfaces, so that deposited from opposite sides of the sheet-substrate the first metal layer followed by its oxidation or nanometer thickness tunneling dielectric coating and the second metal layer have an overlapped coupled area within the intermediate surface, thus forming a non-planar metal-insulator-metal (MIM) tunneling junction of low capacitance and high cut-off frequency, which is capable to operate at room temperature at terahertz, infrared, and even optical frequencies.

Abstract: A first semiconductor substrate 1 and a second semiconductor substrate 2 are different in material, and therefore have sensitivities to incident light of mutually different wavelength bands. Respective photodiodes of photodiode arrays are connected to amplifiers of the first semiconductor substrate 1. According to this method, the second semiconductor substrate 2 is separated from the wafer by etching the second semiconductor substrate 2 and then dicing a deepest portion of the etched groove. The density of crystal defects in a side surface produced by etching is smaller than the density of crystal defects in a side surface produced by dicing. Because a photodiode located in an end portion of the second semiconductor substrate 2 does not need to be removed, a reduction in the number of photodiodes can be suppressed.

Abstract: A backside illuminated multi junction solar cell module includes a substrate, multiple multi junction solar cells, and a cell interconnection that provides a series connection between at least two of the multi junction solar cells. The substrate may include a material that is substantially transparent to solar radiation. Each multi junction solar cell includes a first active cell, grown over the substrate, for absorbing a first portion of the solar radiation for conversion into electrical energy and a second active cell, grown over the first active cell, for absorbing a second portion of the solar radiation for conversion into electrical energy. At least one of the first and second active cells includes a nitride.

Abstract: An encapsulation method of an environmental sensitive element is provided. An environmental sensitive element and a first rib are formed on a first substrate. The first rib surrounds the environmentally sensitive element. A getter layer is formed on the environmental sensitive element. A first encapsulation layer is formed to encapsulate the getter layer and the first rib. The first barrier layer is formed to encapsulate the first encapsulation layer located on the first rib. The first rib, a portion of the first encapsulation layer located on the first rib and the first barrier layer form a barrier structure. A second substrate is provided on the first substrate and a filling layer is formed between the first substrate and the second substrate. The second substrate is bonded to the first substrate by the filling layer. The filling layer encapsulates the environmental sensitive element, the first encapsulation layer and the barrier structure.

Abstract: An optoelectronic device for detecting electromagnetic radiation and including: a body of semiconductor material delimited by a main surface and including a first region and a second region that form a junction; and a recess formed in the body, which extends from the main surface and is delimited at least by a first wall, the first wall being arranged transverse to the main surface. The junction faces the first wall.

Abstract: Disclosed herein is a solid-state image pickup device of a type wherein a pixel is configured to include a sensor unit capable of photoelectric conversion, the image pickup device including: a semiconductor substrate; a charge storage region of a first conduction type, which is formed in the semiconductor substrate and constitutes a sensor unit; a charge storage sub-region made of an impurity region of the first conduction type, which is formed, in plural layers, in the semiconductor substrate below the charge storage region serving as a main charge storage region and wherein at least one or more of the plural layers are formed entirely across a pixel; and a device isolation region that is formed in the semiconductor substrate, isolates pixels from one another, and is made of an impurity region of a second conduction type.

Abstract: Embodiments relate to integrated circuit (IC) sensors and sensing systems and methods. In an embodiment, an IC sensor device includes at least one sensing element; a framing element disposed around the at least one sensing element at a wafer-level; and a package having at least one port predefined at the wafer-level by the framing element, the at least one port configured to expose at least a portion of the at least one sensing element to an ambient environment.

Abstract: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first substrate, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a plurality of logic circuits formed in a second substrate, wherein the second substrate is stacked on the first substrate and the logic circuit are coupled to the first transistor through a plurality of bonding pads.

Abstract: A photodiode structure having an illuminated front-side surface and a back-side surface includes a front-side doped layer having a first conductivity type, a back-side doped layer having the first conductivity type, a front-side active cell region made sensitive to light by the action of at least one plug region formed in the front-side doped layer having a second conductivity type, and a front-side inactive cell region substantially insensitive to light, wherein the first and second conductivity types are opposite conductivity types.

Abstract: Disclosed herein is a solid-state imaging element including: a plurality of pixels including a photoelectric conversion section; and a nano-carbon laminated film disposed on a side of a light receiving surface of the photoelectric conversion section and formed with a plurality of nano-carbon layers, transmittance of light and a wavelength region of transmissible light changing in the nano-carbon laminated film according to a voltage applied to the nano-carbon laminated film.

Abstract: An integrated circuit structure or a back side illumination image sensor is provided, wherein the integrated circuit structure includes a bond pad and a metal structure located in a dielectric layer, wherein the bond pad and the metal structure have different materials, and the back side illumination image sensor includes an image sensor unit and an interconnect structure respectively located on both sides of a bond pad. Moreover, an integrated circuit process forming said integrated circuit structure or back side illumination image sensor is also provided.

Abstract: A method for manufacturing a solid-state imaging device includes: forming pixels that receive incident light in a pixel array area of a substrate; forming pad electrodes in a peripheral area located around the pixel array area of the substrate; forming a carbon-based inorganic film on an upper surface of each of the pad electrodes including a connection surface electrically connected to an external component; forming a coated film that covers upper surfaces of the carbon-based inorganic films; and forming an opening above the connection surface of each of the pad electrodes to expose the connection surface.

Abstract: An object of the present invention is to provide a simple process to manufacture a wiring connecting photoelectric cells in a photoelectric conversion device. Another object of this invention is to prevent defective rupture from occurring in the said wiring. The photoelectric conversion device comprises a first and a second photoelectric conversion cells comprising respectively a first and a second single crystal semiconductor layers. First electrodes are provided on the downwards surfaces of the first and second photoelectric conversion cells, and second electrodes are provided on their upwards surfaces. The first and second photoelectric conversion cells are fixed onto a support substrate side by side. The second single crystal semiconductor layer has a through hole which reaches the first electrode. The second electrode of the first photoelectric conversion cell is extended to the through hole to be electrically connected to the first electrode of the second photoelectric conversion cell.

Abstract: A solid-state imaging device in which a pixel circuit formed on the first surface side of a semiconductor substrate is shared by a plurality of light reception regions and second surface side of the semiconductor substrate is the light incident side of the light reception regions. The second surface side regions of the light reception regions are arranged at approximately even intervals and the first surface side regions of the light reception regions e are arranged at uneven intervals. Respective second surface side regions and first surface side regions are joined in the semiconductor substrate so that the light reception regions extend from the second surface side to the first surface side of the semiconductor substrate.

Abstract: A heterogeneous stack structure is provided which includes one or more optical signal-based chips and multiple electrical signal-based chips. The optical chip(s) and the electrical chip(s) are different layers of the stack structure, and the optical chip(s) includes optical signal paths extending at least partially laterally within the optical chip(s). Electrical signal paths are provided extending between and coupling the optical chip(s) and the electrical chips. The electrical signal paths include one or more through substrate vias (TSVs) through one or more electrical chips of the multiple electrical chips in the stack structure. In one embodiment, the optical chip(s) is configured laterally to locally distribute, via one or more paths of the electrical signal paths, a timing reference signal for one or more electrical chips in the stack. Conversion between optical and electrical signals within the stack structure occurs within the optical chip(s).

Abstract: A solid-state imaging device is provided. The solid-state imaging device includes an imaging region having a plurality of pixels arranged in a two-dimensional array, in which the imaging region includes an effective pixel and a black reference pixel; and a shape of a floating diffusion portion in the effective pixel is different from that of a floating diffusion portion in the black reference pixel.

Abstract: Detectors based on such Ge(Sn) alloys of the formula Ge1-xSnx (e.g., 0<x<0.01) have increased responsivity while keeping alloy scattering to a minimum. Such small amounts of Sn are also useful for improving the performance of the recently demonstrated Ge-on-Si laser structures, since the addition of Sn monotonically reduces the separation between the direct and indirect minima in the conduction band of Ge. Thus, provided herein are Ge(Sn) alloys of the formula Ge1xSnx, wherein x is less than 0.01, wherein the alloy is optionally n-doped or p-doped; and assemblies and photodiodes comprising the same, and methods for their formation.

Abstract: It is an object of the present invention to provide a technique to manufacture a highly reliable display device at a low cost with high yield. A display device according to the present invention includes a semiconductor layer including an impurity region of one conductivity type; a gate insulating layer, a gate electrode layer, and a wiring layer in contact with the impurity region of one conductivity type, which are provided over the semiconductor layer; a conductive layer which is formed over the gate insulating layer and in contact with the wiring layer; a first electrode layer in contact with the conductive layer; an electroluminescent layer provided over the first electrode layer; and a second electrode layer, where the wiring layer is electrically connected to the first electrode layer with the conductive layer interposed therebetween.

Abstract: A device includes a Backside Illumination (BSI) image sensor chip, which includes an image sensor disposed on a front side of a first semiconductor substrate, and a first interconnect structure including a plurality of metal layers on the front side of the first semiconductor substrate. A device chip is bonded to the image sensor chip. The device chip includes an active device on a front side of a second semiconductor substrate, and a second interconnect structure including a plurality of metal layers on the front side of the second semiconductor substrate. A first via penetrates through the BSI image sensor chip to connect to a first metal pad in the second interconnect structure. A second via penetrates through a dielectric layer in the first interconnect structure to connect to a second metal pad in the first interconnect structure, wherein the first via and the second via are electrically connected.

Abstract: Systems and methods are provided for obtaining adaptive exposure control and dynamic range extension of image sensors. In some embodiments, an image sensor of an image system can include a pixel array with one or more clear pixels. The image system can separately control the amount of time that pixels in different lines of the pixel array are exposed to light. As a result, the image system can adjust the exposure times to prevent over-saturation of the clear pixels, while also allowing color pixels of the pixel array to be exposed to light for a longer period of time. In some embodiments, the dynamic range of the image system can be extended through a reconstruction and interpolation process. For example, a signal reconstruction module can extend the dynamic range of one or more green pixels by combining signals associated with green pixels in different lines of the pixel array.

Abstract: A combined diode, lead assembly incorporating two expansion joints. The combined diode, lead assembly incorporating two expansion joints includes a diode having a first diode terminal and a second diode terminal, a first conductor and a second conductor. The first conductor includes a first terminal that is electrically coupled to the diode at the first diode terminal and a second terminal that is configured as a first expansion joint, which is configured to electrically couple to a first interconnecting-conductor and is configured to reduce a stress applied to the diode by the first conductor. The second conductor includes a first terminal that is electrically coupled to the diode at the second diode terminal and a second terminal that is configured as a second expansion joint, which is configured to electrically couple to a second interconnecting-conductor and is configured to reduce a stress applied to the diode by the second conductor.

Abstract: An imaging device includes: an optical sensor including a light receiving unit capable of forming an object image; a seal material for protecting the light receiving unit of the optical sensor; an intermediate layer formed at least between the light receiving unit and an opposite surface of the seal material facing the light receiving unit; and a control film arranged between the intermediate layer and the opposite surface of the seal material, wherein, in the control film, a cutoff wavelength is shifted to a shortwave side in accordance with an incident angle of light which is obliquely incident on the film.

Abstract: A photoelectric conversion apparatus of the present invention includes a first semiconductor region functioning as a barrier against signal charges between a first and a second photoelectric conversion element, and a second semiconductor region that has a width narrower than that of the first semiconductor region and functions as a barrier against signal charges between a first and the third photoelectric conversion element. A region with a low barrier is provided at least a part between the first and the second photoelectric conversion element.

Abstract: An integrated plasmonic sensing device is monolithically integrated and provides marker-free detection (eliminating the need to use fluorescent or absorbing markers) and in-situ monitoring of conditions at each detection region. The integrated plasmonic sensing device includes a plasmonic backplane disposed on a monolithically integrated image sensor. One or more plasmonic scattering regions and one or more plasmonic via regions laterally offset from the plasmonic scattering regions are provided in the plasmonic sensing device. Guided plasmonic modes mediate power transfer through the plasmonic backplane to one or more underlying image sensor pixels.