Matrix Or Array (e.g., Single Line Arrays) Patents (Class 257/443)
  • Publication number: 20130168727
    Abstract: An organosiloxane block copolymer includes 65 to 90 mol % of diorganosiloxane units having the formula R12SiO2/2 (I). These diorganosiloxane units are arranged in linear blocks which have an average of from 10 to 400 diorganosiloxane units per linear block. The organosiloxane block copolymer also includes 10 to 35 mol % of siloxane units that have the average formula R2x(OR3)ySiO(4-x-y)/2 (II). The siloxane units are arranged in nonlinear blocks having at least 2 siloxane units per nonlinear block wherein 0.5?x?1.5 and 0?y?1. In addition, each R1 is independently a C1 to C10 hydrocarbyl, each R2 is independently an aryl or C4 to C10 hydrocarbyl, at least 50 mol % of R2 are aryl, and each R3 is independently R1 or H. Moreover, the organosiloxane block copolymer has a light transmittance of at least 95%.
    Type: Application
    Filed: September 21, 2011
    Publication date: July 4, 2013
    Applicant: Dow Corning Corporation
    Inventors: John Horstman, Ann Norris, Steven Swier
  • Publication number: 20130168795
    Abstract: An apparatus including a plurality of sensor elements, configured in an arrangement having a repeating pattern of sensor elements, the plurality of sensor elements including first monochromatic sensor elements configured to sense visible light of a first color; second monochromatic sensor elements configured to sense visible light of a second color; and panchromatic sensor elements configured to sense visible light of at least the first color and the second color, wherein the majority of the plurality of sensor elements are panchromatic sensor elements.
    Type: Application
    Filed: July 13, 2010
    Publication date: July 4, 2013
    Applicant: Nokia Corporation
    Inventors: Eero Tuulos, Samu Koskinen
  • Publication number: 20130168794
    Abstract: A sensor array is integrated onto the same chip as core logic. The sensor array uses a first polysilicon and the core logic uses a second polysilicon. The first polysilicon is etched to provide a tapered profile edge in the interface between the sensor array and the core logic regions to avoid an excessive step. Amorphous carbon can be deposited over the interface region without formation of voids, thus providing for improved manufacturing yield and reliability.
    Type: Application
    Filed: January 2, 2012
    Publication date: July 4, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Chi Fu, Ching-Sen Kuo, Wen-Chen Lu, Chih-Yuan Chen
  • Patent number: 8476102
    Abstract: A method for manufacturing a solid state image pickup device including a first active region provided with a first conversion unit, a second active region provided with a second conversion unit, and a third active region adjoining the first and the second active regions with a field region therebetween and being provided with a pixel transistor, the method including the steps of ion-implanting first conductivity type impurity ions to form a semiconductor region serving as a potential barrier against the signal carriers at a predetermined depth in the third active region and ion-implanting second conductivity type impurity ions into the third active region with energy lower than the above-described ion-implantation energy.
    Type: Grant
    Filed: February 16, 2011
    Date of Patent: July 2, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hideaki Takada, Toru Koizumi, Yasuo Yamazaki, Tatsuya Ryoki
  • Publication number: 20130155283
    Abstract: An image sensor including a pixel array, each pixel including, in a substrate of a doped semiconductor material of a first conductivity type, a first doped region of a second conductivity type at the surface of the substrate; an insulating trench surrounding the first region; a second doped region of the first conductivity type, more heavily doped than the substrate, at the surface of the substrate and surrounding the trench; a third doped region of the second conductivity type, forming with the substrate a photodiode junction, extending in depth into the substrate under the first and second regions and being connected to the first region; and a fourth region, more lightly doped than the second and third regions, interposed between the second and third regions and in contact with the first region and/or with the third region.
    Type: Application
    Filed: December 10, 2012
    Publication date: June 20, 2013
    Applicants: STMicroelectronics (Crolles2) SAS, STMicroelectronics S.A.
    Inventors: STMicroelectronics S.A., STMicroelectronics (Crolles2) SAS
  • Publication number: 20130154046
    Abstract: An image sensor includes a plurality of unit pixels. Each unit pixel has a photo diode for sensing external light to generate photo charges. A transfer transistor is connected to the photo diode for storing the photo charges generated in the photo diode into a floating diffusion region when being turned-on. An amplification transistor amplifies the photo charges stored into the floating diffusion region. A select transistor, connected to the amplification transistor, performs a switching operation. An output line, extended in a column direction, outputs the photo charges in accordance with the switching operation of the select transistor. The photo diode may be formed in such a manner to share the output line with its adjacent photo diode in a horizontal direction, so that the photo charges generated in the photo diode and its adjacent photo diode are outputted through the output line.
    Type: Application
    Filed: August 20, 2012
    Publication date: June 20, 2013
    Applicant: Dongbu HiTek Co., Ltd.
    Inventor: So Eun PARK
  • Publication number: 20130153975
    Abstract: The invention provides a Silicon Photomultiplier (SiPM). The SiPM includes a plurality of microcells, a nonlinear element integrated in each one of the plurality of microcells, and a trigger line for outputting a summated current of the plurality of microcells, wherein the nonlinear element provides for a separated timing and energy signal.
    Type: Application
    Filed: August 12, 2011
    Publication date: June 20, 2013
    Applicant: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Debora Henseler, Meinrad Schienle
  • Publication number: 20130154047
    Abstract: A photoelectric conversion device includes a substrate, a plurality of photoelectric conversion cells formed on the main surface of the substrate, a current-collecting wiring formed on the plurality of photoelectric conversion cells, an output wiring connected to the current-collecting wiring, and a back-side protective member bonded to the plurality of photoelectric conversion cells via a sealing member in a manner such that the plurality of photoelectric conversion cells formed on the main surface of the substrate are interposed between the substrate and the back-side protective member via the sealing member. The current-collecting wiring and the output wiring are positioned such that the current-collecting wiring and the output wiring do not overlap with each other above the main surface of the substrate.
    Type: Application
    Filed: February 19, 2013
    Publication date: June 20, 2013
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: SANYO Electric Co., Ltd.
  • Patent number: 8461660
    Abstract: Techniques and mechanisms to improve potential well characteristics in a pixel cell. In an embodiment, a coupling portion of a pixel cell couples a reset transistor of the pixel cell to a floating diffusion node of the pixel cell, the reset transistor to reset a voltage of the floating diffusion node. In another embodiment, the pixel cell includes a shield line which extends athwart the coupling portion, where the shield line is to reduce a parasitic capacitance of the reset transistor to the floating diffusion node.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: June 11, 2013
    Assignee: Omnivision Technologies, Inc.
    Inventor: Sohei Manabe
  • Publication number: 20130140664
    Abstract: The present invention discloses a flip chip packaging structure which is applied to a process of a compact camera module (CCM), and the structure thereof comprises an image sensor component, at least one connection member, a circuit board and an insulating plate. The image sensor component is electrically connected with the circuit board via an electrical-conduction of the connection body. Hence, by disposing the insulating plate between the image sensor component and the circuit board, the present invention not only can provide a thermal insulating protection to the image sensor component but also use enough space to execute a surface mount technology (SMT), so as to simplify the flip chip process and to increase the yield of manufacture.
    Type: Application
    Filed: December 2, 2011
    Publication date: June 6, 2013
    Applicant: Cheng Uei Precision Industry Co., LTD.
    Inventors: JUI-HSIANG LO, Tsung-shih Lee
  • Publication number: 20130142211
    Abstract: A silicon-on-insulator wafer is provided. The silicon-on-insulator wafer includes a silicon substrate having optical vias formed therein. In addition, an optically transparent oxide layer is disposed on the silicon substrate and the optically transparent oxide layer is in contact with the optical vias. Then, a complementary metal-oxide-semiconductor layer is formed over the optically transparent oxide layer.
    Type: Application
    Filed: February 1, 2013
    Publication date: June 6, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: International Business Machines Corporation
  • Publication number: 20130140665
    Abstract: A solid state image pickup device which can prevent color mixture by using a layout of a capacitor region provided separately from a floating diffusion region and a camera using such a device are provided. A photodiode region is a rectangular region including a photodiode. A capacitor region includes a carrier holding unit and is arranged on one side of the rectangle of the photodiode region as a region having a side longer than the one side. In a MOS unit region, an output unit region including an output unit having a side longer than the other side which crosses the one side of the rectangle of the photodiode region is arranged on the other side. A gate region and the FD region are arranged between the photodiode region and the capacitor region.
    Type: Application
    Filed: January 29, 2013
    Publication date: June 6, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: CANON KABUSHIKI KAISHA
  • Publication number: 20130127004
    Abstract: An image sensor module includes a substrate, a circuit layer, a flip chip, an insulating layer, and a conducting layer. The substrate has at least one transparent area and defines a first surface and a second surface. The circuit layer is provided on the first surface of the substrate. The flip chip is connected to the circuit layer. The insulating layer substantially encases the flip chip and a part of the circuit layer, wherein the insulating layer has at least one groove at a lateral side of said insulating layer thereof each provided with a metal layer. The conducting layer is provided on a top surface of the insulating layer, wherein the conducting layer is electrically connected to the circuit layer via the metal layer.
    Type: Application
    Filed: June 1, 2012
    Publication date: May 23, 2013
    Applicant: TONG HSING ELECTRONIC INDUSTRIES, LTD.
    Inventor: Shao-Pin Ru
  • Patent number: 8445986
    Abstract: An image pickup apparatus is provided with plural light receiving areas arranged two-dimensionally, and a vertical scanning circuit comprising plural unit circuit stages arranged in the vertical direction and a horizontal scanning circuit comprising plural unit circuit stages arranged in the horizontal direction, for selecting and reading the plural light receiving areas in succession. The vertical and horizontal scanning circuits are arranged in spaces between the light receiving areas. A crossing area of the vertical and horizontal scanning circuits, in a space between the light receiving areas, is divided into two areas. A unit circuit of the horizontal scanning circuit is provided in one of the two areas. A unit circuit of the vertical scanning circuit is provided in the other of the two areas. In one embodiment, the unit circuits of the vertical scanning circuit and/or of the horizontal scanning circuit are arranged at a constant pitch.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: May 21, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tomoyuki Noda
  • Publication number: 20130119502
    Abstract: A semiconductor device formed on a substrate includes a first diode junction formation, a second diode junction formation, and at least one through-silicon-via (TSV), in which a cathode and an anode of the first diode are cross-connected to an anode and cathode of the second diode through the at least one TSV for achieving electrical robustness in through-silicon-via based integrated circuits, including photosensitive devices and circuits for signal processing applications.
    Type: Application
    Filed: November 16, 2011
    Publication date: May 16, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventors: Lejun HU, Srivatsan PARTHASARATHY, Michael COLN, Javier SALCEDO
  • Publication number: 20130119503
    Abstract: The substrate includes successively a first semiconductor layer having a first bandgap energy, a semiconductor buffer layer, a second semiconductor layer having a first bandgap energy different from the first bandgap energy. Two photodetectors sensitive to two different colors are formed respectively on the first and second semiconductor layers. A first biasing pad electrically connects the first semiconductor layer to a first biasing circuit. A second biasing pad electrically connects the second semiconductor layer to a second biasing circuit. The first biasing pad is devoid of electrical contact with the second semiconductor layer.
    Type: Application
    Filed: November 15, 2012
    Publication date: May 16, 2013
    Applicant: SOCIETE FRANCAISE DE DETECTEURS INFRAROUGES- SOFRADIR
    Inventor: Societe Francaise de Detecteurs Infrarouges - Sofradir
  • Patent number: 8441089
    Abstract: This bispectral detector comprises a plurality of unitary elements for detecting a first and a second electromagnetic radiation range, consisting of a stack of upper and lower semiconductor layers of a first conductivity type which are separated by an intermediate layer that forms a potential barrier between the upper and lower layers; and for each unitary detection element, two upper and lower semiconductor zones of a second conductivity type opposite to the first conductivity type, are arranged respectively so that they are in contact with the upper faces of the upper and lower layers so as to form PN junctions, the semiconductor zone being positioned, at least partially, in the bottom of an opening that passes through the upper and intermediate layers. The upper face of at least one of the upper and lower layers is entirely covered in a semiconductor layer of the second conductivity type.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: May 14, 2013
    Assignee: Commissariat a l′Energie Atomique et Aux Energies Alternatives
    Inventors: Olivier Gravrand, Jacques Baylet
  • Patent number: 8441104
    Abstract: A semiconductor device formed on a substrate includes a first diode junction formation, a second diode junction formation, and at least one through-silicon-via (TSV), in which a cathode and an anode of the first diode are cross-connected to an anode and cathode of the second diode through the at least one TSV for achieving electrical robustness in through-silicon-via based integrated circuits, including photosensitive devices and circuits for signal processing applications.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: May 14, 2013
    Assignee: Analog Devices, Inc.
    Inventors: Lejun Hu, Srivatsan Parthasarathy, Michael Coln, Javier Salcedo
  • Publication number: 20130113061
    Abstract: Provided is a semiconductor image sensor device. The image sensor device includes a substrate. The image sensor device includes a first pixel and a second pixel disposed in the substrate. The first and second pixels are neighboring pixels. The image sensor device includes an isolation structure disposed in the substrate and between the first and second pixels. The image sensor device includes a doped isolation device disposed in the substrate and between the first and second pixels. The doped isolation device surrounds the isolation structure in a conformal manner.
    Type: Application
    Filed: November 7, 2011
    Publication date: May 9, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yu Lai, Yeur-Luen Tu, Chih-Hui Huang, Cheng-Ta Wu, Chia-Shiung Tsai, Luan C. Tran
  • Patent number: 8436442
    Abstract: The present invention is to provide an electromagnetic wave detecting element that can prevent a decrease in light utilization efficiency at sensor portions. The sensor portions are provided so as to correspond to respective intersection portions of scan lines and signal lines, and have semiconductor layer that generate charges due to electromagnetic waves being irradiated, and at whose electromagnetic wave irradiation surface sides upper electrodes are formed, and at whose electromagnetic wave non-irradiation surface sides lower electrodes are formed. Bias voltage is supplied to the respective upper electrodes via respective contact holes by a common electrode line that is formed further toward an electromagnetic wave downstream side than the semiconductor layer.
    Type: Grant
    Filed: April 5, 2012
    Date of Patent: May 7, 2013
    Assignee: FUJIFILM Corporation
    Inventor: Yoshihiro Okada
  • Publication number: 20130105932
    Abstract: A three-dimensional composite structure that includes a wafer and layer of semiconductor crystalline material bonded thereto, with the layer including first and second series of microcomponents on the first and second faces respectively, with the microcomponents being in alignment such that any residual alignment offsets between the first and second series of microcomponents are less than 100 nm homogeneously over the entire surface of the structure.
    Type: Application
    Filed: December 18, 2012
    Publication date: May 2, 2013
    Applicant: SOITEC
    Inventor: Soitec
  • Publication number: 20130105931
    Abstract: A solid-state imaging apparatus, controlling a potential on a semiconductor substrate for an electronic shutter operation, includes: a first semiconductor region of the first conductivity type for forming a photoelectric conversion region; a second semiconductor region of the first conductivity type, formed separately from the photoelectric conversion region, for accumulating carriers; a third semiconductor region of a second conductivity type arranged under the second semiconductor region, for operating as a potential barrier; a fourth semiconductor region of the second conductivity type extending between the first semiconductor region and the semiconductor substrate, and between the third semiconductor region and the semiconductor substrate; and a first voltage supply portion for supplying a voltage to the third semiconductor region; wherein the first voltage supply portion includes a fifth semiconductor region of the second conductivity type arranged in the pixel region, and a first electrode connected to
    Type: Application
    Filed: December 14, 2012
    Publication date: May 2, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: CANON KABUSHIKI KAISHA
  • Publication number: 20130099099
    Abstract: Embodiments of the invention provide a radiation detector comprising a pixel, the pixel having a first diode arranged to collect radiation-generated carriers; a second diode arranged to collect radiation-generated carriers; switching components operable to permit independent readout of the first diode and the second diode, wherein the first diode has a higher node capacitance than the second diode.
    Type: Application
    Filed: July 12, 2011
    Publication date: April 25, 2013
    Inventor: Thalis Anaxagoras
  • Publication number: 20130099346
    Abstract: This disclosure provides systems, methods, and apparatus related to semiconductor photomultipliers. In one aspect, a device includes a p-type semiconductor substrate, the p-type semiconductor substrate having a first side and a second side, the first side of the p-type semiconductor substrate defining a recess, and the second side of the p-type semiconductor substrate being doped with n-type ions. A conductive material is disposed in the recess. A p-type epitaxial layer is disposed on the second side of the p-type semiconductor substrate. The p-type epitaxial layer includes a first region proximate the p-type semiconductor substrate, the first region being implanted with p-type ions at a higher doping level than the p-type epitaxial layer, and a second region disposed on the first region, the second region being doped with p-type ions at a higher doping level than the first region.
    Type: Application
    Filed: October 15, 2012
    Publication date: April 25, 2013
    Applicant: The Regents of the University of California
    Inventor: The Regents of the University of California
  • Patent number: 8421178
    Abstract: A solid-state imaging device including an imaging area formed of a plurality of pixels arrayed in a two-dimensional matrix is provided. The solid-state imaging device includes: a photoelectric conversion portion including a charge accumulation region provided on a semiconductor substrate; a read transistor for reading electric charges from the photoelectric conversion portion; and a gettering site for separating metal impurities within the semiconductor substrate from at least the photoelectric conversion portion. The photoelectric conversion portion is provided on the surface side of the semiconductor substrate, and the gettering site is provided on the rear side away from the semiconductor substrate.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: April 16, 2013
    Assignee: Sony Corporation
    Inventor: Yasushi Maruyama
  • Patent number: 8421135
    Abstract: In a display device such as a liquid crystal display device, a large-sized display screen is realized under low power consumption. A surface of a source wiring line of a pixel portion employed in an active matrix type liquid crystal display device is processed by way of a plating process operation so as to lower a resistance value of this source wiring line. The source wiring line of the pixel portion is manufactured at a step different from a step for manufacturing a source wiring line of a drive circuit portion. Further, electrodes of a terminal portion are processed by a plating process operation so as to reduce a resistance value thereof.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: April 16, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hideaki Kuwabara, Saishi Fujikawa
  • Patent number: 8420433
    Abstract: A method is provided of forming a light sensing arrangement for use in a light sensor. The method comprises tiling a plurality of individual light sensing elements on a carrier, each element having a notch formed in an edge thereof, the notch being adapted to provide space, when the elements are tiled together, for an electrical connection to be made between the carrier and a surface of the element arranged to faced away from the carrier. Each element may comprise Silicon Photomultiplier (SPM) circuitry.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: April 16, 2013
    Assignee: SensL Technologies, Ltd.
    Inventors: John Carlton Jackson, Padraig Joseph Hughes, Peter John Ward
  • Publication number: 20130087875
    Abstract: In a photoelectric conversion device capable of adding signals of photoelectric conversion elements included in each of photoelectric conversion units, each of the photoelectric conversion elements includes a first semiconductor region of a first conductivity type for collecting a signal charge, a second semiconductor region of a second conductivity type is arranged between the photoelectric conversion elements arranged adjacent to each other and included in the photoelectric conversion unit, and a third semiconductor region of the second conductivity type is arranged between the photoelectric conversion elements arranged adjacent to each other among the plurality of photoelectric conversion elements and included in different photoelectric conversion units arranged adjacent to each other. An impurity concentration of the second semiconductor region is lower than an impurity concentration of the third semiconductor region.
    Type: Application
    Filed: September 27, 2012
    Publication date: April 11, 2013
    Applicant: Canon Kabushiki Kaisha
    Inventor: Canon Kabushiki Kaisha
  • Publication number: 20130087877
    Abstract: A solid-state imaging device generates signals by photoelectric conversion elements included in a first substrate in which circuit elements of a plurality of pixels are arranged. The solid-state imaging device outputs, from the plurality of pixels via output circuits, the signals that are generated by the photoelectric conversion elements and are via connection parts that electrically connect the first substrate with a second substrate, the output circuits being included in the second substrate.
    Type: Application
    Filed: December 4, 2012
    Publication date: April 11, 2013
    Applicant: OLYMPUS CORPORATION
    Inventor: OLYMPUS CORPORATION
  • Publication number: 20130081670
    Abstract: An improved photocell offering efficient power generation from broadband incident radiation, the photocell includes a first diode formed in single crystal silicon and one or more further diodes each formed in a single crystal Group II-VI semiconductor. In a preferred embodiment, a tandem photocell is provided that incorporates a first diode formed in single crystal silicon, a second diode formed in a Group II-VI semiconductor, an optional buffer layer and a highly doped layer of silicon acting as an optional tunnel junction between the two diodes. The device can additionally include a layer of silicon deposited at the rear of the structure to maximise current collection of longer wavelength light, and top and bottom (front and back) electrical contacts. In use, light impinges on the top (front) surface of the photocell and is absorbed (in turn) by diodes.
    Type: Application
    Filed: September 24, 2010
    Publication date: April 4, 2013
    Applicant: QINETIQ LIMITED
    Inventors: Timothy Ashley, Neil Thomson Gordon, Janet Elizabeth Hails
  • Publication number: 20130082343
    Abstract: One of disclosed embodiments provides a photoelectric conversion device, comprising a member including a first surface configured to receive light, and a second surface opposite to the first surface, and a plurality of photoelectric conversion portions aligned inside the member in a depth direction from the first surface, wherein at least one of the plurality of photoelectric conversion portions other than the photoelectric conversion portion positioned closest to the first surface includes, on a boundary surface thereof with the member, unevenness having a difference in level larger than a difference in level of unevenness of the photoelectric conversion portion positioned closest to the first surface, and wherein the boundary surface having the unevenness is configured to localize or resonate light incident on the member from a side of the first surface around the boundary surface having the unevenness.
    Type: Application
    Filed: September 12, 2012
    Publication date: April 4, 2013
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tetsuya Fudaba, Masatsugu Itahashi, Masahiro Kobayashi, Hideo Kobayashi
  • Patent number: 8409908
    Abstract: An apparatus for reducing photodiode thermal gain coefficient includes a bulk semiconductor material having a light-illumination side. The bulk semiconductor material includes a minority charge carrier diffusion length property configured to substantially match a predetermined hole diffusion length value and a thickness configured to substantially match a predetermined photodiode layer thickness. The apparatus also includes a dead layer coupled to the light-illumination side of the bulk semiconductor material, the dead layer having a thickness configured to substantially match a predetermined thickness value and wherein an absolute value of a thermal coefficient of gain due to the minority carrier diffusion length property of the bulk semiconductor material is configured to substantially match an absolute value of a thermal coefficient of gain due to the thickness of the dead layer.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: April 2, 2013
    Assignee: General Electric Company
    Inventors: Wen Li, Jonathan D. Short, George E. Possin
  • Patent number: 8405097
    Abstract: An optical sensor and a method for manufacturing the same are provided. The optical sensor includes a first photosensitive layer, a first charge carrier collecting element, a second photosensitive layer and a second charge carrier collecting element. The first photosensitive layer has a first light incident surface. The first charge carrier collecting element is disposed on a surface of the first photosensitive layer opposite to the first light incident surface of the first photosensitive layer. The second photosensitive layer is adjacent to the first photosensitive layer and has a second light incident surface. The second charge carrier collecting element is disposed on a surface of the second photosensitive layer opposite to the second light incident surface of the second photosensitive layer.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: March 26, 2013
    Assignee: Novatek Microelectronics Corp.
    Inventor: Dong-Hai Huang
  • Publication number: 20130069192
    Abstract: A method of improving thermal cycling reliability for a hybrid circuit structure requires providing at least two circuit layers, aligning two of the circuit layers vertically such that their respective circuit elements have a precise and well-defined spatial relationship, and providing an adhesive material which wicks into a portion of the space between the aligned layers so as to mitigate damage to the structure and/or interconnections that might otherwise occur due to thermal contraction mismatch between the layers. The adhesive material is required to have an associated viscosity such that, when provided under predetermined conditions, the adhesive stops wicking before reaching, and possibly degrading the performance of, the circuit elements.
    Type: Application
    Filed: September 19, 2011
    Publication date: March 21, 2013
    Inventors: DONALD E. COOPER, William E. Tennant
  • Publication number: 20130069193
    Abstract: An intermediate layer for a stacked type photoelectric conversion device including an n-type silicon-based stacked body including an n-type crystalline silicon-based semiconductor layer and an n-type silicon-based composite layer, and a p-type silicon-based stacked body including a p-type crystalline silicon-based semiconductor layer and a p-type silicon-based composite layer, the n-type crystalline silicon-based semiconductor layer of the n-type silicon-based stacked body being in contact with the p-type crystalline silicon-based semiconductor layer of the p-type silicon-based stacked body, a stacked type photoelectric conversion device including the same, and a method for manufacturing a stacked type photoelectric conversion device.
    Type: Application
    Filed: April 8, 2011
    Publication date: March 21, 2013
    Inventors: Katsushi Kishimoto, Masanori Mizuta
  • Patent number: 8399947
    Abstract: A solid-state imaging device includes photoelectric conversion units, vertical transfer units including vertical transfer electrodes, a horizontal transfer unit, a distribution transfer unit including distribution transfer electrodes, and first light-shield layers and second light-shield layers provided on the vertical transfer units and the distribution transfer unit. The first light-shield layers and the second light-shield layers are conductive. The first light-shield layers are provided in a layer different from a layer in which the second light-shield layers are provided. At least one of the first light-shield layers serves as an interconnect electrically connected to the vertical transfer electrodes included in the same row, and at least one of the first light-shield layers on the distribution transfer unit serves as an interconnect electrically connected the distribution transfer electrodes. The first light-shield layers are disposed so as not to overlap with the horizontal transfer unit.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: March 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Takuya Asano, Yoshiaki Kato, Takuya Nohara, Sei Suzuki
  • Publication number: 20130056844
    Abstract: An image sensor package includes a crystalline handler having opposing first and second surfaces, and a cavity formed into the first surface. At least one step extends from a sidewall of the cavity, wherein the cavity terminates in an aperture at the second surface. A cover is mounted to the second surface and extends over and covers the aperture. The cover is optically transparent to at least one range of light wavelengths. A sensor chip is disposed in the cavity and mounted to the at least one step. The sensor chip includes a substrate with front and back opposing surfaces, a plurality of photo detectors formed at the front surface, and a plurality of contact pads formed at the front surface which are electrically coupled to the photo detectors.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 7, 2013
    Inventor: Vage Oganesian
  • Patent number: 8389319
    Abstract: A method of manufacturing a CMOS image sensor is disclosed. A silicon-on-insulator substrate is provided, which includes providing a silicon-on-insulator substrate including a mechanical substrate, an insulator layer substantially overlying the mechanical substrate, and a seed layer substantially overlying the insulator layer. A semiconductor substrate is epitaxially grown substantially overlying the seed layer. The mechanical substrate and at least a portion of the insulator layer are removed. An ultrathin oxide layer is formed substantially underlying the semiconductor substrate. A mono layer of metal is formed substantially underlying the ultrathin oxide layer.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: March 5, 2013
    Assignee: SRI International
    Inventor: James Robert Janesick
  • Patent number: 8389322
    Abstract: A theme is to prevent the generation of noise due to damage in a photodetecting portion in a mounting process in a photodiode array, a method of manufacturing the same, and a radiation detector. In a photodiode array, wherein a plurality of photodiodes (4) are formed in array form on a surface at a side of an n-type silicon substrate (3) onto which light to be detected is made incident and penetrating wirings (8), which pass through from the incidence surface side to the back surface side, are formed for the photodiodes (4), the photodiode array (1) is arranged with a transparent resin film (6), which covers the formed regions of the photodiodes (4) and transmits the light to be detected, provided at the incidence surface side.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: March 5, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventor: Katsumi Shibayama
  • Publication number: 20130049155
    Abstract: A photosite is formed in a semiconductor substrate and includes a photodiode confined in a direction orthogonal to the surface of the substrate. The photodiode includes a semiconductor zone for storing charge that is formed in an upper semiconductor region having a first conductivity type and includes a main well of a second conductivity type opposite the first conductivity type and laterally pinned in a first direction parallel to the surface of the substrate. The photodiode further includes an additional semiconductor zone including an additional well having the second conductivity type that is buried under and makes contact with the main well.
    Type: Application
    Filed: June 21, 2012
    Publication date: February 28, 2013
    Applicants: STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS S.A.
    Inventors: Francois Roy, Julien Michelot
  • Publication number: 20130048860
    Abstract: A photoelectric conversion substrate includes: a substrate; plural pixels, each provided with a sensor portion and a switching element that are formed on the substrate, the sensor portion including a photoelectric conversion element that generates charge according to illuminated light, and the switching element reading out the charge from the sensor portion; a flattening layer that flattens the surface of the substrate having the switching elements and the sensor portions formed thereon; and a first conducting member that is formed over the whole face of the flattening layer and configured such that a voltage applied to the first conducting member is selected to be a predetermined voltage.
    Type: Application
    Filed: August 14, 2012
    Publication date: February 28, 2013
    Applicant: FUJIFILM CORPORATION
    Inventors: Naoyuki NISHINO, Keiichiro SATO, Yasunori OHTA, Haruyasu NAKATSUGAWA
  • Publication number: 20130049016
    Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Scott D. Schellhammer, Vladimir Odnoblyudov, Jeremy S. Frei
  • Publication number: 20130049156
    Abstract: In a region of a weak internal electric field, photocharges generated in a region deeper than the photodiode are diffused laterally to lower the sensitivity by photoelectrons flowing into adjacent pixels, etc (crosstalk). An anti-crosstalk layer is disposed in the photodiode forming portion, and between a pixel region and a peripheral circuit region. Crosstalk between a pixel and a pixel or between a pixel region and a peripheral circuit region is decreased to improve the photosensitivity.
    Type: Application
    Filed: July 12, 2012
    Publication date: February 28, 2013
    Inventors: Tomoyasu FURUKAWA, Satoshi Sakai, Yusuke Nonaka, Shinya Sugino
  • Patent number: 8378443
    Abstract: An area sensor of the present invention has a function of displaying an image in a sensor portion by using light-emitting elements and a reading function using photoelectric conversion devices. Therefore, an image read in the sensor portion can be displayed thereon without separately providing an electronic display on the area sensor. Furthermore, a photoelectric conversion layer of a photodiode according to the present invention is made of an amorphous silicon film and an N-type semiconductor layer and a P-type semiconductor layer are made of a polycrystalline silicon film. The amorphous silicon film is formed to be thicker than the polycrystalline silicon film. As a result, the photodiode according to the present invention can receive more light.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 19, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masato Yonezawa, Hajime Kimura, Yu Yamazaki
  • Publication number: 20130038820
    Abstract: A substrate for a flexible display device comprises a flexible film of a thickness and an array of micro structures in the flexible film. The flexible film has a first surface and a second surface spaced apart from the first surface by the thickness of the film. Each micro structure includes a chamber formed into the flexible film from the first surface, wherein the chamber has a concave portion near the second surface.
    Type: Application
    Filed: June 27, 2012
    Publication date: February 14, 2013
    Inventor: Shi-Chiung CHEN
  • Publication number: 20130032919
    Abstract: There is provided a solid-state image pickup element including a pixel array part in which a plurality of pixels are arranged on a silicon substrate in arrays, and a drive part driving the pixel. The pixel includes a photoelectric conversion part formed near a second face of the silicon substrate opposite to a first face on which a wiring layer is laminated, for generating a charge corresponding to incident light, an overflow part formed in contact with the second face and fixed to a predetermined voltage, and a potential barrier part formed to be connected with the photoelectric conversion part and the .overflow part, for serving as a barrier against a charge overflowed from the photoelectric conversion part on the overflow part.
    Type: Application
    Filed: July 30, 2012
    Publication date: February 7, 2013
    Applicant: SONY CORPORATION
    Inventor: Taiichiro Watanabe
  • Publication number: 20130032920
    Abstract: An image sensor device includes a semiconductor substrate having a front side and a backside. A first dielectric layer is on the front side of the semiconductor substrate. A metal pad is in the first dielectric layer. A second dielectric layer is over the first dielectric layer and on the front side of the semiconductor substrate. An opening penetrates through the semiconductor substrate from the backside of the semiconductor substrate, wherein the opening includes a first portion extending to expose a portion of the metal pad and a second portion extending to expose a portion of the second dielectric layer. A metal layer is formed in the first portion and the second portion of the opening.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 7, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Shuang-Ji Tsai, Yueh-Chiou Lin
  • Publication number: 20130032918
    Abstract: An image sensor may include a semiconductor substrate, a plurality of light receiving devices formed within the semiconductor substrate, and a plurality of device isolation films for isolating the light receiving devices from each other. When an arrangement direction of a pixel array may be formed by arranging the light receiving devices is a horizontal direction, the pixel array may be formed by alternately arranging a first type light receiving device and a second type light receiving device having different horizontal lengths.
    Type: Application
    Filed: July 12, 2012
    Publication date: February 7, 2013
    Applicant: Dongbu HiTek Co., Ltd.
    Inventor: Hoon JANG
  • Patent number: 8368160
    Abstract: An image sensing device is disclosed, including an epitaxy layer having the a conductivity type, including a first pixel area corresponding to a first incident light, a second pixel area corresponding to a second incident light, and a third pixel area corresponding to a third incident light, wherein the wavelength of the first incident light is longer than that of the second incident light and the wavelength of the second incident light is longer than that of the third incident light. A photodiode is disposed in an upper portion of the epitaxy layer, and a first deep well for reducing pixel-to-pixel talk of the image sensing device is disposed in a lower portion of the epitaxy layer in the second pixel area and the third pixel area, wherein at least a portion of the epitaxy layer in first pixel area does not include the first deep well.
    Type: Grant
    Filed: October 5, 2010
    Date of Patent: February 5, 2013
    Assignee: Himax Imaging, Inc.
    Inventors: Chung-Wei Chang, Fang-Ming Huang, Chi-Shao Lin, Yu-Ping Hu
  • Patent number: 8368079
    Abstract: To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: February 5, 2013
    Assignee: Semicondutor Energy Laboratory Co., Ltd.
    Inventor: Kengo Akimoto