Abstract: According to one embodiment, there is provided a semiconductor package manufacturing method utilizing a support body in which a first layer is stacked on a second layer, the method including: a first step of forming an opening in the first layer to expose the second layer therethrough; a second step of arranging a semiconductor chip on the second layer through the opening; a third step of forming a resin portion on the first layer to cover the semiconductor chip; and a fourth step of forming a wiring structure on the resin portion so as to be electrically connected to the semiconductor chip.

Abstract: An organic light emitting display includes a substrate, a semiconductor layer arranged on the substrate, an organic light emitting diode arranged on the semiconductor layer, an encapsulant arranged on an top surface periphery of the substrate, which is an outer periphery of the semiconductor layer and the organic light emitting diode, an encapsulation substrate bonded to the encapsulant, and a bonding agent arranged on an under surface of the substrate which is opposite to the encapsulant.

Abstract: A method is provided for forming a fine pattern. In the method, a first fine pattern and a first metal pattern are formed by respectively patterning a first fine pattern layer on a base substrate and a first metal layer on the first fine pattern layer. A second fine pattern layer and a second metal layer are sequentially formed over the first fine pattern and the first metal pattern. The second metal layer is patterned, so that a second metal pattern between adjacent portions of the first fine pattern. The second fine pattern layer is patterned using the second metal pattern as a mask, so that a second fine pattern is formed between adjacent portions of the first fine pattern.

Abstract: A surface treating method for treating a surface of a substrate inside a process chamber includes the steps of generating an atmosphere containing no moisture in the process chamber, heating the substrate inside the atmosphere containing no moisture in the process chamber; and causing a reaction between the substrate and an adhesion accelerating agent by feeding the adhesion accelerating agent gas into the process chamber.

Abstract: The present invention relates to a method for improving polyimide (PI) non-adherence to a substrate and a PI solution. The method includes the following steps: (1) providing a substrate and a PI solution, the PI solution comprising PI molecules and a solvent, the PI molecules having hydrophobic moieties; and (2) coating the PI solution on the substrate to form a PI film. The PI solution includes PI molecules and a solvent. The PI molecules have hydrophobic moieties. The solvent include N-methyl-2-pyrrolidone, ?-butyrolactone, butyl carbonate, or a mixture thereof. The PI molecules of the PI solution contain hydrophobic moieties and in coating the PI solution to a substrate, the hydrophobic moieties link with organic compounds on the substrate thereby enhancing affinity of the PI solution with surface of the substrate, improving the issue of PI non-adherence, and the heightening quality of printing the substrate.

Abstract: Disclosed herein is a solid-state image pickup device including: a trench formed in an insulating film above a light-receiving portion; a first waveguide core portion provided on an inner wall side of the trench; a second waveguide core portion filled in the trench via the first waveguide core portion; and a rectangular lens formed of the same material as that of the second waveguide core portion and provided integrally with the second waveguide core portion.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes forming a plurality of circuit devices over a substrate. The method includes forming an organic layer over the substrate. The organic layer is formed over the plurality of circuit devices. The method includes polishing the organic layer to planarize a surface of the organic layer. The organic layer is free of being thermally treated prior to the polishing. The organic material is un-cross-linked during the polishing. The method includes depositing a LT-film over the planarized surface of the organic layer. The depositing is performed at a temperature less than about 150 degrees Celsius. The depositing is also performed without using a spin coating process. The method includes forming a patterned photoresist layer over the LT-film.

Abstract: Methods for forming photoresists sensitive to radiation on substrate are provided. Atomic layer deposition methods of forming films (e.g., silicon-containing films) photoresists are described. The process can be repeated multiple times to deposit a plurality of silicon photoresist layers. Process of depositing photoresist and forming patterns in photoresist are also disclosed which utilize carbon containing underlayers such as amorphous carbon layers.

Abstract: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.

Abstract: A polybenzoxazole precursor is represented by the following formula (1): wherein R1a to R4a, R1b to R4b, X1, Y1 and m are defined in the specification.

Abstract: A device including a first body (101) with terminals (102) on a surface (101a), each terminal having a metallic connector (110), which is shaped as a column substantially perpendicular to the surface. Preferably, the connectors have an aspect ratio of height to diameter of 2 to 1 or greater, and a fine pitch center-to-center. The connector end (110a) remote from the terminal is covered by a film (130) of a sintered paste including a metallic matrix embedded in a first polymeric compound. Further a second body (103) having metallic pads (140) facing the respective terminals (102). Each connector film (130) is in contact with the respective pad (140), whereby the first body (101) is spaced from the second body (103) with the connector columns (110) as standoff. A second polymeric compound (150) is filling the space of the standoff.

Abstract: A Spin-On Dielectric (SOD) method with multi stage ramping temperature for coating a dielectric material onto a substrate, comprising the steps of: (a) placing the substrate on a chill plate to decrease the temperature; (b) fixing the chilled substrate on a spinning device; (c) rotating the spinning device to drive the substrate rotating; (d) injecting the dielectric material onto the center of the substrate; (e) spreading the dielectric material on the upper surface of the substrate by spinning; (f) baking the substrate and the dielectric material by a heat plate to achieve multi stages ramping temperature, where the temperature of each stage has a steady state temperature for a predetermined time and the posterior stage has higher temperature than the anterior stage; (g) placing the substrate on the chill plate for cooling down; (h) spreading a film of dielectric material and finishing the coating.

Abstract: A method of forming a semiconductor structure includes forming a photoresist layer over a substrate. The photoresist layer includes a first material removable by a removal process. The first material at a guard band portion of the photoresist layer along an edge portion of the photoresist layer is converted to a second material. The second material is not removable by the removal process. Also, the first material at the edge portion of the photoresist layer is not converted to the second material. The guard band portion is farther from a periphery of the substrate than the edge portion. The removal process is performed to remove the first material after the conversion of the guard band portion.

Abstract: A method of manufacturing a semiconductor device is provided. According to an embodiment, the method includes forming a layer to be etched on a semiconductor substrate, and forming a photoresist pattern on the layer to be etched. A block copolymer including a hydrophobic radical and a hydrophilic radical is formed in the photoresist pattern, and the block copolymer is assembled to allow a polymer having the hydrophobic radical to be formed in a pillar pattern within a polymer having the hydrophilic radical. The polymer having the hydrophobic radical is then selectively removed.

Abstract: A process for preparing an organic film on a selected zone at the surface of a photosensitive semiconductor substrate, including (i) bringing a liquid solution which includes at least one organic adhesion primer into contact with at least the selected zone; (ii) polarizing the surface of the substrate to an electric potential more cathodic than the reduction potential of the organic adhesion primer; and (iii) exposing the selected zone to light radiation, the energy of which is at least equal to that of the band gap of the photosensitive semiconductor substrate.

Abstract: A baffle plate for redirecting a reactive gas flow within a process chamber of a semiconductor plasma processing apparatus includes a topside surface having a plurality of topside apertures for receiving the reactive gas flow and a bottomside surface having a plurality of bottomside apertures for emitting the reactive gas flow toward a semiconductor substrate. An outer portion of the baffle plate includes both topside apertures and bottomside apertures, while within an inner portion of the baffle plate for at least one of the topside surface and bottomside surface is a solid region throughout exclusive of any apertures. The inner portion has an outer dimension that is at least ten (10) percent of an outer dimension of the outer portion.

Abstract: A semiconductor device includes a trench MOS barrier Schottky diode having an integrated PN diode and a method is for manufacturing same.

Abstract: Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.

Abstract: A method for at least partially sealing a porous material is provided, comprising forming a sealing layer onto the porous material by applying a sealing compound comprising oligomers wherein the oligomers are formed by ageing a precursor solution comprising cyclic carbon bridged organosilica and/or bridged organosilanes. The method is especially designed for low k dielectric porous materials to be incorporated into semiconductor devices.

Abstract: In one embodiment, a program storage device readable by a machine, tangibly embodying a program of instructions executable by the machine for performing operations, includes operations comprising: providing a structure comprising a first layer overlying a substrate, where the first layer comprises a dielectric material having a plurality of pores; applying a filling material to a surface of the first layer, where the filling material comprises a polymer and at least one additive, where the at least one additive comprises at least one of a surfactant, a high molecular weight polymer and a solvent (e.g., a high boiling point solvent); and after applying the filling material, heating the structure to enable the filling material to at least partially fill the plurality of pores uniformly across an area of the first layer, where heating the structure results in residual filling material being uniformly left on the surface of the first layer.

Abstract: The disclosure relates to integrated circuit fabrication and, more particularly, to a semiconductor device with a high-k gate dielectric layer. An exemplary structure for a semiconductor device comprises a substrate and a gate structure disposed over the substrate. The gate structure comprises a dielectric portion and an electrode portion that is disposed over the dielectric portion, and the dielectric portion comprises a carbon-doped high-k dielectric layer on the substrate and a carbon-free high-k dielectric layer adjacent to the electrode portion.

Abstract: A method for manufacturing a semiconductor device includes steps of: (a) forming a thin film containing a phenyl group and silicon on a substrate while obtaining a plasma by activating an organic silane gas containing a phenyl group and silicon and nitrogen as not original component but unavoidable impurity and exposing the substrate to the plasma, temperature of the substrate being set at 200° C. or lower; and (b) obtaining a low-permittivity film by supplying energy to the substrate to allow moisture to be released from the thin film. With this method for manufacturing the semiconductor device, it is possible to obtain a silicon-oxide based low-permittivity film containing an organic substance which is not significantly damaged by the release of the organic substance when subjected to a plasma treatment such as an etching treatment, an ashing treatment, and/or the like.

Abstract: In a method of forming a metal or metal nitride pattern, a metal or metal nitride layer is formed on a substrate, and a photoresist pattern is formed on the metal or metal nitride layer. An over-coating composition is coated on the metal or metal nitride layer and on the photoresist pattern to form a capping layer on the photoresist pattern. The over-coating composition includes a polymer having amine groups as a side chain or a branch and a solvent. A remaining portion of the over-coating composition is removed by washing with a hydrophilic solution. The metal or metal nitride layer is partially removed using the capping layer and the photoresist pattern as an etching mask.

Abstract: The invention includes new organic-containing compositions that can function as an antireflective layer for an overcoated photoresist. Compositions of the invention also can serve effectively as a hard mask layer by exhibiting a sufficient plasma etch selectivity from an undercoated layer. Preferred compositions of the invention have a high Si content and comprise a blend of distinct resins.

Abstract: A layer stack over a substrate is etched using a photoresist pattern deposited on the layer stack as a first mask. The photoresist pattern is in-situ cured using plasma. At least a portion of the photoresist pattern can be modified by curing. In one embodiment, silicon by-products are formed on the photoresist pattern from the plasma. In another embodiment, a carbon from the plasma is embedded into the photoresist pattern. In yet another embodiment, the plasma produces an ultraviolet light to cure the photoresist pattern. The cured photoresist pattern is slimmed. The layer stack is etched using the slimmed photoresist pattern as a second mask.

Abstract: The actinic ray-sensitive or radiation-sensitive resin composition according to the present invention includes a resin (A) which contains at least one type of repeating unit which is represented by the general formula (PG1), at least one type of repeating unit which is selected from the repeating units which are represented by the general formula (PG2) and the general formula (PG3), and at least one type of repeating unit which includes a lactone structure, a compound (B) which is a compound which is represented by the general formula (B1) and where the molecular weight of an anion moiety is 200 or less, and a solvent (C).

Abstract: The invention provides a composition for forming a silicon-containing resist underlayer film comprising: (A) a silicon-containing compound obtained by a hydrolysis-condensation reaction of a mixture containing, at least, one or more hydrolysable silicon compound shown by the following general formula (1) and one or more hydrolysable compound shown by the following general formula (2), and (B) a silicon-containing compound obtained by a hydrolysis-condensation reaction of a mixture containing, at least, one or more hydrolysable silicon compound shown by the following general formula (3) and one or more hydrolysable silicon compound shown by the following general formula (4). There can be provided a composition for forming a resist underlayer film applicable not only to a resist pattern obtained in a negative development but also to a resist pattern obtained in a conventional positive development, and a patterning process using this composition.

Abstract: A method for manufacturing a light-emitting diode includes the steps of: growing a light-emitting diode structure-forming semiconductor layer of a compound semiconductor having a zincblende crystal structure on a first substrate formed of a compound semiconductor having a zincblende crystal structure and that has a principal surface tilted in a [110] direction with respect to a (001) plane; bonding the first substrate to a second substrate on the side of the semiconductor layer; removing the first substrate so as to expose the semiconductor layer; forming an etching mask on the exposed surface of the semiconductor layer in a rectangular planar shape so that a longer side extends in a [110] or [?1-10] direction, and that a shorter side extends in a [?110] or [1-10] direction; and patterning the semiconductor layer by wet etching using the etching mask.

Abstract: A method for forming photoresist patterns includes providing a substrate, forming a bi-layered photoresist on the substrate, and performing a photolithography process to pattern the bi-layered photoresist. The bi-layered photoresist includes a first photoresist layer and a second photoresist layer positioned between the first photoresist layer and the substrate. The first photoresist layer has a first refraction index and the second photoresist layer has a second refraction index, and the second refraction index is larger than the first refraction index.

Abstract: Some embodiments include methods of forming patterns utilizing copolymer. A copolymer composition is formed across a substrate. The composition includes subunits A and B, and will be self-assembled to form core structures spaced center-to-center by a distance of L0. The core structures are contained within a repeating pattern of polygonal unit cells. Distances from the core structures to various locations of the unit cells are calculated to determine desired distributions of subunit lengths.

Abstract: The invention provides a material for forming a passivation film for a semiconductor substrate. The material includes a polymer compound having an anionic group or a cationic group.

Abstract: A manufacturing method of thin film transistor substrate of a liquid crystal display panel includes following steps. A substrate is provided. Then, a transparent conducting layer and an opaque conducting layer are formed on the substrate. Thereafter, the transparent conducting layer and the opaque conducting layer are patterned by a gray-tone mask to form at least one storage capacitor electrode. Next, a first insulating layer is formed on the storage capacitor electrode. Then, at least one gate electrode is formed on the substrate. Subsequently, at least one gate insulating layer, a patterned semiconductor layer, a source electrode, a drain electrode, and a second insulating layer are formed sequentially on the gate electrode. Moreover, at least one pixel electrode is formed on the first insulating layer and the second insulating layer. A part of the pixel electrode overlaps a part of the storage capacitor electrode to form a storage capacitor.

Abstract: Embodiments of the present invention generally provide methods for forming conductive structures on the surfaces of a solar cell. In one embodiment, conductive structures are formed on the front surface of a solar cell by depositing a sacrificial polymer layer, forming patterned lines in the sacrificial polymer via a fluid jet, depositing metal layers over the front surface of the solar cell, and performing lift off of the metal layers deposited over the sacrificial polymer by dissolving the sacrificial polymer with a water based solvent.

Abstract: A method is provided for forming a fine pattern. In the method, a first fine pattern and a first metal pattern are formed by respectively patterning a first fine pattern layer on a base substrate and a first metal layer on the first fine pattern layer. A second fine pattern layer and a second metal layer are sequentially formed over the first fine pattern and the first metal pattern. The second metal layer is patterned, so that a second metal pattern between adjacent portions of the first fine pattern. The second fine pattern layer is patterned using the second metal pattern as a mask, so that a second fine pattern is formed between adjacent portions of the first fine pattern.

Abstract: A biphenyl derivative having formula (1) is provided wherein Ar1 and Ar2 denote a benzene or naphthalene ring, and x and z each are 0 or 1. A material comprising the biphenyl derivative or a polymer comprising recurring units of the biphenyl derivative is spin coated and heat treated to form a resist bottom layer having improved properties, optimum values of n and k, step coverage, etch resistance, heat resistance, solvent resistance, and minimized outgassing.

Abstract: The invention provides a patterning process for forming a negative pattern by lithography, comprising at least the steps of: using a composition for forming silicon-containing film, containing specific silicon-containing compound (A) and an organic solvent (B), to form a silicon-containing film; using a silicon-free resist composition to form a photoresist film on the silicon-containing film; heat-treating the photoresist film, and subsequently exposing the photoresist film to a high energy beam; and using a developer comprising an organic solvent to dissolve an unexposed area of the photoresist film, thereby obtaining a negative pattern. There can be a patterning process, which is optimum as a patterning process of a negative resist to be formed by adopting organic solvent-based development, and a composition for forming silicon-containing film to be used in the process.

Abstract: According to one embodiment, a method of forming a pattern includes forming a monolayer on a substrate, selectively exposing the monolayer to an energy beam and selectively modifying exposed portions thereof to form patterns of exposed and unexposed portions, forming a block copolymer layer includes first and second block chains on the monolayer, and causing the block copolymer layer to be phase-separated to form patterns of the first and second block chains of the block copolymer layer based on the patterns of the exposed and unexposed portions of the monolayer.

Abstract: There is provided that a method for producing a resin pattern, and the method includes at least the steps (1) to (7) in this order; (1) a coating step of coating a photosensitive resin composition on a substrate; (2) a solvent removal step of removing the solvent from the applied photosensitive resin composition; (3) an exposure step of patternwise exposing the photosensitive resin composition from which the solvent has been removed, to an active radiation; (4) a development step of developing the exposed photosensitive resin composition using an aqueous developer liquid; (5) an overcoating step of providing an overcoat layer on the developed photosensitive resin composition; (6) a heat-treating step of heat-treating the photosensitive resin composition on which the overcoat layer has been provided; and (7) a removal step of removing the overcoat layer.

Abstract: A reactive cyclodextrin derivative or a reactive glucose derivative is used as a template derivative for forming an ultra-low dielectric layer. A layer is formed of the reactive cyclodextrin derivative or the reactive glucose derivative capped with Si—H and then cured in an atmosphere of hydrogen peroxide to form the ultra-low dielectric layer.

Abstract: A method and a structure for reworking an antireflective coating (ARC) layer over a semiconductor substrate. The method includes providing a substrate having a material layer, forming a planarization layer on the material layer, forming an organic solvent soluble layer on the planarization layer, forming an ARC layer on the organic solvent soluble layer, forming a pattern in the ARC layer, and removing the organic solvent soluble layer and the ARC layer with an organic solvent while leaving the planarization layer unremoved. The structure includes a substrate having a material layer, a planarization layer on the material layer, an organic solvent soluble layer on the planarization layer, and an ARC layer on the organic solvent soluble layer.

Abstract: To form a dielectric layer, an organometallic precursor is adsorbed on a substrate loaded into a process chamber. The organometallic precursor includes a central metal and ligands bound to the central metal. An inactive oxidant is provided onto the substrate. The inactive oxidant is reactive with the organometallic precursor. An active oxidant is also provided onto the substrate. The active oxidant has a higher reactivity than that of the inactive oxidant.

Abstract: A method of lithography patterning includes forming a first material layer on a substrate; forming a first patterned resist layer including at least one opening therein on the first material layer; forming a second material layer on the first patterned resist layer and the first material layer; forming a second patterned resist layer including at least one opening therein on the second material layer; and etching the first and second material layers uncovered by the first and second patterned resist layers.

Abstract: A method for forming a mask for forming contact holes of a semiconductor device includes coating an etch target layer with a first photoresist layer, patterning the first photoresist layer in a type of lines and spaces to form a first photoresist pattern, wherein the first photoresist pattern comprises pads formed at both ends of the first photoresist pattern, and lines repeatedly formed between the pads at the both ends, forming a protective layer on a surface of the first photoresist pattern by performing a freezing process onto the first photoresist pattern, and forming a second photoresist pattern having a type of lines stretched in a second direction which is perpendicular to the first direction on the etch target layer including the protective layer.

Abstract: An antireflective coating that contains at least two polymer components and comprises chromophore moieties and transparent moieties is provided. The antireflective coating is useful for providing a single-layer composite graded antireflective coating formed beneath a photoresist layer.

Abstract: Embodiments described herein relate to materials and processes for patterning and etching features in a semiconductor substrate. In one embodiment, a method of forming a composite amorphous carbon layer is provided. The method comprises positioning a substrate in a process chamber, introducing a hydrocarbon source gas into the process chamber, introducing a diluent source gas into the process chamber, introducing a plasma-initiating gas into the process chamber, generating a plasma in the process chamber, forming an amorphous carbon initiation layer on the substrate, wherein the hydrocarbon source gas has a volumetric flow rate to diluent source gas flow rate ratio of 1:12 or less, and forming a bulk amorphous carbon layer on the amorphous carbon initiation layer, wherein a hydrocarbon source gas used to form the bulk amorphous carbon layer has a volumetric flow rate to a diluent source gas flow rate of 1:6 or greater.

Abstract: Method and systems provide growth of polymer structures at a high rate in a selective manner. In various embodiments, the method or system can expose the growth site to a polymer source and growing a polymer tube at a rate of at least 80 micrometer per hour at the growth site. The method or system can provide selectivity by providing a growth site on a substrate by patterning a metal, such as copper, that provides a seed site for the polymer. Non-selected sites can be coated with a polymer growth inhibitor, such as polyimide or silicon nitride.

Abstract: Disclosed is a low dielectric constant insulating film formed of a polymer containing Si atoms, O atoms, C atoms, and H atoms, which includes straight chain molecules in which a plurality of basic molecules with an SiO structure are linked in a straight chain, binder molecules with an SiO structure linking a plurality of the straight chain molecules. The area ratio of a signal indicating a linear type SiO structure is 49% or more, and the signal amount of the signal indicating Si(CH3) is 66% or more.

Abstract: Disclosed herein is a solid-state image pickup device including: a trench formed in an insulating film above a light-receiving portion; a first waveguide core portion provided on an inner wall side of the trench; a second waveguide core portion filled in the trench via the first waveguide core portion; and a rectangular lens formed of the same material as that of the second waveguide core portion and provided integrally with the second waveguide core portion.

Abstract: The present invention relates to a solution and a process for activating the surface of a substrate comprising at least one area formed from a polymer, for the purpose of subsequently covering it with a metallic layer deposited via an electroless process. According to the invention, this composition contains: A) an activator formed from one or more palladium complexes; B) a binder formed from one or more organic compounds chosen from compounds comprising at least two glycidyl functions and at least two isocyanate functions; C) a solvent system formed from one or more solvents capable of dissolving said activator and said binder. Application: Manufacture of electronic devices such as, in particular, integrated circuits, especially in three dimensions.

Abstract: There is provided a resist underlayer film having both heat resistance and etching selectivity. A composition for forming a resist underlayer film for lithography, comprising a reaction product (C) of an alicyclic epoxy polymer (A) with a condensed-ring aromatic carboxylic acid and monocyclic aromatic carboxylic acid (B). The alicyclic epoxy polymer (A) may include a repeating structural unit of Formula (1): (T is a repeating unit structure containing an alicyclic ring in the polymer main chain; and E is an epoxy group or an organic group containing an epoxy group). The condensed-ring aromatic carboxylic acid and monocyclic aromatic carboxylic acid (B) may include a condensed-ring aromatic carboxylic acid (B1) and a monocyclic aromatic carboxylic acid (B2) in a molar ratio of B1:B2=3:7 to 7:3. The condensed-ring aromatic carboxylic acid (B1) may be 9-anthracenecarboxylic acid and the monocyclic aromatic carboxylic acid (B2) may be benzoic acid.