Abstract: A method for manufacturing a capacitor of a semiconductor device includes: forming an interlayer insulating film including a contact plug over a semiconductor substrate; forming a first stack film including a capacitor oxide film and a nitride film over the interlayer insulating film; etching the first stack film to form a first stack pattern and a contact hole that exposes the contact plug; forming a lower electrode in the contact hole; forming a capping oxide film continuously over the first stack pattern to form a bridge connecting the neighboring first stack patterns; forming an etching barrier film including cavities over the capping oxide film; performing a blanket etching process onto the etching barrier film including cavities until the capacitor oxide film is exposed to form a nitride film pattern; and removing the exposed capacitor oxide film.

Abstract: This invention relates to processes for the production of organometallic compounds represented by the formula M(L)3 wherein M is a Group VIII metal, e.g., ruthenium, and L is the same or different and represents a substituted or unsubstituted amidinato group or a substituted or unsubstituted amidinato-like group, which process comprises (i) reacting a substituted or unsubstituted metal source compound, e.g., ruthenium (II) compound, with a substituted or unsubstituted amidinate or amidinate-like compound in the presence of a solvent and under reaction conditions sufficient to produce a reaction mixture comprising said organometallic compound, e.g., ruthenium (III) compound, and (ii) separating said organometallic compound from said reaction mixture. The organometallic compounds are useful in semiconductor applications as chemical vapor or atomic layer deposition precursors for film depositions.

Abstract: There is provided a method for modifying a high-k dielectric thin film provided on the surface of an object using a metal organic compound material. The method includes a preparation process for providing the object with the high-k dielectric thin film formed on the surface thereof, and a modification process for applying UV rays to the highly dielectric thin film in an inert gas atmosphere while maintaining the object at a predetermined temperature to modify the high-k dielectric thin film. According to the above constitution, the carbon component can be eliminated from the high-k dielectric thin film, and the whole material can be thermally shrunk to improve the density, whereby the occurrence of defects can be prevented and the film density can be improved to enhance the specific permittivity and thus to provide a high level of electric properties.

Abstract: A method for fabricating a fine pattern in a semiconductor device includes forming a first photoresist over a substrate where an etch target layer is formed, doping at least one impurity selected from group III elements and group V elements, of the periodic table, into the first photoresist, forming a photoresist pattern over the first photoresist, performing a dry etching process using the photoresist pattern to expose the first photoresist, etching the first photoresist by an oxygen-based dry etching to form a first photoresist pattern where a doped region is oxidized, and etching the etch target layer using the first photoresist pattern as an etch barrier.

Abstract: An organic light emitting display device includes a first substrate, an array of organic light emitting pixels formed on the substrate, a second substrate opposing the first substrate. A frit seal interconnects the first and second substrates and surrounds the array of organic light emitting pixels. A film structure interposed between the second substrate and the array of organic light emitting pixels and contacts both the second substrate and the array.

Abstract: Methods for forming a gate using quantum dots are disclosed. More particularly, the present invention relates to a method for forming quantum dots for fabrication of an ultrafine semiconductor device includes a gate with quantum dots. The present invention is capable of forming quantum dots in uniform sizes and at uniform intervals so as to achieve an electrically stable device.

Abstract: A semiconductor chip has devices formed on a first principal plane of a semiconductor substrate, wherein a second principal plane of the semiconductor substrate is planarized, and an organic film having plus charges on an outer side is provided on the second principal plane.

Abstract: A method of forming a pattern on a wafer is provided. The method includes applying a photoresist on the wafer and exposing the wafer to define a first pattern on the photoresist. The method also includes exposing the wafer to define a second pattern on the photoresist, wherein each of the first and second patterns comprises unexposed portions of the photoresist and developing the wafer to form the first and second patterns on the photoresist, wherein the first and second patterns are formed by removing the unexposed portions of the photoresist.

Abstract: The present disclosure provides a method of fabricating a semiconductor device that includes forming a high-k dielectric over a substrate, forming a first metal layer over the high-k dielectric, forming a second metal layer over the first metal layer, forming a first silicon layer over the second metal layer, implanting a plurality of ions into the first silicon layer and the second metal layer overlying a first region of the substrate, forming a second silicon layer over the first silicon layer, patterning a first gate structure over the first region and a second gate structure over a second region, performing an annealing process that causes the second metal layer to react with the first silicon layer to form a silicide layer in the first and second gate structures, respectively, and driving the ions toward an interface of the first metal layer and the high-k dielectric in the first gate structure.

Abstract: A method for fabricating a nonvolatile memory device includes repeatedly stacking a stacked structure over a substrate to form a multi-stacked structure, wherein the stacked structure includes a conductive layer and an insulation layer, forming a photoresist pattern over the multi-stacked structure, first-etching an uppermost stacked structure of the multi-stacked structure using the photoresist pattern as an etch barrier, second-etching a resultant structure formed by the first-etching through the use of a breakthrough etching, slimming the photoresist pattern to form a slimmed photoresist pattern, and third-etching the uppermost stacked structure using the slimmed photoresist pattern as an etch barrier and, at the same time, etching a stacked structure disposed under the uppermost stacked structure and exposed by the first-etching.

Abstract: The present invention relates to a method for manufacturing a flat panel display. Herein, the same mask is used to form contact holes and pixel electrodes in the display substrate. Hence, the number of masks needed for manufacturing the flat panel display can be reduced to decrease the manufacturing cost.

Abstract: A method for manufacturing a semiconductor device includes steps of:(a) forming a thin film containing a phenyl group and silicon on a substrate while obtaining a plasma by activating an organic silane gas containing a phenyl group and silicon and nitrogen as not original component but unavoidable impurity and exposing the substrate to the plasma, temperature of the substrate being set at 200° C. or lower; and (b) obtaining a low-permittivity film by supplying energy to the substrate to allow moisture to be released from the thin film. With this method for manufacturing the semiconductor device, it is possible to obtain a silicon-oxide based low-permittivity film containing an organic substance which is not significantly damaged by the release of the organic substance when subjected to a plasma treatment such as an etching treatment, an ashing treatment, and/or the like.

Abstract: A polymer for gap-filling in a semiconductor device, the polymer being prepared by polycondensation of hydrolysates of the compound represented by Formula 1, the compound represented by Formula 2, and one or more compounds represented by Formulae 3 and 4: [RO]3Si—[CH2]n—Si[OR]3??(1) wherein n is from 0 to 2 and each R is independently a C1-C6 alkyl group; [RO]3Si—[CH2]nX??(2) wherein X is a C6-C12 aryl group, n is from 0 to 2, and R is a C1-C6 alkyl group; [RO]3Si—R???(3) wherein R and R? are independently a C1-C6 alkyl group; and [RO]3Si—H??(4) wherein R is a C1-C6 alkyl group.

Abstract: Electrical structures and devices may be formed and include an organic passivating layer that is chemically bonded to a silicon-containing semiconductor material to improve the electrical properties of electrical devices. In different embodiments, the organic passivating layer may remain within finished devices to reduce dangling bonds, improve carrier lifetimes, decrease surface recombination velocities, increase electronic efficiencies, or the like. In other embodiments, the organic passivating layer may be used as a protective sacrificial layer and reduce contact resistance or reduce resistance of doped regions. The organic passivation layer may be formed without the need for high-temperature processing.

Abstract: A gas distribution system for supplying different gas compositions to a chamber, such as a plasma processing chamber of a plasma processing apparatus is provided. The gas distribution system can include a gas supply section, a flow control section and a switching section. The gas supply section provides first and second gases, typically gas mixtures, to the flow control section, which controls the flows of the first and second gases to the chamber. The chamber can include multiple zones, and the flow control section can supply the first and second gases to the multiple zones at desired flow ratios of the gases. The gas distribution system can continuously supply the first and second gases to the switching section and the switching section is operable to switch the flows of the first and second gases, such that one of the first and second process gases is supplied to the chamber while the other of the first and second gases is supplied to a by-pass line, and then to switch the gas flows.

Abstract: In one aspect, a method of forming a structure on a substrate is disclosed. For example, the method includes forming a first mask layer and a second mask layer, modifying a material property in regions of the first and second mask layers, and forming the structure based on the modified regions.

Abstract: A method for producing a polymer for semiconductor optoelectronics, comprising the steps of providing a monomer is produced having the formula: wherein: R1 is a hydrolysable group R2 is hydrogen, and R3 is a bridging linear or branched bivalent hydrocarbyl group, said monomer being produced by hydrosilylation of the corresponding starting materials, and homo- or copolymerizing the monomer to produce a polymer.

Abstract: Some embodiments include methods of utilizing block copolymer to form patterns between weirs. The methods may utilize liners along surfaces of the weirs to compensate for partial-width segments of the patterns in regions adjacent the weirs. Some embodiments include methods in which spaced apart structures are formed over a substrate, and outer surfaces of the structures are coated with a thickness of coating. Diblock copolymer is used to form a pattern across spaces between the structures. The diblock copolymer includes a pair of block constituents that have different affinities for the coating relative to one another. The pattern includes alternating segments, with the segments adjacent to the coating being shorter than the segments that are not adjacent to the coating. The coating thickness is about the amount by which the segments adjacent to the coating are shorter than the segments that are not adjacent to the coating.

Abstract: A method of making a light emitting diode includes forming a plurality of electrically conductive members at intervals on a first surface of an epitaxial layer which generates light so that the electrically conductive members are in ohmic contact with the epitaxial layer, forming a light incident layer on the first surface at regions where none of the electrically conductive members are formed, forming a light reflecting layer on the light incident layer and the electrically conductive members, providing an adhesive on the light reflecting layer, and bonding a permanent substrate to the light reflecting layer through the adhesive and through a wafer bonding process.

Abstract: A method for fabricating a semiconductor device is provided. The method of fabricating a semiconductor device provides a semiconductor substrate; forming a first insulating layer, a first conductive layer and a chemical mechanical polishing (CMP) stop layer over the semiconductor substrate in sequence; forming openings in the chemical mechanical polishing (CMP) stop layer and the underlying first conductive layer to expose the first insulating layer, thereby leaving a patterned chemical mechanical polishing (CMP) stop layer and a patterned first conductive layer; forming a second insulating layer on the patterned chemical mechanical polishing (CMP) stop layer, filling in the openings; performing a planarization process to remove a portion of the second insulating layer until the patterned chemical mechanical polishing (CMP) stop layer is exposed, thereby leaving a remaining second insulating layer in the openings; removing the patterned chemical mechanical polishing (CMP) stop layer.

Abstract: When a thin film transistor is manufactured by using a printing method, the precision of alignment between a first electrode and a second electrode becomes a problem. If it is manufactured by using photolithography, a photomask for each layer is necessary, resulting in the cost being increased. The essence of the present invention is that not only processing the gate shape is carried out over the substrate by using a resist pattern formed by exposing using a photo-mask for the gate pattern but also processing the source-drain electrodes is carried out by lifting-off. As a result, alignment between the source-drain electrode and the gate electrode is carried out.

Abstract: A method of forming fine patterns of a semiconductor device includes forming a plurality of first mask patterns on a substrate such that the plurality of first mask patterns are separated from one another by a space located therebetween, in a direction parallel to a main surface of the substrate, forming a plurality of capping films formed of a first material having a first solubility in a solvent on sidewalls and a top surface of the plurality of first mask patterns. The method further includes forming a second mask layer formed of a second material having a second solubility in the solvent, which is less than the first solubility, so as to fill the space located between the plurality of first mask patterns, and forming a plurality of second mask patterns corresponding to residual portions of the second mask layer which remain in the space located between the plurality of first mask patterns, after removing the plurality of capping films and a portion of the second mask layer using the solvent.

Abstract: Methods and apparatus for depositing an amorphous carbon layer on a substrate are provided. In one embodiment, a deposition process includes positioning a substrate in a substrate processing chamber, introducing a hydrocarbon source having a carbon to hydrogen atom ratio of greater than 1:2 into the processing chamber, introducing a plasma initiating gas selected from the group consisting of hydrogen, helium, argon, nitrogen, and combinations thereof into the processing chamber, with the hydrocarbon source having a volumetric flow rate to plasma initiating gas volumetric flow rate ratio of 1:2 or greater, generating a plasma in the processing chamber, and forming a conformal amorphous carbon layer on the substrate.

Abstract: A dielectric film, a method of manufacturing a dielectric film and a method of forming an air-gap. A method of manufacturing a low-k dielectric film may include introducing TMS and 3,3-dimethyl-1-butene into a plasma deposition reactor, polymerizing TMS and 3,3-dimethyl-1-butene using plasma generated in a reactor to deposit an insulation film over a substrate disposed in a reactor and/or subjecting a deposited insulation film to heat treatment concurrently with an inductively coupled plasma (ICP) process. A dielectric film may have a dielectric constant up to approximately 3. A method of forming an air-gap may include depositing a first insulation film over a surface of a patterned substrate, depositing a decahydronaphthalene layer over a portion of a first insulation film, subjecting a patterned substrate to a polishing process, forming a second insulation film, and/or subjecting a second insulation film to heat treatment concurrently with an ICP process.

Abstract: In accordance with the invention, a lateral dimension of a microscale device on a substrate is reduced or adjusted by the steps of providing the device with a soft or softened exposed surface; placing a guiding plate adjacent the soft or softened exposed surface; and pressing the guiding plate onto the exposed surface. Under pressure, the soft material flows laterally between the guiding plate and the substrate. Such pressure induced flow can reduce the lateral dimension of line spacing or the size of holes and increase the size of mesas. The same process also can repair defects such as line edge roughness and sloped sidewalls. This process will be referred to herein as pressed self-perfection by liquefaction or P-SPEL.

Abstract: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on a first exposed portion of the inorganic insulating layer; removing the organic resin layer; and coating a second exposed portion of the inorganic insulating layer with a composition containing conductive particles and baking, thereby forming a conductive layer.

Abstract: A method of forming a dual damascene pattern for a metal interconnection by a relatively simple process. Only a portion of an interlayer insulating film is initially etched when forming a via hole. When the interlayer insulating is etched to form a trench, the remaining portion of the via hole may be etched simultaneously.

Abstract: The major objective is to provide a fluorocarbon film wherein fine voids are formed by a step (SA1) for introducing a mixed gas containing a first carbon fluoride gas and a second carbon fluoride gas on a substrate placed inside a chamber, and depositing a fluorocarbon film on the substrate; and a step (SA2) for forming voids in the fluorocarbon film by selectively removing volatile components contained in the fluorocarbon film are included and especially in the step (SA2) for forming voids, it is preferable to include a step for cleaning the fluorocarbon film with a supercritical fluid.

Abstract: In accordance with the invention, a lateral dimension of a microscale device on a substrate is reduced or adjusted by the steps of providing the device with a soft or softened exposed surface; placing a guiding plate adjacent the soft or softened exposed surface; and pressing the guiding plate onto the exposed surface. Under pressure, the soft material flows laterally between the guiding plate and the substrate. Such pressure induced flow can reduce the lateral dimension of line spacing or the size of holes and increase the size of mesas. The same process also can repair defects such as line edge roughness and sloped sidewalls. This process will be referred to herein as pressed self-perfection by liquefaction or P-SPEL.

Abstract: It is an object of the present invention to provide an organic transistor having a low drive voltage. It is also another object of the present invention to provide an organic transistor, in which light emission can be obtained, which can be manufactured simply and easily. According to an organic light-emitting transistor, a composite layer containing an organic compound having a hole-transporting property and a metal oxide is used as part of the electrode that injects holes among source and drain electrodes, and a composite layer containing an organic compound having an electron-transporting property and an alkaline metal or an alkaline earth metal is used as part of the electrode that injects electrons, where either composite layer has a structure of being in contact with an organic semiconductor layer.

Abstract: A multi-functional cyclic siloxane compound (A), a siloxane-based (co)polymer prepared from the compound (A), or compound (A) and at least one of a Si monomer having organic bridges (B), an acyclic alkoxy silane monomer (C), and a linear siloxane monomer (D); and a process for preparing a dielectric film using the polymer. The siloxane compound of the present invention is highly reactive, so the polymer prepared from the compound is excellent in mechanical properties, thermal stability and crack resistance, and has a low dielectric constant resulting from compatibility with conventional pore-generating materials. Furthermore, a low content of carbon and high content of SiO2 enhance its applicability to the process of producing a semiconductor, wherein it finds great use as a dielectric film.

Abstract: A method of selectively attaching a capping agent to a Group IV semiconductor surface is disclosed. The method includes providing the Group IV semiconductor surface, the Group IV semiconductor surface including a set of covalently bonded Group IV semiconductor atoms and a set of surface boron atoms. The method also includes exposing the set of boron atoms to a set of capping agents, each capping agent of the set of capping agents having a central atom and a set of functional groups, wherein the central atom includes at least a lone pair of electrons; wherein a complex is formed between at least some surface boron atoms of the set of surface boron atoms and the central atom of at least some capping agents of the set of capping agents.

Abstract: A method for forming a photoresist layer is provided. The method includes following steps. A wafer is provided in a semiconductor machine. The wafer is spun at a first spin speed. A pre-wet solvent is dispensed on the spinning wafer by using a nozzle disposed at a fixed position. The pre-wet solvent then stops dispensing. The spin speed of the wafer is adjusted from the first spin speed to a second spin speed which is faster than the first spin speed. Thereafter, a photoresist layer is coated on the wafer.

Abstract: When a thin film transistor is manufactured by using a printing method, the precision of alignment between a first electrode and a second electrode becomes a problem. If it is manufactured by using photolithography, a photomask for each layer is necessary, resulting in the cost being increased. The essence of the present invention is that not only processing the gate shape is carried out over the substrate by using a resist pattern formed by exposing using a photo-mask for the gate pattern but also processing the source-drain electrodes is carried out by lifting-off. As a result, alignment between the source-drain electrode and the gate electrode is carried out.

Abstract: In a method for manufacturing a semiconductor device having a dual damascene structure, a semiconductor substrate formed by stacking a trench mask and a via hole resist mask on an insulating film is loaded into a processing chamber, and a via hole is formed by etching the insulating film through the via hole resist mask. Then, the via hole resist mask is removed by an ashing process and a protective film is formed on an underlayer of the insulating film; Thereafter, a trench is formed by etching the insulating film through the trench mask, and the semiconductor substrate is unloaded from the processing chamber after the via hole forming step, the resist mask removing step, the protective film forming step and the trench forming step are completed in the processing chamber.

Abstract: An organic semiconductor device is provided which includes an organic semiconductor layer and an insulating layer. The insulating layer is made of a cured material formed from a composition containing a resin and a crosslinking agent. The resin contains an organic resin having a hydroxyl group. The crosslinking agent contains a compound having at least two crosslinking groups. At least one of the crosslinking groups is a methylol group or an NH group. The composition contains the crosslinking agent in the range of 15 to 45 percent by weight relative to 100 parts by weight in total of the resin and the crosslinking agent.

Abstract: It is an object of the present invention to provide an organic transistor having a low drive voltage. It is also another object of the present invention to provide an organic transistor, in which light emission can be obtained, which can be manufactured simply and easily. According to an organic light-emitting transistor, a composite layer containing an organic compound having a hole-transporting property and a metal oxide is used as part of the electrode that injects holes among source and drain electrodes, and a composite layer containing an organic compound having an electron-transporting property and an alkaline metal or an alkaline earth metal is used as part of the electrode that injects electrons, where either composite layer has a structure of being in contact with an organic semiconductor layer.

Abstract: A semiconductor device includes a semiconductor substrate; a metal electrode wiring laminate on the semiconductor substrate, the metal electrode wiring laminate being patterned with a predetermined wiring pattern; the metal electrode wiring laminate including an undercoating barrier metal laminate and aluminum or aluminum alloy film on the undercoating barrier metal laminate; and organic passivation film covering the metal electrode wiring laminate, wherein the barrier metal laminate is a three-layered laminate including titanium films sandwiching a titanium nitride film. The semiconductor device according to the invention facilitates improving the moisture resistance of the portion of the barrier metal laminate exposed temporarily in the manufacturing process, facilitates employing only one passivation film, facilitates preventing the failures caused by cracks from occurring and the failures caused by Si nodules remaining in the aluminum alloy from increasing.

Abstract: Disclosed is a positive photosensitive resin composition containing (A) an alkali-soluble resin, (B) a diazoquinone compound, (d1) an activated silicon compound and (d2) an aluminum complex. Also disclosed is a positive photosensitive resin composition containing (A) an alkali-soluble resin, (B) a diazoquinone compound, (C) a compound having two or more oxetanyl groups in one molecule and (D) a catalyst for accelerating the ring-opening reaction of the oxetanyl groups of the compound (C).

Abstract: In one embodiment, the present invention includes a semiconductor package having a substrate with a first surface to support a semiconductor die. A second surface of the substrate includes compliant conductive pads to provide electrical connections to the semiconductor die. In this way, improved connection between the semiconductor package and a socket is provided. Other embodiments are described and claimed.

Abstract: Since sodium contained in glass, or glass itself has low heat resistance; a CPU fabricated using a TFT formed over a glass substrate or the like has not been obtained. In the case of operating a CPU with high-speed, the length of a gate (gate length) of a TFT is required to be shorter. However, since a glass substrate has large deflection, a gate electrode cannot have been etched to have a gate length short enough to be used for a CPU. According to the invention, a conductive film is formed over a crystalline semiconductor film formed over a glass substrate, a mask is formed over the conductive film, and the conductive film is etched by using the mask; thus, a thin film transistor with a gate length of 1.0 ?m or less is formed. In particular, the crystalline semiconductor film is formed by crystallizing an amorphous semiconductor film formed over a glass substrate by laser irradiation.

Abstract: A method for forming an interlayer insulating film of a semiconductor device comprises forming an active pattern over a substrate, forming a spin-on dielectric film over the substrate including the active pattern, and irradiating an electron beam over the spin on dielectric film to form an interlayer insulating film.

Abstract: A low dielectric material is produced by using a composition including a borazine ring-containing compound and a compound represented by the following formula as a solvent, and/or by annealing a composition comprising a borazine ring-containing compound under atmosphere of oxygen concentration not higher than 0.1 vol % at 200 to 600° C. In the following formula, Ra and Rc independently represent alkyl group or acyl group; Rb represents hydrogen atom or alkyl group; and n represents an integer of 1 to 5.

Abstract: A transistor is provided comprising: a substrate; a gate electrode; a semiconducting material not located between the substrate and the gate electrode; a source electrode in contact with the semiconducting material; a drain electrode in contact with the semiconducting material; and a dielectric material in contact with the gate electrode and the semiconducting material; wherein the semiconducting material comprises: 1-99.9% by weight of a polymer having a dielectric constant at 1 kHz of greater than 3.3; 0.1-99% by weight of a functionalized pentacene compound as described herein.

Abstract: The present invention provides metal-containing compounds that include at least one ?-diketiminate ligand, and methods of making and using the same. In certain embodiments, the metal-containing compounds include at least one ?-diketiminate ligand with at least one fluorine-containing organic group as substituent. In other certain embodiments, the metal-containing compounds include at least one ?-diketiminate ligand with at least one aliphatic group as a substituent selected to have greater degrees of freedom than the corresponding substituent in the ?-diketiminate ligands of certain metal-containing compounds known in the art. The compounds can be used to deposit metal-containing layers using vapor deposition methods. Vapor deposition systems including the compounds are also provided. Sources for ?-diketiminate ligands are also provided.

Abstract: A method forms a hydrocarbon-containing polymer film on a semiconductor substrate by a capacitively-coupled plasma CVD apparatus. The method includes the steps of: vaporizing a hydrocarbon-containing liquid monomer (C?H?X?, wherein ? and ? are natural numbers of 5 or more; ? is an integer including zero; X is O, N or F) having a boiling point of about 20° C. to about 350° C.; introducing the vaporized gas into a CVD reaction chamber inside which a substrate is placed; and forming a hydrocarbon-containing polymer film on the substrate by plasma polymerization of the gas. The liquid monomer is unsaturated and has no benzene structure.

Abstract: Methods of forming electrical interconnect structures include forming a dielectric layer on a semiconductor substrate and forming a hard mask layer on the dielectric layer. A photoresist layer is patterned on an upper surface of the hard mask layer. This patterned photoresist layer is used as an etching mask during a step to selectively etch the hard mask layer and define an opening therein. This opening exposes the first dielectric layer. The patterned photoresist layer is then stripped from the hard mask layer using an ashing process that exposes the upper surface of the hard mask layer. Following this ashing process, a portion of the first dielectric layer extending opposite the opening is selectively etched using the hard mask layer as an etching mask. During this selective etching step, polymer residues are accumulated directly on the upper surface of the hard mask layer.

Abstract: In one aspect, a method of forming a structure on a substrate is disclosed. For example, the method includes forming a first mask layer and a second mask layer, modifying a material property in regions of the first and second mask layers, and forming the structure based on the modified regions.

Abstract: A substrate processing method includes: performing an etching process to form a predetermined pattern on an etching-target film disposed on a substrate; denaturing a substance remaining after the etching process to be soluble in a predetermined liquid; then, performing a silylation process on a surface of the etching-target film having the pattern formed thereon; and then, supplying the predetermined liquid to dissolve and remove the denatured substance.

Abstract: Methods of modifying a patterned semiconductor substrate are presented including: providing a patterned semiconductor substrate surface including a dielectric region and a conductive region; and applying an amphiphilic surface modifier to the dielectric region to modify the dielectric region. In some embodiments, modifying the dielectric region includes modifying a wetting angle of the dielectric region. In some embodiments, modifying the wetting angle includes making a surface of the dielectric region hydrophilic. In some embodiments, methods further include applying an aqueous solution to the patterned semiconductor substrate surface. In some embodiments, the conductive region is selectively enhanced by the aqueous solution. In some embodiments, methods further include providing the dielectric region formed of a low-k dielectric material. In some embodiments, applying the amphiphilic surface modifier modifies an interaction of the low-k dielectric region with a subsequent process.