Abstract: It is an object to provide a liquid composition for forming a thin film, with which a ferroelectric thin film having excellent characteristics can be prepared even by baking at a low temperature, and a process for producing a ferroelectric thin film using it. The above object is achieved by use of a liquid composition for forming a ferroelectric thin film, characterized in that in a liquid medium, ferroelectric oxide particles being plate or needle crystals, which are represented by the formula ABO3 (wherein A is at least one member selected from the group consisting of Ba2+, Sr2+, Ca2+, Pb2+, La3+, K+ and Na+, and B is at least one member selected from the group consisting of Ti4+, Zr4+, Nb5+, Ta5+ and Fe3+) and have a Perovskite structure and which have an average primary particle size of at most 100 nm and an aspect ratio of at least 2, are dispersed, and a soluble metal compound which forms a ferroelectric oxide by heating, is dissolved.

Abstract: A method for fabricating a ferroelectric memory having memory cells arranged in arrays, wherein an Al2O3 film (2), a Pt film (3), a PZT film (4) and IrO2 film (5) are formed on an interlayer insulation film. At the time of forming a top electrode, the IrO2 film (5) is patterned using a resist mask having a part extending in the row direction, and then patterned using a resist mask having a part extending in the column direction. Consequently, a top electrode of the IrO2 film (5) having a rectangular plan view is formed at the intersection of these resist masks.

Abstract: A semiconductor memory is fabricated in the following manner. A tungsten plug is formed by burying metal material such as W into a contact hole formed in an inter-layer insulation film. Then, the inter-layer insulation film is etched back by a predetermined thickness so that the upper end portion of the tungsten plug protrudes. The Pt film, a ferroelectric film and another Pt film, which constitute the ferroelectric capacitor, are sequentially formed thereon. The Pt film, ferroelectric film and Pt film are patterned by batch etching, so as to form the ferroelectric capacitor having the ferroelectric film sandwiched by the platinum electrodes.

Abstract: A ferroelectric material for forming a ferroelectric that is described by a general formula ABO3, includes an A-site compensation component which compensates for a vacancy of an A site, and a B-site compensation component which compensates for a vacancy of a B site.

Abstract: A method of forming an integrated ferroelectric/CMOS structure which effectively separates incompatible high temperature deposition and annealing processes is provided. The method of the present invention includes separately forming a CMOS structure and a ferroelectric delivery wafer. These separate structures are then brought into contact with each and the ferroelectric film of the delivery wafer is bonded to the upper conductive electrode layer of the CMOS structure by using a low temperature anneal step. A portion of the delivery wafer is then removed providing an integrated FE/CMOS structure wherein the ferroelectric capacitor is formed on top of the CMOS structure. The capacitor is in contact with the transistor of the CMOS structure through all the wiring levels of the CMOS structure.

Abstract: A method of manufacturing a capacitor, including: forming a lower electrode on a substrate; forming a dielectric film of a ferroelectric or a piezoelectric on the lower electrode; forming an upper electrode on the dielectric film; and forming a silicon oxide film so that at least the dielectric film is covered with the silicon oxide film, the silicon oxide film being formed by using trimethoxysilane.

Abstract: A method for manufacturing a ferroelectric capacitor includes successively disposing a lower electrode, at least one intermediate electrode and an upper electrode over a base substrate, and providing ferroelectric films between the electrodes, respectively. In the step of forming the intermediate electrode, (a) a first metal film is formed by a sputter method over the ferroelectric film, and (b) a second metal film is formed by a vapor deposition method over the first metal film.

Abstract: Two ferroelectric capacitors including a PZT film are connected to one MOS transistor. Electrodes of the ferroelectric capacitor are arranged above a main plane of a substrate parallel to the main plane. Therefore, high capacity can be obtained easily. Furthermore, a (001) direction of the PZT film is parallel to the virtual straight line linking between the two electrodes. Therefore, a direction in which an electric field is applied coincides with a direction of a polarization axis, so that high electric charge amount of remanent polarization can be obtained.

Abstract: A ferromagnetic thin-film based digital memory having a substrate formed of a base supporting an electrically insulating material primary substrate layer in turn supporting a plurality of current control devices each having an interconnection arrangement with each of said plurality of current control devices being separated from one another by spacer material therebetween and being electrically interconnected with information storage and retrieval circuitry. A plurality of bit structures are each supported on and electrically connected to a said interconnection arrangement of a corresponding one of said plurality of current control devices and have magnetic material films in which a characteristic magnetic property is substantially maintained below an associated critical temperature above which such magnetic property is not maintained of which two are separated by at least one intermediate layer of a nonmagnetic material having two major surfaces on opposite sides thereof.

Abstract: In one embodiment, a plurality of bottom electrodes spaced apart from each other are formed on a lower insulating layer. A high-k dielectric layer and an upper conductive layer are sequentially and conformally formed overlying the bottom electrodes. The high-k dielectric layer and the upper conductive layer cover the bottom electrodes and the lower insulating layer between the bottom electrodes. A hard mask layer is selectively formed on the upper conductive layer to have an overhang over each of the bottom electrodes. Then the upper conductive layer is anisotropically etched using the hard mask layer as an etch mask, thereby forming upper electrodes spaced from each other. Therefore, a photolithography process of forming upper electrodes can be omitted, and damage to the upper electrodes due to etch can be prevented.

Abstract: A method of producing a ferroelectric capacitor includes preparing a semiconductor substrate having MOSFETs with an impurity diffused area in a memory cell area and a peripheral circuit area; forming a first interlayer insulating film on the semiconductor substrate; forming a conductive plug in the first interlayer insulating film to be electrically connected to the impurity diffused area; forming a second interlayer insulating film on the first interlayer insulating film; removing a portion of the second interlayer insulating film in the memory cell area to expose the first interlayer insulating film and the conductive plug; laminating a first conductive layer, a ferroelectric layer, and a second conductive layer sequentially on the first interlayer insulating film and the second interlayer insulating film to form a capacitor forming laminated film; forming an etching mask on the capacitor forming laminated film; and etching the capacitor forming laminated film to form a ferroelectric capacitor.

Abstract: Ferroelectric memory devices can be formed by polishing an insulating layer on a plurality of ferroelectric capacitors with a silica slurry to reduce a height of the insulating layer above a surface of the plurality of ferroelectric capacitors so that the surface remains covered by a portion of the insulating layer. The insulating layer can be further polished with a ceria slurry to further reduce the height of the insulating layer and to expose a polishing stop layer on the surface of the plurality of ferroelectric capacitors. Related devices are also disclosed.