Comprising Optoelectronic Devices, E.g., Led, Photodiodes (epo) Patents (Class 257/E25.032)
  • Patent number: 7358539
    Abstract: A flip chip light emitting diode die (12) includes a light-transmissive substrate (20) and a plurality of semiconductor layers (22) are disposed on the light-transmissive substrate (20). The semiconductor layers (22) define a light-generating p/n junction. An electrode (30) is formed on the semiconductor layers (22) for flip-chip bonding the diode die (12) to an associated mount (14). The electrode (30) includes an optically transparent layer (42) formed of a substantially optically transparent material adjacent to the semiconductor layers (22) that makes ohmic contact therewith, and a reflective layer (44) adjacent to the optically transparent layer (42) and in electrically conductive communication therewith.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: April 15, 2008
    Assignee: Lumination LLC
    Inventors: Hari S. Venugopalan, Ivan Eliashevich
  • Patent number: 7358599
    Abstract: An optical semiconductor device 1a includes a lead frame 4 having an aperture 7, a submount 8 disposed on one surface of the lead frame 4 to close the aperture 7, a semiconductor optical element 3 which has an optical portion 6 and which is mounted on a surface of the submount 8 opposite to a surface on a side of the aperture 7 with the optical portion 6 facing the aperture 7 through the submount 8, a molding portion 10 made of a non-transparent molding resin which exposes at least a region including the aperture 7 on the other surface side of the lead frame 4 and which encapsulates the lead frame 4, the semiconductor optical element 3 and the submount 8, and a lens 9 disposed on the other surface of the lead frame 4 to close the aperture 7.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: April 15, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Nobuyuki Ohe, Kazuhito Nagura
  • Patent number: 7355228
    Abstract: An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N? region formed within a P-type region. The N? region is formed from an implant of arsenic and an implant of phosphorus. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: April 8, 2008
    Assignee: OmniVision Technologies, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7354789
    Abstract: CMOS image sensor and method for fabricating the same, the CMOS image sensor including a second conductive type semiconductor substrate having an active region and a device isolation region defined therein, wherein the active region has a photodiode region and a transistor region defined therein, a device isolating film in the semiconductor substrate of the device isolation region, a first conductive type impurity region in the semiconductor substrate of the photodiode region, the first conductive type impurity region being spaced a distance from the device isolation film, and a second conductive type first impurity region in the semiconductor substrate between the first conductive type impurity region and the device isolation film, thereby reducing generation of a darkcurrent at an interface between the photodiode region and a field region.
    Type: Grant
    Filed: November 4, 2004
    Date of Patent: April 8, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Chang Hun Han
  • Patent number: 7355264
    Abstract: The specification describes flip bonded dual substrate inductors wherein a portion of the inductor is constructed on a base IPD substrate, a mating portion of the inductor is constructed on a cover (second) substrate. The cover substrate is then flip bonded to the base substrate, thus mating the two portions of the inductor. Using this approach, a two level inductor can be constructed without using a multilevel substrate. Using two two-level substrates yields a four-level flip bonded dual substrate inductor.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: April 8, 2008
    Assignee: Sychip Inc.
    Inventors: Yinon Degani, Yinchao Chen, Yu Fan, Charley Chunlei Gao, Kunquan Sun, Liquo Sun
  • Patent number: 7352010
    Abstract: A photoelectric conversion module with a cooling function has a semiconductor element to transmit/receive an optical signal, a stem to fix the semiconductor element, a cap to cover the semiconductor element, and a lead to apply an electrical signal to the semiconductor element or to transmit an electrical signal from the semiconductor element, wherein on the stem, there is provided a heat releasing device formed of a peltiert element, and a thermal conduction member for heat absorption and a thermal conduction member for heat release provided respectively on both sides of the peltiert element, and the semiconductor element is directly disposed on the thermal conduction member for heat absorption.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: April 1, 2008
    Assignee: Hitachi Cable, Ltd.
    Inventors: Juhyun Yu, Yoshiaki Ishigami, Yoshinori Sunaga, Akihiro Hiruta
  • Patent number: 7352068
    Abstract: A multi-chip module is provided which allows memory space extension to improve function and performance. A first semiconductor chip is mounted on a mounting substrate, and a first semiconductor memory chip is mounted over the first semiconductor chip. A second semiconductor memory chip having the same circuitry and the same memory capacity as the first semiconductor memory chip is mounted on a spacer formed on the first memory chip in the same direction as the first semiconductor memory chip. An electrode is independently formed corresponding to a bonding pad to which a selective signal of the first semiconductor memory chip and the second semiconductor memory chip is supplied. A plurality of electrodes are formed in common corresponding to a plurality of bonding pads to which the same signal is respectively supplied except for the selective signal.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: April 1, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Hiroshi Kuroda, Makoto Tetsuka
  • Patent number: 7348604
    Abstract: The light-emitting module according to the present invention comprises a heat dissipation element, a substrate for example a metal core printed circuit board (MCPCB), or FR4 board which is coupled to one or more light-emitting elements and provides a means for operative connection of the light-emitting elements to a source of power. The substrate is positioned such that it is thermally coupled to the heat dissipation element. The light-emitting module further comprises a housing element which matingly connects with the heat dissipation element, wherein the housing element may further comprise an optical element integrated therein for manipulation of the light generated by the one or more light-emitting elements.
    Type: Grant
    Filed: May 19, 2006
    Date of Patent: March 25, 2008
    Assignee: TIR Technology LP
    Inventor: George E. Matheson
  • Patent number: 7344967
    Abstract: In a semiconductor light-emitting device, a buffer layer, a un-doped GaN layer, a high carrier concentration n+-layer, an n-type layer, an emission layer, a p-type layer, and a p-type contact layer are deposited in sequence on a sapphire substrate. The semiconductor light-emitting device includes a light-transparent electrode made of indium tin oxide (ITO) which is deposited in the low pressure vacuum chamber flowing at least oxygen gas through electron beam deposition or ion plating treatment, and a thermal process is carried out.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: March 18, 2008
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Kazuhiro Yoshida, Yukitaka Hasegawa, Koji Kaga
  • Patent number: 7342255
    Abstract: A high-brightness light-emitting diode is disclosed. The high-brightness light-emitting diode, comprises: a chip; a base for holding the chip; and a transparent layer for covering the chip, wherein the chip is connected to an electrode by a metal wire. The improvement comprises an adhesive injection hole formed on the transparent layer for injecting a layer of fluorescent-powdered adhesive into it, thereby providing the light-emitting diode with the advantages such as good light collection and uniform light shape.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: March 11, 2008
    Assignee: Para Light Electronics Co., Ltd.
    Inventors: Huei-Tso Lin, Ching-Yuan Lin
  • Patent number: 7335922
    Abstract: A radiation-emitting-and-receiving semiconductor component has at least a first semiconductor layer construction (1) for emitting radiation and a second semiconductor layer construction (2) for receiving radiation, which are arranged in a manner spaced apart from one another on a common substrate (3) and have at least one first contact layer (4). The first semiconductor layer construction (1) has an electromagnetic-radiation-generating region (5) arranged between p-conducting semiconductor layers (6) and n-conducting semiconductor layers (7) of the first semiconductor layer construction (1). A second contact layer (8) is at least partially arranged on that surface of the first semiconductor layer construction (1) which is remote from the substrate (3) and that of the second semiconductor layer construction (2).
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: February 26, 2008
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Glenn-Yves Plaine, Tony Albrecht, Peter Brick, Marc Philippens
  • Patent number: 7319246
    Abstract: A lighting apparatus comprising at least one light emitting diode is disposed on an interconnect board to emit ultraviolet or blue radiation. A polymeric layer including a luminophor is disposed about the lighting apparatus to convert at least a portion of the radiation emitted from the LED into visible light. The polymeric layer is shrinkable to conform to a shape enclosing the light emitting diode.
    Type: Grant
    Filed: June 23, 2005
    Date of Patent: January 15, 2008
    Assignee: Lumination LLC
    Inventors: Thomas F. Soules, Chen-Lun Hsing Chen, Emil Radkov
  • Patent number: 7317218
    Abstract: A solid-state imaging device can increase the amount of signal charge accumulation in a photodiode. The solid-state imaging device includes a gate electrode formed on a p-type semiconductor substrate. An n-type signal accumulation region accumulates the signal charge obtained through a photo-electrical conversion, and is formed in the semiconductor substrate so that a portion of the signal accumulation region is positioned below the gate electrode. An n-type drain region is positioned in the semiconductor substrate so that the n-type drain region is positioned opposite the signal accumulation region across the gate electrode. A p-type punch-through stopper region has a higher impurity concentration than the semiconductor substrate, and is formed in the semiconductor substrate so that the p-type punch-through region is positioned below the drain region, wherein an end of the punch-through stopper region is positioned closer to the signal accumulation region than the end of the drain region.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: January 8, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Syouji Tanaka, Ryohei Miyagawa, Kazunari Koga, Tatsuya Hirata, Hiroki Nagasaki
  • Patent number: 7312520
    Abstract: An interface module for connecting LSI packages includes a connecting member which is to be mounted on an LSI package including an LSI chip and which includes lines to be electrically connected to the LSI package, an optoelectronic transducer which is mounted on the connecting member, which is connected to the lines of the connecting member, and which converts optical signal to electric signal or converts electric signal to optical signal, an optical waveguide which includes an optical input end and an optical output end, one of which is optically connected to the optoelectronic transducer, and a reinforcing film which is adhered to the optical waveguide, covering at least one side of the optical waveguide, and which is secured at one end to the connecting member.
    Type: Grant
    Filed: September 23, 2005
    Date of Patent: December 25, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideto Furuyama, Hiroshi Hamasaki
  • Patent number: 7306959
    Abstract: This disclosure concerns methods for fabrication of integrated high speed optoelectronic devices. In one example of such a method, a device region that includes a top surface and a bottom surface is formed on a top surface of a substrate. The device region may take the form of an optical emitter, such as a VCSEL, or a detector, such as a photodiode. Next, an isolation region is formed that is configured such that the device region is surrounded by the isolation region. A superstrate is then disposed on the top surface of the device region. Finally, a micro-optical device, such as a lens, is placed on a top surface of the superstrate.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: December 11, 2007
    Assignee: Finisar Corporation
    Inventor: Yue Liu
  • Patent number: 7307285
    Abstract: An optical semiconductor device includes a first set of lead frames having a first set of element mounting beds, a second set of lead frames having a second set of element mounting beds, which are arranged substantially on a same plane as the first set of element mounting beds. A light-emitting element is mounted on one of the first set of element mounting beds and having a pair of electrodes connected to the first set of lead frames respectively. A light-receiving element is arranged at a position facing to the light-emitting element and having a pair of electrodes connected to the second set of lead frames respectively. A supporting means is mounted on the second set of element mounting beds for supporting the light-receiving element at the position facing to the light-emitting element and for receiving a light emitted from the light-emitting element.
    Type: Grant
    Filed: December 22, 2006
    Date of Patent: December 11, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshio Noguchi
  • Patent number: 7301214
    Abstract: In the component of a radiation detector, an upper end face of a pad formation protrusion provided on an upper surface of an MID substrate is equal in height to an upper surface of a photodiode array, first pads are provided on upper surfaces of photodiodes arranged in the photodiode array, respectively, second pads are provided on the upper end face of the pad formation protrusion, a bonding wire is provided between one of the first pads and corresponding one of the second pads, a wiring pattern is provided on the upper surface of the MID substrate, first terminals as many as the second pads and one second terminal are provided on a lower surface of the MID substrate, the second pads and the first terminals are electrically connected to one another in a one-to-one correspondence, and the wiring pattern is electrically connected to the second terminal.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: November 27, 2007
    Assignee: Nihon Kessho Kogaku Co., Ltd.
    Inventors: Shigenori Sekine, Toshikazu Yanada
  • Patent number: 7301176
    Abstract: A semiconductor light emitting device includes an LED element, a lead frame on which the LED is mounted, a lead frame electrically connected to the LED element via a wire, transparent resin formed on the LED element and on the lead frames, and light shielding resin having a reflectance higher than the reflectance of the transparent resin, surrounding the perimeter of the LED. The transparent resin includes a lens portion constituting a lens on the LED, and a holding portion holding the lead frame.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: November 27, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Munezo Abe, Toshihiko Yoshida
  • Patent number: 7294519
    Abstract: Provided are a semiconductor light-emitting device having nano-needles and a method of manufacturing the same. The provided semiconductor light-emitting device improves the extraction efficiency of photons, and includes a gallium nitride (GaN) group multi-layer and nano-needles grown on the GaN group multi-layer. The nano-needles improve the extraction efficiency of photons.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: November 13, 2007
    Assignee: Luxpia Co., Ltd.
    Inventors: Jong Soo Lee, Min Sang Lee, Young Ki Lee
  • Patent number: 7282430
    Abstract: The present invention provides methods and apparatus for melt-based patterning for electronic devices. It employs and provides processes and apparatus for fabricating an electronic device having a pattern formed on a surface by a deposition material. Further, the invention a process for fabricating semiconductors, organic light-emitting devices (OLEDs), field-effect transistors, and in particular high-resolution patterning for RGB displays. A process for fabricating an organic electronic device includes the steps of heating and applying a pressure to the deposition material to form a melt, and depositing the melted deposition material on the surface with a phase-change printing technique or a spray technique. The melted deposition material solidifies on the surface.
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: October 16, 2007
    Assignee: International Business Machines Corporation
    Inventors: Siegfried F. Karg, Heike E. Riel, Walter H. Riess
  • Patent number: 7279715
    Abstract: An organic electroluminescent device includes first and second substrates attached by a seal pattern, array elements including a plurality of thin film transistors formed on the first substrate, a first electrode formed on a rear surface of the second substrate, a plurality of electrode separators formed on the rear surface of the first electrode, wherein the plurality of electrode separators is made of an insulating material defining sub-pixel regions that correspond to each thin film transistor, an organic electroluminescent layer formed on a rear surface of the first electrode in each of the sub-pixel regions, a second electrode formed on a rear surface of the organic electroluminescent layer in each of sub-pixel regions, a conductive connector formed between the first and second substrates in each sub-pixel region for connecting to the second electrode of a sub-pixel region.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: October 9, 2007
    Assignee: LG.Philips LCD Co., Ltd.
    Inventors: Jae Yong Park, Ock Hee Kim, Choong Keun Yoo, Nam Yang Lee, Kwan Soo Kim
  • Patent number: 7271461
    Abstract: An optoelectronics chip-to-chip interconnects system is provided, including packaged chips to be connected on printed-circuit-board (PCB), multiple-packaged chip, optical-electrical(O-E) conversion means, waveguide-board, and PCB. Single to multiple chips interconnects can be possible using this technique. The packaged-chip includes semiconductor-die and its package based on the ball-grid array or chip-scale-package. The O-E board includes the optoelectronics components and multiple electrical contacts. The waveguide board includes electrical conductors transferring signal from O-E board to PCB and the flex optical waveguide easily stackable onto the PCB, to guide optical signal from one chip-to-other chip. The chip-to-chip interconnects system is pin-free and compatible with the PCB. The main advantages are that standard packaged-chip and conventional PCB technology can be used for low speed electrical signal connection.
    Type: Grant
    Filed: February 26, 2005
    Date of Patent: September 18, 2007
    Assignee: Banpil Photonics
    Inventor: Achyut Kumar Dutta
  • Publication number: 20070210323
    Abstract: A method of forming an electroluminescent device including the steps of providing a substrate including a first electrode for injection of charge carriers of a first type, forming a semiconductor region by depositing over the substrate a composition containing a first material for transporting charge carriers of the first type and a second material for emission and transporting charge carriers of the first type, and depositing over the semiconducting region a second electrode for injection of charge carriers of a second type.
    Type: Application
    Filed: November 19, 2004
    Publication date: September 13, 2007
    Applicant: CAMBRIDGE DISPLAY TECHNOLOGY LIMITED
    Inventors: Jonathan Halls, Matthew Roberts, Nalinkumar Patel
  • Patent number: 7268010
    Abstract: The present invention related to a method of manufacturing an LED, including the steps of: first, forming a tape coppery metal strip; then, continuously pressing circuits on the tape coppery metal strip so as to form a carrier having circuit patterns of electric contacts on which the diode dies can be placed; next, electroplating a plurality of metal layers on the surface of the carrier; then, performing continuous injection molding on the carrier so as to form a protector having a designated shape; and curing and fixing the diode die on the carrier to connect to the terminal contact of the carrier via metal wire. A conductive or non-conductive adhesive is dropped onto the bonding position between the metal wire and the terminal of the carrier, and a soft paste is Anther applied to cover the diode die, the metal wire and the terminal.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: September 11, 2007
    Assignee: Kingbright Electronic Co., Ltd.
    Inventor: Wen Joe Song
  • Patent number: 7256436
    Abstract: In a thin-film field-effect transistor having a MIS structure, the insulator layer is formed of cyanoethylated dihydroxypropyl pullulan. The TFT is prepared by applying a cyanoethylated dihydroxypropyl pullulan solution onto a gate electrode in the form of a metal layer, drying the applied solution to form an insulator layer, and thereafter, forming a semiconductor layer thereon.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: August 14, 2007
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Ikuo Fukui
  • Patent number: 7256483
    Abstract: LED epitaxial layers (n-type, p-type, and active layers) are grown on a substrate. For each die, the n and p layers are electrically bonded to a package substrate that extends beyond the boundaries of the LED die such that the LED layers are between the package substrate and the growth substrate. The package substrate provides electrical contacts and conductors leading to solderable package connections. The growth substrate is then removed. Because the delicate LED layers were bonded to the package substrate while attached to the growth substrate, no intermediate support substrate for the LED layers is needed. The relatively thick LED epitaxial layer that was adjacent the removed growth substrate is then thinned and its top surface processed to incorporate light extraction features.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: August 14, 2007
    Assignee: Philips Lumileds Lighting Company, LLC
    Inventors: John Epler, Paul S. Martin, Michael R. Krames
  • Patent number: 7242030
    Abstract: A quantum dot/quantum well light emitting diode (LED) is provided with a LED at one side of a substrate, and a second light emitting layer and a third light emitting layer at the other side of the substrate. When a proper forward bias is applied to the LED to emit a first light by the first light emitting layer, the first light is used to excite the second light emitting layer and the third light emitting layer to generate the second light output and the third light output of different colors respectively. Then, the light output of a desired color can be generated by mixing the first light, the second light and the third light.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: July 10, 2007
    Assignee: Industrial Technology Research Institute
    Inventors: Te-Chung Wang, Jung-Tsung Hsu, Chang-Cheng Chuo, Ching-En Tsai, Chih-Ming Lai
  • Patent number: 7230289
    Abstract: The MOS type solid-state imaging device has plural pixels each of which comprises a photo-diode and a MOS transistor on a substrate. A gate electrode is formed on the channel dope layer formed in the surface of the p-type well layer. By ion implantation of n-type impurity ions via the gate electrode as the mask, the n-type source region and the drain region are formed in the region corresponding to the MOS transistor, and the n-type impurity region is also formed in the region corresponding to the photo-diode. In the well layer, a high impurity density region as a hole pocket is self-aligned to the gate electrode.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: June 12, 2007
    Assignee: Innotech Corporation
    Inventor: Hirofumi Komori
  • Patent number: 7223998
    Abstract: A white, single or multi-color light emitting diode (LED) includes a mirror for reflecting photons within the LED; a first active region, adjacent the mirror, including one or more current-injected layers for emitting photons when electrically biased in a forward direction; a second active region, adjacent the first active region, including one or more optically-pumped layers for emitting photons, wherein the optically-pumped layers are optically excited by the photons emitted by the current-injected layers, thereby recycling guided modes; and an output interface, adjacent the second active region, for allowing the photons emitted by the optically-pumped layers to escape the LED as emitted light.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: May 29, 2007
    Assignee: The Regents of the University of California
    Inventors: Carole Schwach, Claude Charles Aime Weisbuch, Steven P. DenBaars, Henri Benisty, Shuji Nakamura
  • Patent number: 7221044
    Abstract: A single-chip integrated LED particularly adapted for direct use with a high voltage DC or AC power sources comprises a plurality of electrically isolated LEDs on a generally transparent substrate and bonded to electrically conductive elements on a thermally conductive mount. A reflective coating may be applied to the area between LEDs.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: May 22, 2007
    Assignee: AC LED Lighting, L.L.C.
    Inventors: Zhaoyang Fan, Hongxing Jiang, Jingyu Lin
  • Patent number: 7217953
    Abstract: A passive mechanism suppresses injection, into any active guard regions interposed between the edge of a photodiode array chip and the outer photodiode pixels or into the outer pixels themselves, of minority carrier current generated in the physically disrupted region at the edge of the semiconductor die created by cleaving, sawing or otherwise separating the chip from the remainder of the wafer on which the die was fabricated. A thin metallic layer covers all or part of the edge region, thereby creating a Schottky barrier. This barrier generates a depletion region in the adjacent semiconductor material. The depletion region inherently creates an energy band distribution which preferentially accelerates minority carriers generated or near the metal-semiconductor interface towards the metal, thereby suppressing collection of these carriers by any active regions of the guard structure or by the photodiode pixels.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: May 15, 2007
    Assignee: Digirad Corporation
    Inventor: Lars S. Carlson
  • Patent number: 7213977
    Abstract: An optical module with a CAN package contains a stem and a lead. The stem has a hole penetrating the stem and an inner cylindrical surface surrounding the hole. The lead extends through the hole such that a gap exists between the lead and the inner cylindrical surface. The gap contains first and second portions which are arranged along the longitudinal direction of the hole. The first portion is filled with sealing material which is dielectric. The second portion is filled with air.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: May 8, 2007
    Assignee: NEC Corporation
    Inventor: Kazuhiro Mitamura
  • Patent number: 7205574
    Abstract: An integral-detem-type optical semiconductor device employing lead frame(s) 11, shield case region(s) 111 created by bending portion(s) of lead frame(s) 11 extending to the exterior being disposed between light-emitting lens portion(s) 19 and light-receiving lens portion(s) 18 of resin package(s) 17 produced as a result of encapsulation by translucent resin(s).
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: April 17, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junji Oka, Toshiyuki Ichinose
  • Patent number: 7195948
    Abstract: A method for fabricating a semiconductor device, comprising the steps of: forming an element on a silicon substrate; packaging the element; and annealing the packaged element before its transportation or long-term storage.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: March 27, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tsutomu Ashida
  • Publication number: 20070065079
    Abstract: An optical module with a CAN package contains a stem and a lead. The stem has a hole penetrating the stem and an inner cylindrical surface surrounding the hole. The lead extends through the hole such that a gap exists between the lead and the inner cylindrical surface. The gap contains first and second portions which are arranged along the longitudinal direction of the hole. The first portion is filled with sealing material which is dielectric. The second portion is filled with air.
    Type: Application
    Filed: September 21, 2006
    Publication date: March 22, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Kazuhiro Mitamura
  • Patent number: 7192797
    Abstract: A flip-chip LED including a light emitting structure, a first dielectric layer, a first metal layer, a second metal layer, and a second dielectric layer is provided. The light emitting structure includes a first conductive layer, an active layer, and a second conductive layer. The active layer is disposed on the first conductive layer, and the second conductive layer is disposed on the active layer. The first metal layer is disposed on the light emitting structure and is contact with the first conductive layer, and part of the first metal layer is disposed on the first dielectric layer. The second metal layer is disposed on the light emitting structure and is in contact with the second conductive layer, and part of the second metal layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the first dielectric layer.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: March 20, 2007
    Assignee: Epistar Corporation
    Inventors: Chuan-Cheng Tu, Jen-Chau Wu, Yuh-Ren Shieh
  • Patent number: 7166870
    Abstract: Light-emitting devices, and related components, systems and methods are disclosed.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: January 23, 2007
    Assignee: Luminus Devices, Inc.
    Inventors: Alexei A. Erchak, Eleftrios Lidorikis, Chiyan Luo
  • Patent number: 7164164
    Abstract: A display device has display elements provided inside of pixels, each being formed in vicinity of intersections of signal lines and scanning lines aligned in matrix form; and photoelectric conversion elements, wherein each of the photoelectric conversion elements includes first, second and third semiconductor regions disposed adjacently in sequence in parallel to a surface of a substrate; a first electrode connected to the first semiconductor region; and a second electrode connected to the third semiconductor region, the first semiconductor region being formed by injecting a first conductive impurity in first dose amount; the third semiconductor region being formed by injecting a second conductive impurity in second dose amount; and the second semiconductor region being formed by injecting the first conductive impurity in third dose amount less than the first dose amount.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: January 16, 2007
    Assignee: Toshiba Matsushita Display Technology Co., Ltd.
    Inventors: Takashi Nakamura, Norio Tada, Masahiro Tada
  • Patent number: 7161187
    Abstract: A light emitting diode has a substrate having a heat radiation conductive member therein, and a light emitting element mounted on the substrate. At least a part of the light emitting element is directly brought into contact and electrically connected with the heat radiation conductive member.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: January 9, 2007
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshinobu Suehiro, Hideaki Kato, Kunihiro Hadame
  • Patent number: 7148567
    Abstract: A semiconductor integrated circuit device has two semiconductor integrated circuit chips (20 and 30) respectively provided with a plurality of PADs (40a–40e, 41a–41e and 42a–42d), a plurality of LEADs (50a–50d) disposed around arrays of the semiconductor integrated circuit chips, and a plurality of bonding wires (60a–60e and 61a–61d). The plurality of bonding wires are connected so as not to straddle one semiconductor integrated circuit chip (30) and allow wiring between the PADs (40a–40e) of the other semiconductor integrated circuit chip (20) and the LEADs (50a–50d).
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: December 12, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Yasuo Moriguchi, Shintaro Mori, Fumihiko Terayama, Hirokazu Komoriya
  • Patent number: 7148517
    Abstract: A light emitting diode and a method of the same are provided. The light emitting diode includes a light-emitting structure, a silicon substrate and a bonding layer. The light-emitting structure includes two semiconductor layers of different doped types. The light-emitting structure is capable of emitting light when a current passes through. The silicon substrate includes two zones of different doped types. The bonding layer is interposed between the light-emitting structure and the silicon substrate so that the semiconductor layer and the zone closest to the bonding layer are of different doped types.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: December 12, 2006
    Assignee: Epistar Corporation
    Inventors: Chung-Cheng Tu, Jin-Ywan Lin
  • Patent number: 7145183
    Abstract: The invention is directed to a vertically emitting laser and a method of manufacturing such a laser having a current aperture and a semiconductor relief. The semiconductor relief and the current aperture are defined in the same processing operation, thereby causing the semiconductor relief and the current aperture to be substantially self-aligned with respect to one another. In addition, such processing results in an area ratio of the semiconductor relief and the current aperture to be substantially self-scaling with respect to processing variations.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: December 5, 2006
    Assignee: Infineon Technologies AG
    Inventor: Daniel Supper
  • Patent number: 7132308
    Abstract: An organic electroluminescent display device includes first and second substrates facing and spaced apart from each other, the first and second substrates having a plurality of sub-pixel regions, a thin film transistor provided at each of the plurality of sub-pixel regions on an inner surface of the first substrate, a first electrode on an inner surface of the second substrate, an organic electroluminescent layer on the first electrode, a second electrode on the organic electroluminescent layer at each of the plurality of sub-pixel regions, and a connection pattern contacting the thin film transistor and the second electrode, wherein a melting temperature of the connection pattern is lower than a melting temperature of the second electrode.
    Type: Grant
    Filed: May 3, 2005
    Date of Patent: November 7, 2006
    Assignee: LG.Philips LCD Co., Ltd.
    Inventors: Jae-Yong Park, Choong-Keun Yoo, Ock-Hee Kim, Nam-Yang Lee, Kwan-Soo Kim
  • Publication number: 20060243981
    Abstract: The invention relates to a dual masked spacer etch for improved dark current performance in imagers. After deposition of spacer material such as oxide, N-channel regions are first opened for N+ source/drain implant and P-channel regions are then opened for P+ source/drain implant. Prior to the N+ source/drain implant, the wafer receives a patterned first spacer etch. During this first spacer etch, the photosensor region is covered with resist. Prior to the P+ source/drain implant, a masked second spacer etch is performed. Again the photosensor region is protected with photoresist. In such a manner, spacers are formed on the gates of both the N-channel and P-channel transistors but in the photodiode region the spacer insulator remains.
    Type: Application
    Filed: June 29, 2006
    Publication date: November 2, 2006
    Inventor: Howard Rhodes
  • Patent number: 7129529
    Abstract: The light emitting module includes a substrate, a light emitting element and a driving circuit chip. The light emitting element is attached to the substrate and has a plurality of first contacts on a top surface thereof. The driving circuit chip is attached onto the substrate and has a plurality of second contacts in direct connection to the first contacts one on one when being placed above the light emitting element.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: October 31, 2006
    Assignee: Neostones MicroFabrication Corporation
    Inventors: Ming-Che Wu, Wen-Hsiung Yu, Mao-Jen Wu
  • Patent number: 7115979
    Abstract: An LED package in which an LED chip a body has a cup part housing an LED chip. The cup part has a step formed in the outer circumference of the top thereof. A lens is mounted on the cup part, and has a flange extended downward from the outer circumference of the lens along the outside wall of the cup part to form a gap between the flange and the downward step of the cup part and to seal the gap from the outside. Resin material fills a space formed between the underside of the lens and the cup part and at least partially the gap formed between the step of the cup part and the lens flange. The resin material is prevented from leaking out of the LED package. The LED package of the invention prevents the creation of voids in the resin material surrounding the LED chip or the leakage of the resin material to the outside.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: October 3, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jung Kyu Park, Young Sam Park
  • Patent number: 7115962
    Abstract: In a process for producing a ceramic housing (1), first of all a ceramic base body (4) comprising a ceramic base (2) and side parts (3) is produced. Then, a metal frame (7) is placed onto the ceramic base body (4) and a window (11) is soldered onto a side opening (6). After a photoactive semiconductor chip has been introduced into the ceramic base body (4), the ceramic housing (1) is closed off using a metal cover (12).
    Type: Grant
    Filed: May 23, 2002
    Date of Patent: October 3, 2006
    Assignee: Osram Opto Semiconductors GmbH
    Inventor: Stefan Grötsch
  • Patent number: 7115911
    Abstract: An LED module and method of packing the same are provided. The LED module includes a substrate with at least one cavity therein, at least one LED unit positioned on portions of the substrate in the cavity, a circuit positioned above the LED unit and electrically connected to the LED unit, and a first capsulation material filling within the cavity.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: October 3, 2006
    Assignee: Lighthouse Technology Co., LTD
    Inventors: Chih-Chin Chang, Teng-Huei Huang, Chien-Lung Lee
  • Publication number: 20060214174
    Abstract: The present invention has been made to reduce manufacturing cost of a liquid crystal display apparatus. The present invention provides a backlight apparatus including an LED chip substrate on which a plurality of red-LED (Light Emitting Diode) chips that emit red light, green-LED chips that emit green light, and blue-LED chips that emit blue light are arranged in a given manner, a diffusion section that is provided above the LED chip substrate and diffuses respective color lights emitted from the LED chips, a light amount detection section that detects the amount of the light emitted from the LED chip substrate, and an adjustment section that adjusts the amount of the current to be supplied to the LED chip substrate based on the light amount detected by the light amount detection section.
    Type: Application
    Filed: February 21, 2006
    Publication date: September 28, 2006
    Inventors: Toshiaki Shirakuma, Masami Okita
  • Patent number: RE39628
    Abstract: A stackable flex circuit IC package includes a flex circuit comprised of a flexible base with a conductive pattern thereon, and wrapped around at least one end portion of a frame so as to expose the conductive pattern at the edge portion. An IC device is mounted within a central aperture in the frame, and is electrically coupled to the conductive pattern. The IC device is sealed in place within the frame with epoxy. A stack of the IC packages is assembled by disposing a conductive epoxy of anisotropic material between the conductive patterns at the edge portions of adjacent IC packages. Application of pressure in a vertical or Z-axis direction between adjacent IC packages completes electrical connections between the individual conductors of the conductive patterns of adjacent IC packages to interconnect the IC packages of the stack, while at the same time maintaining electrical isolation between adjacent conductors within each of the conductive patterns.
    Type: Grant
    Filed: July 27, 2004
    Date of Patent: May 15, 2007
    Assignee: Stakick Group, L.P.
    Inventor: Harlan R. Isaak