Abstract: A semiconductor device includes: an insulating substrate; a stepwise layer arranged on the insulating substrate and having an end portion whose inclination angle is equal to or greater than 60°; an insulating layer formed on the insulating substrate and the stepwise layer so as to be elevated on the stepwise layer; a first semiconductor layer arranged at a portion adjacent to the elevated insulating layer; and a second semiconductor layer structured with a material identical to that of the first semiconductor layer, and formed in an island shape on the elevated insulating layer.

Abstract: There is provided a method for manufacturing a flexible semiconductor device characterized by comprising (i) a step of forming an insulating film on the upper surface of metal foil, (ii) a step of forming an extraction electrode pattern on the upper surface of the metal foil, (iii) a step of forming a semiconductor layer on the insulating film in such a manner that the semiconductor layer is in contact with the extraction electrode pattern, (iv) a step of forming a sealing resin layer on the upper surface of the metal foil in such a manner that the sealing resin layer covers the semiconductor layer and the extraction electrode pattern, and (v) a step of forming electrodes by etching the metal foil, wherein the metal foil is used as a support for the insulating film, the extraction electrode pattern, the semiconductor layer, and the sealing resin layer formed in (i) to (iv) and used as a constituent material for the electrodes in (v).

Abstract: A finFET field effect transistor is produced by the formation of an electrical junction between the thin fin portion of semiconductor material which forms the channel of the transistor and the circuit substrate. Doping particles are implanted in the substrate through a mask which is then subsequently used to form the thin fin portion of the channel. The channel of the finFET transistor is thus electrically insulated from the circuit substrate in the same manner as in MOS integrated circuits realized from bulk silicon substrates.

Abstract: Methods of producing high uniformity in thin film transistor devices fabricated on laterally crystallized thin films are described. A thin film transistor (TFT) includes a channel area disposed in a crystalline substrate, which has grain boundaries that are approximately parallel with each other and are spaced apart with approximately equal spacings. The shape of the channel area includes a non-equiangular polygon that has two opposing side edges that are oriented substantially perpendicular to the grain boundaries. The polygon further has an upper edge and a lower edge. At least a portion of each of the upper and lower edges is oriented at a tilt angle with respect to the grain boundaries. The tilt angles are selected such that the number of grain boundaries covered by the polygon is independent of the location of the channel area within the crystalline substrate.

Abstract: A thin film semiconductor device formed as integrated circuits on an insulating substrate with bottom gate type thin film transistors stacked with gate electrodes, a gate insulating film and a semiconductor thin film in the order from below upward. The gate electrodes comprise metallic materials with thickness less than 100 nm. The gate insulating film has a thickness thicker than the gate electrodes. The semiconductor thin film comprises polycrystalline silicon crystallized by a laser beam. By reducing thickness of metallic gate electrodes, thermal capacity becomes small and difference in thermal condition on the metallic gate electrodes and on the insulating substrate made of glass or the like becomes small. This invention relates to the task of uniforming and optimizing recrystallization by a laser anneal treatment provided for the semiconductor thin film which works as an active layer of the bottom gate type thin film transistors.

Abstract: A control substrate comprising: a substrate main body; a base layer provided on one surface perpendicular to a thickness direction of the substrate main body; and a switching element provided on the base layer's surface located on the opposite side to the substrate main body, so as to perform switching between an electric connection and an electric disconnection, wherein the switching element comprises an electrode formed on the surface of the base layer by an application method, the surface being opposite to the substrate main body, and the base layer is formed of a member whose adhesiveness to the electrode is higher than the adhesiveness of the substrate main body to an electrode when forming the electrode on a base layer side surface of the substrate main body by an application method.

Abstract: A method of forming a localized SOI structure in a substrate (10) wherein a trench (18) is formed in the substrate, and a dielectric layer (20) is formed on the base of the trench (18). The trench is filled with semiconductor material (22) by means of epitaxial growth.

Abstract: A semiconductor component including a lateral transistor component is disclosed. One embodiment provides an electrically insulating carrier layer. On the carrier layer a first and a second semiconductor layer are arranged on above another and are separated from another by a dielectric layer and from which at least the first semiconductor layer includes a polycrystalline semiconductor material, an amorphous semiconductor material or an organic semiconductor material. In the first semiconductor layer: a source zone, a body zone, a drift zone and a drain zone are provided. In the second semiconductor layer; a drift control zone is arranged adjacent to the drift zone, including a control terminal at a first lateral end for applying a control potential, and is coupled to the drain zone via a rectifying element at a second lateral end. A gate electrode is arranged adjacent to the body zone and is dielectrically insulated from the body zone by a gate dielectric layer.

Abstract: A planar double-gate transistor is manufactured wherein crystallisation inhibitors are implanted into the channel region (16) of a semiconductor wafer (10), said wafer having a laminate structure comprising an initial crystalline semiconductor layer (14) adjacent an amorphous semiconductor layer (12). Upon heating, partial re-growth of the amorphous semiconductor layer is restricted in the channel area thus allowing for the thickness of the source/drain extension regions to be increased whilst maintaining a thin channel. Any remaining amorphous material is selectively removed leaving a cavity to allow for the forming of gate electrodes (30,32) on opposing sides of the channel region. The invention can be exploited to a greater extent by providing an amorphous layer on both sides of the initial crystalline semiconductor layer thus providing for re-growth limitation in two directions.

Abstract: The invention relates to an electronic device comprising a sequence of a first thin film transistor (TFT) and a second TFT, the first TFT comprising a first set of electrodes separated by a first insulator, the second TFT comprising a second set of electrodes separated by a second insulator, wherein the first set of electrodes and the second set of electrodes are formed from a first shared conductive layer and a second shared conductive layer, the first insulator and the second insulator being formed by a shared dielectric layer. The invention further relates to a method of manufacturing an electronic device.

Abstract: It is an object of the present invention to provide a method of separating a thin film transistor, and circuit or a semiconductor device including the thin film transistor from a substrate by a method different from that disclosed in the patent document 1 and transposing the thin film transistor, and the circuit or the semiconductor device to a substrate having flexibility. According to the present invention, a large opening or a plurality of openings is formed at an insulating film, a conductive film connected to a thin film transistor is formed at the opening, and a peeling layer is removed, then, a layer having the thin film transistor is transposed to a substrate provided with a conductive film or the like. A thin film transistor according to the present invention has a semiconductor film which is crystallized by laser irradiation and prevents a peeling layer from exposing at laser irradiation not to be irradiated with laser light.

Abstract: A thin film transistor (TFT) and an organic light emitting diode (OLED) display device. The TFT and the OLED display device include a substrate, a buffer layer disposed on the substrate, a semiconductor layer disposed on the buffer layer, a gate electrode insulated from the semiconductor layer, a gate insulating layer insulating the semiconductor layer from the gate electrode, and source and drain electrodes insulated from the gate electrode and partially connected to the semiconductor layer, wherein the semiconductor layer is formed from a polycrystalline silicon layer crystallized by a metal catalyst and the metal catalyst is removed by gettering using an etchant. In addition, the OLED display device includes an insulating layer disposed on the entire surface of the substrate, a first electrode disposed on the insulating layer and electrically connected to one of the source and drain electrodes, an organic layer, and a second electrode.

Abstract: An object is to provide a method for manufacturing a highly-reliable semiconductor device with an improved material use efficiency and with a simplified manufacturing process. The method includes the steps of forming a conductive layer over a substrate, forming a light-transmitting layer over the conductive layer, and selectively removing the conductive layer and the light-transmitting layer by irradiation with a femtosecond laser beam from above the light-transmitting layer. Note that the conductive layer and the light-transmitting layer may be removed so that an end portion of the light-transmitting layer is located on an inner side than an end portion of the conductive layer. Before the irradiation with a femtosecond laser beam, a surface of the light-transmitting layer may be subjected to liquid-repellent treatment.

Abstract: A substrate supporting thin film transistors thereon, each including a semiconductor layer and source-drain electrodes, wherein the source-drain electrodes are formed from a nitrogen-containing layer or oxygen/nitrogen-containing layer and a thin film of pure copper or copper alloy. The nitrogen-containing layer or oxygen/nitrogen-containing layer has respectively part or all of its nitrogen or part or all of its oxygen or nitrogen connected to silicon in the semiconductor layer of the thin film transistor, and the thin film of pure copper or copper alloy is connected to the semiconductor layer of said thin film transistor through the nitrogen-containing layer or oxygen/nitrogen-containing layer.

Abstract: A polycrystalline silicon thin film to be used in display devices, the thin film comprising adjacent primary grain boundaries that are not parallel to each other and do not contact each other, wherein an area surrounded by the primary grain boundaries is larger than 1 ?m2, a fabrication method of the polycrystalline silicon thin film, and a thin film transistor fabricated using the method.

Abstract: A memory circuit having dual-gate memory cells and a method for fabricating such a memory circuit are disclosed. The dual-gate memory cells each include a memory device and an access device sharing a semiconductor layer, with their respective channel regions provided on different surfaces of the semiconductor layer. The semiconductor layer has a thickness such that a sensitivity parameter relating an electrical interaction between the gate electrodes of the access device and the memory device is less than a predetermined value. The dual-gate memory cells can be used as building blocks for a non-volatile memory array, such as a memory array formed by NAND-strings.

Abstract: An object is to provide a semiconductor device mounted with memory which can be driven in the ranges of a current value and a voltage value which can be generated from a wireless signal. Another object is to provide write-once read-many memory to which data can be written anytime after manufacture of a semiconductor device. An antenna, antifuse-type ROM, and a driver circuit are formed over an insulating substrate. Of a pair of electrodes included in the antifuse-type ROM, the other of the pair of the electrodes is also formed through the same step and of the same material as a source electrode and a drain electrode of a transistor included in the driver circuit.

Abstract: A TFT substrate includes a substrate and at least a TFT disposed thereon. The TFT includes a semiconductor island and at least a gate. The semiconductor island has a source region, a drain region, and a channel region interposed therebetween. The semiconductor island has sub-grain boundaries. The gate corresponds to the channel region. A first included angle between an extending direction of the gate and a line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 90 degrees. A second included angle between the sub-grain boundaries in the channel region and the line connecting the centroid of the source region with the centroid of the drain region is not substantially equal to 0 degree or 90 degrees. Additionally, a method of fabricating a TFT substrate, an electronic apparatus, and a method of fabricating the electronic apparatus are also provided.

Abstract: Alternative thin film transistors for liquid crystal displays are disclosed. The alternative transistors can be used for panels of displays such as liquid crystal displays (LCDs), especially those having alternative pixel arrangements. These transistors can be oriented on a panel of an LCD using different, non-traditional configurations, while addressing misalignment and parasitic capacitance.

Abstract: In a conventional analog buffer circuit composed of polycrystalline semiconductor TFTs, a variation in the output is large. Thus, a measure such as to provide a correction circuit has been taken. However, there has been such a problem that a circuit and driver operation are complicated. Therefore, a gate length and a gate width of a TFT composing an analog buffer circuit is set to be larger. Also, a multi-gate structure is adopted thereto. In addition, the arrangement of channel regions is devised. Thus, the analog buffer circuit having a small variation is obtained without using a correction circuit, and a semiconductor device having a small variation can be provided.

Abstract: A display device includes a gate line and a data line crossing each other to form a pixel; a thin film transistor (TFT) near the crossing, the TFT including a polycrystalline silicon layer, wherein the polycrystalline silicon layer includes a plurality of first, second and third circular crystals, and the three first, second and third adjacent circular crystals form one equilateral triangle, and six of the equilateral triangles form a regular hexagon, wherein the second crystals are grown radially staffing from circumferences of the first crystals and wherein the third crystals are grown radially starting from circumferences of the first or second crystals.

Abstract: The present invention aims at providing a high-performance semiconductor device such as display, IC tag, sensor or the like at a low cost by using an organic thin film transistor most members of which can be formed by printing, as a switching element. The present invention relates to a thin film transistor composed of members on a dielectric substrate, which are a gate electrode, a dielectric film, source/drain electrodes, and a semiconductor layer, wherein on said semiconductor layer there are formed at least two passivation films of a first passivation film capping said semiconductor layer to protect it and a second passivation film covering larger area than that of said first passivation film to protect all of said members.

Abstract: An embedded or buried resistive structure may be formed by amorphizing a semiconductor material and subsequently re-crystallizing the same in a polycrystalline state, thereby providing a high degree of compatibility with conventional polycrystalline resistors, such as polysilicon resistors, while avoiding the deposition of a dedicated polycrystalline material. Hence, polycrystalline resistors may be advantageously combined with sophisticated transistor architectures based on non-silicon gate electrode materials, while also providing high performance of the resistors with respect to the parasitic capacitance.

Abstract: A sensing element includes a field-effect transistor (FET) with an ultra-thin channel, a reference electrode, a first and a second passivation layer, and a microchannel. The first and the second passivation layer enclose a first and a second portion of the FET, respectively. The microchannel is bonded to the first and the second passivation layer, such that the microchannel is extended across the channel of the ultra-thin channel FET. The ultra-thin channel has a chemically or physically modified surface. When an analyte to be tested passes through the microchannel and is in contact with the modified surface of the ultra-thin channel, it results in changes in the conductance of the ultra-thin channel FET. Trace detection may be conducted on the analyte by observing changes in the conductance. A method for manufacturing the sensing element and a biological detection system employing the sensing element are also provided.

Abstract: In the present invention, a semiconductor film is formed through a sputtering method, and then, the semiconductor film is crystallized. After the crystallization, a patterning step is carried out to form an active layer with a desired shape. The present invention is also characterized by forming a semiconductor film through a sputtering method, subsequently forming an insulating film. Next, the semiconductor film is crystallized through the insulating film, so that a crystalline semiconductor film is formed. According this structure, it is possible to obtain a thin film transistor with a good electronic property and a high reliability in a safe processing environment.

Abstract: An electronic device includes: a substrate; and a plurality of thin film transistors disposed in lines at least in one direction in terms of planar view when viewed from one principal surface of the substrate; each of the plurality of thin film transistors including a preliminary heating layer on the substrate, an insulating layer on the preliminary heating layer, and a thin film semiconductor layer a part of which overlaps the preliminary heating layer through the insulating film, wherein a portion of the preliminary heating layer other than the portion overlapping the thin film semiconductor layer has a planar shape which is line-symmetrical with respect to an axis extending in a direction perpendicularly intersecting the one direction.

Abstract: A semiconductor device having a silicon-aluminum oxide-nitride-oxide-semiconductor (SANOS) memory cell structure is provided. The device includes a silicon substrate including a surface, a source region and a drain region in the surface. The drain region and the source region are separate from each other. The device further includes a confined dielectric structure on the surface and between the source region and the drain region. The confined dielectric structure includes sequentially a silicon oxide layer, a silicon nitride layer, and an aluminum oxide layer. Additionally, the device includes a gate region overlying the aluminum oxide layer. In a specific embodiment, the gate region is made from patterning an amorphous silicon layer. In another specific embodiment, the gate region includes a polysilicon layer.

Abstract: A device having thin-film transistor (TFT) silicon-aluminum oxide-silicon (SAS) memory cell structures is provided. The device includes a substrate, a dielectric layer on the substrate, and one or more source or drain regions being embedded in the dielectric layer. the dielectric layer being associated with a first surface. Each of the one or more source or drain regions includes an N? polysilicon layer on a diffusion barrier layer which is on a conductive layer. The N+ polysilicon layer has a second surface substantially co-planar with the first surface. Additionally, the device includes a P? polysilicon layer overlying the co-planar surface, an aluminum oxide layer overlying the P? polysilicon layer; and at least one control gate overlying the aluminum oxide layer. In a specific embodiment, the control gate is made of highly doped P+ polysilicon. A method for making the TFT SAS memory cell structure is provided and can be repeated to integrate the structure three-dimensionally.

Abstract: A device having thin-film transistor (TFT) metal-oxide-nitride-oxide-semiconductor (MONOS) or semiconductor-oxide-nitride-oxide-semiconductor (SONOS) memory cell structures is provided. The device includes a substrate, a dielectric layer on the substrate, and one or more source or drain regions being embedded in the dielectric layer. the dielectric layer being associated with a first surface. Each of the one or more source or drain regions includes an N+ polysilicon layer on a diffusion barrier layer which is on a conductive layer. The N+ polysilicon layer has a second surface substantially co-planar with the first surface. Additionally, the device includes a P? polysilicon layer overlying the co-planar surface, an oxide-nitride-oxide (ONO) layer overlying the P? polysilicon layer; and at least one control gate overlying the ONO layer. In one embodiment, the control gate is made of a metal layer. In another embodiment, the control gate is made of a P+ polysilicon layer.

Abstract: A semiconductor device includes a glass substrate having a main surface, a polysilicon film formed on the main surface, having a channel region formed and having a source region and a drain region formed on opposing sides of the channel region, a gate insulating film provided so as to be in contact with the polysilicon film and containing oxygen, and a gate electrode provided in a position facing the channel region with the gate insulating film being interposed. The polysilicon film has a thickness larger than 50 nm and not larger than 150 nm. The polysilicon film contains hydrogen in a proportion not smaller than 0.5 atomic percent and not larger than 10 atomic percent. With such a structure, a semiconductor device attaining a large drain current and having a desired electric characteristic is provided.

Abstract: An organic EL device comprising a semiconductor element A having a source electrode, a drain electrode, and a gate electrode, a semiconductor element B having a source electrode, a drain electrode, and a gate electrode connected to the source electrode or the drain electrode of the semiconductor element A, and an organic EL element having a pixel electrode connected to the drain electrode of the semiconductor element B, in which the source electrode and the drain electrode of the semiconductor element A and the gate electrode of the semiconductor element B are set on the same plane.

Abstract: A method of forming a thin film transistor relative to a substrate includes, a) providing a thin film transistor layer of polycrystalline material on a substrate, the polycrystalline material comprising grain boundaries; b) providing a fluorine containing layer adjacent the polycrystalline thin film layer; c) annealing the fluorine containing layer at a temperature and for a time period which in combination are effective to drive fluorine from the fluorine containing layer into the polycrystalline thin film layer and incorporate fluorine within the grain boundaries to passivate said grain boundaries; and d) providing a transistor gate operatively adjacent the thin film transistor layer. The thin film transistor can be fabricated to be bottom gated or top gated. A buffering layer can be provided intermediate the thin film transistor layer and the fluorine containing layer, with the buffering layer being transmissive of fluorine from the fluorine containing layer during the annealing.

Abstract: A thin film transistor includes a source electrode, a drain electrode, a semiconducting layer, and a gate electrode. The drain electrode is spaced from the source electrode. The semiconducting layer is electrically connected to the source electrode and the drain electrode. The gate electrode is insulated from the source electrode, the drain electrode, and the semiconducting layer by an insulating layer. The at least one of the source electrode, drain electrode, and the gate electrode includes a metallic carbon nanotube layer. The metallic carbon nanotube layer includes a plurality of metallic carbon nanotubes.

Abstract: A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide formation reaction between the microcrystalline silicon thin film and metal thin film, thereby preventing peeling of the thin film. In a polycrystalline silicon TFT (Thin Film Transistor) using the layer-stacked wiring, the microcrystalline silicon thin film is so configured that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 60% or more of a film thickness of the microcrystalline silicon thin film amount to 15% or less of total number of crystal grains or that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 50% or less of a film thickness of the microcrystalline silicon thin film amount to 85% or more of the total number of crystal grains making up the microcrystalline silicon thin film.

Abstract: A thin film transistor and a liquid crystal display, in which a gate electrode is formed to include at least one portion extending in a direction perpendicular to a gain growing direction in order to make electrical charge mobility of TFTs uniform without increasing the size of the driving circuit. A thin film transistor according to the present invention includes a semiconductor pattern a thin film of poly-crystalline silicon containing grown grains on the insulating substrate. The semiconductor pattern includes a channel region and source and drain regions opposite with respect to the channel region. A gate insulating layer covers the semiconductor pattern. On the gate insulating layer, a gate electrode including at least one portion extending in a direction crossing the growing direction of the grains and overlapping the channel region is formed.

Abstract: A semiconductor device having high operating performance and reliability, and a manufacturing method thereof are provided. An LDD region 207 provided in an n-channel TFT 302 forming a driving circuit enhances the tolerance for hot carrier injection. LDD regions 217-220 provided in an n-channel TFT (pixel TFT) 304 forming a pixel portion greatly contribute to the decrease in the OFF current value. Here, the LDD region of the n-channel TFT of the driving circuit is formed such that the concentration of the n-type impurity element becomes higher as the distance from an adjoining drain region decreases.

Abstract: Fluid media comprising inorganic semiconductor components for fabrication of thin film transistor devices.

Abstract: A method for manufacturing a thin film transistor having a more uniform threshold voltage, and a flat panel display device that includes the thin film transistor. The method includes forming an amorphous silicon film on a substrate, removing a silicon oxide layer from a surface of the amorphous silicon film, forming a silicon oxide layer on the surface of the amorphous silicon film, and forming a polycrystalline Si layer by crystallizing the amorphous silicon film.

Abstract: The present invention provides a manufacturing process using a droplet-discharging method that is suitable for manufacturing a large substrate in mass production. A photosensitive material solution of a conductive film is selectively discharged by a droplet-discharging method, selectively exposed to laser light, and developed or etched, thereby allowing only the region exposed to laser light to be left and realizing a source wiring and a drain wiring having a more microscopic pattern than the pattern itself formed by discharging. One feature of the source wiring and the drain wiring is that the source wiring and the drain wiring cross an island-like semiconductor layer and overlap it.

Abstract: A semiconductor device includes a silicon substrate; a gate insulation film formed on the silicon substrate; and a gate electrode formed on the gate insulation film; wherein the gate electrode has a first doped polysilicon film formed on the gate insulation film, and a second doped polysilicon film formed on the first doped polysilicon film; wherein the first doped polysilicon film includes first impurities; and wherein the second doped polysilicon film includes second impurities that has the opposite conductivity type from the first impurities.

Abstract: A semiconductor device which can realize a diode function is provided with a manufacturing process of a polysilicon thin film transistor and without adding a dedicated process.

Abstract: An object is to provide a structure for forming a circuit for which high-speed operation and low-voltage operation are required and a circuit for which sufficient reliability is required at the time of high voltage application in a circuit group provided over one substrate in a semiconductor device, and a manufacturing method thereof. A semiconductor device is provided with a plurality of kinds of transistors which include single-crystal semiconductor layers with different thicknesses, which are separated from a single-crystal semiconductor substrate and bonded, over one substrate. The single-crystal semiconductor layer of a transistor for which high-speed operation is required is formed thinner than that of a transistor for which high resistance to a voltage is required, so that the thickness of the single-crystal semiconductor layer is made to be thin.

Abstract: By a laser crystallization method, a crystalline semiconductor film in which grain boundaries are all in one direction is provided as well as a manufacturing method thereof. In crystallizing a semiconductor film formed over a substrate with linear laser light, a phase-shift mask in which trenches are formed in a stripe form is used. The stripe-form trenches formed in the phase-shift mask are formed so as to make a nearly perpendicular angle with a major axis direction of the linear laser light. CW laser light is used as the laser light, and a scanning direction of the laser light is nearly parallel to a direction of the stripe-form trenches (grooves). By changing luminance of the laser light periodically in the major axis direction, a crystal nucleation position in a semiconductor that is completely melted can be controlled.

Abstract: A memory cell suitable for being disposed over a substrate is provided. The memory cell includes a poly-silicon island, a first dielectric layer, a trapping layer, a second dielectric layer and a control gate. The poly-silicon island is disposed on the substrate and includes a source region, a drain region and a channel region located between the source and drain regions. The channel region has a plurality of regularly arranged tips thereon. The first dielectric layer is disposed on the poly-silicon island. The trapping layer is disposed on the first dielectric layer. The second dielectric layer is disposed on the trapping layer. The control gate is disposed on the second dielectric layer. The memory cell mentioned above can be integrated into the LTPS-LCD panel or OLED panel.

Abstract: Processing and systems to create, and resulting products related to, very small-dimension singular, or monolithically arrayed, semiconductor mechanical devices. Processing is laser performed on selected semiconductor material whose internal crystalline structure becomes appropriately changed to establish the desired mechanical properties for a created device.

Abstract: A thin film transistor and a fabricating method of a thin film transistor for a liquid crystal display device includes forming a polycrystalline silicon film on a substrate, the polycrystalline silicon film having square shaped grains; forming an active layer by etching the polycrystalline silicon film; forming a gate electrode over the active layer, the gate electrode overlapping the active layer to form a channel region, the channel region being formed inside one of the grains; and forming source and drain electrodes connected to both sides of the active layer.

Abstract: A method of manufacturing a thin film semiconductor device is disclosed. The method includes the steps of: forming a light reflection and absorption layer for reflecting and absorbing light on a substrate; patterning the light reflection and absorption layer in a prescribed shape; forming an insulating film covering the patterned light reflection and absorption layer; forming a semiconductor thin film containing a polycrystalline grain on the insulating film; and laser annealing the semiconductor thin film by irradiating pulse oscillated laser light to crystallize the semiconductor thin film. The laser annealing step includes a heating process, and a cooling process.

Abstract: The present invention relates to a flat panel display device comprising a polycrystalline silicon thin film transistor and provides a flat panel display device having improved characteristics by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a driving circuit portion and active channel regions of pixel portion. This may be achieved by having a different number of grain boundaries included in the polycrystalline silicon thin film formed in active channel regions of a switching thin film transistor and a driving thin film transistor formed in the pixel portion, and by having a different number of grain boundaries included in polycrystalline silicon thin film formed in active channel regions of a thin film transistor for driving the pixel portion for each red, green and blue of the pixel portion.

Abstract: A high-quality isotropic polycrystalline silicon (poly-Si) and a method for fabricating high quality isotropic poly-Si film are provided. The method includes forming a film of amorphous silicon (a-Si) and using a MISPC process to form poly-Si film in a first area of the a-Si film. The method then anneals a second area, included in the first area, using a Laser-Induced Lateral Growth (LILaC) process. In some aspects, a 2N-shot laser irradiation process is used as the LILaC process. In some aspects, a directional solidification process is used as the LILaC process. In response to using the MISPC film as a precursor film, the method forms low angle grain boundaries in poly-Si in the second area.