Adapted For Surface Mounting (epo) Patents (Class 257/E33.057)
  • Publication number: 20130032845
    Abstract: A vertical GaN-based LED is made by growing an epitaxial LED structure on a silicon wafer. A silver layer is added and annealed to withstand >450° C. temperatures. A barrier layer (e.g., Ni/Ti) is provided that is effective for five minutes at >450° C. at preventing bond metal from diffusing into the silver. The resulting device wafer structure is then wafer bonded to a carrier wafer structure using a high temperature bond metal (e.g., AlGe) that melts at >380° C. After wafer bonding, the silicon is removed, gold-free electrodes (e.g., Al) are added, and the structure is singulated. High temperature solder (e.g., ZnAl) that is compatible with the electrode metal is used for die attach. Die attach occurs at >380° C. for ten seconds without melting the bond metal or otherwise damaging the device. The entire LED contains no gold, and consequently is manufacturable in a high-volume gold-free semiconductor fabrication facility.
    Type: Application
    Filed: August 2, 2011
    Publication date: February 7, 2013
    Applicant: Bridgelux, Inc.
    Inventors: Chih-Wei Chuang, Chao-Kun Lin, Long Yang, Norihito Hamaguchi
  • Patent number: 8368110
    Abstract: A side view light emitting diode (LED) package structure includes a package housing, a side view LED chip and a thermal conductive member. The side view LED chip is enclosed by the package housing and an emitting direction of the side view LED chip is perpendicular to a thickness direction of a substrate. The thermal conductive member connected with the side view LED chip is disposed inside the package housing and a portion of which extends out of a dissipation opening of the package housing to be exposed so that heat of the side view LED chip is dissipated.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: February 5, 2013
    Assignee: Everlight Electronics Co., Ltd.
    Inventors: Yi-Tsuo Wu, Chung-Chuan Hsieh, Chia-Hsien Chang
  • Publication number: 20130029439
    Abstract: There is provided a method of manufacturing a light emitting device, the method including: mounting a plurality of light emitting devices on an adhesive layer; arranging upper surfaces of the plurality of light emitting devices to be disposed horizontally using a pressing member; forming a wavelength conversion part covering the plurality of light emitting devices on the adhesive layer by applying a resin including at least one phosphor material; planarizing an upper surface of the wavelength conversion part using the pressing member; and separating the adhesive layer from the plurality of light emitting devices.
    Type: Application
    Filed: July 30, 2012
    Publication date: January 31, 2013
    Inventors: Jong Sup Song, Jae Sung You, Tae Gyu Kim
  • Patent number: 8362513
    Abstract: A surface mount LED for attaching an LED to a substrate using a conventional reflow soldering technique. The surface mount LED according to this invention includes an LED and a holder. The LED includes a plurality of leads. The holder supports the LED and includes a plurality of feet arranged at approximately equal intervals around the perimeter of a base of the holder. Each lead is wrapped around a respective foot. The resulting wrapped lead forms a contact point corresponding with a solder pad layout for attaching the surface mount LED to a substrate.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: January 29, 2013
    Assignee: Illinois Tool Works Inc.
    Inventor: Chong S Kim
  • Publication number: 20130020598
    Abstract: A light emitting device package includes: an undoped semiconductor substrate having first and second surfaces opposed to each other; first and second conductive vias penetrating the undoped semiconductor substrate; a light emitting device mounted on one region of the first surface; a bi-directional Zener diode formed by doping an impurity on the second surface of the undoped semiconductor substrate and having a Zener breakdown voltage in both directions; and first and second external electrodes formed on the second surface of the undoped semiconductor substrate such that they connect the first and second conductive vias to both ends of the bi-directional Zener diode region, respectively.
    Type: Application
    Filed: July 20, 2012
    Publication date: January 24, 2013
    Inventors: Jong In Yang, Sung Tae Kim, Yong Il Kim, Su Yeol Lee, Seung Wan Chae, Hyung Duk Ko, Yung Ho Ryu
  • Publication number: 20130020589
    Abstract: A vertical Light Emitting Diode (LED) device includes an epi structure with a first-type-doped portion, a second-type-doped portion, and a quantum well structure between the first-type-doped and second-type-doped portions and a carrier structure with a plurality of conductive contact pads in electrical contact with the epi structure and a plurality of bonding pads on a side of the carrier structure distal the epi structure, in which the conductive contact pads are in electrical communication with the bonding pads using at least one of vias and a Redistribution Layer (RDL). The vertical LED device further includes a first insulating film on a side of the carrier structure proximal the epi structure and a second insulating film on a side of the carrier structure distal the epi structure.
    Type: Application
    Filed: July 21, 2011
    Publication date: January 24, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Kuang Yu, Hung-Yi Kuo
  • Patent number: 8350276
    Abstract: The present invention relates to a light emitting device. In the light emitting device of the present invention, light emitting cells of a first light emitting cell block and light emitting cells of a second light emitting cell block corresponding thereto are connected in parallel so that a current can cross the light emitting cells of the first and second light emitting cell blocks. Thus, even though a leakage current occurs in some of light emitting cells, the current is allowed to cross light emitting cells connected in another direction, thereby preventing overload on some of the light emitting cells due to the leakage current and ensuring uniform light emission and prolonged life span in the AC light emitting device.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: January 8, 2013
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Jae Ho Lee, Lacroix Yves
  • Patent number: 8344399
    Abstract: There is provided an LED package including: a body unit; an LED chip mounted onto the body unit; lead frames mounted onto the body unit and electrically connected to the LED chip; and a reflection unit having a cavity to receive the LED chip therein and reflecting light emitted from the LED chip to the outside. Here, the reflection unit has a curved cross-section.
    Type: Grant
    Filed: December 3, 2009
    Date of Patent: January 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hak Hwan Kim, Sung Kyong Oh, Soo Jin Jung, Hyung Kun Kim
  • Patent number: 8334548
    Abstract: A semiconductor light emitting device (A) includes a lead frame (1) having a constant thickness, a semiconductor light emitting element (2) supported by the lead frame (1), a case (4) covering part of the lead frame (1) and a light transmitting member (5) covering the semiconductor light emitting element (2). The lead frame (1) includes a die bonding pad (11a) and an elevated portion (11b). The die bonding pad (11a) includes an obverse surface on which the semiconductor light emitting element (2) is mounted, and a reverse surface exposed from the case (4). The elevated portion (11b) is shifted in position from the die bonding pad (11a) in the direction normal to the obverse surface of the die bonding pad (11a).
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: December 18, 2012
    Assignee: Rohm Co., Ltd.
    Inventor: Masahiko Kobayakawa
  • Patent number: 8334546
    Abstract: A light emitting diode is provided, including an LED chip, a reflector, a lens, a circuit plate, a circuit substrate and an electrical conductivity device. The LED chip is disposed in the reflector and the lens is disposed on the reflector, covering the reflector and the LED chip. The LED chip is electrically connected to the circuit plate. The circuit plate further includes a first through hole therein and the circuit substrate further includes a second through hole therein. The electrical conductivity device passes through the first through hole and the second through hole so that the circuit plate is electrically connect to the circuit substrate. The reflector is installed between the circuit plate and the circuit substrate. The first through hole and the second through hole are not connected to the reflector.
    Type: Grant
    Filed: May 11, 2010
    Date of Patent: December 18, 2012
    Assignee: Everlight Electronics Co., Ltd.
    Inventor: Chung-Chuan Hsieh
  • Publication number: 20120313134
    Abstract: A glass substrate including a first face and a second face opposing the first face, the substrate including, above the second face, an electrode layer which includes at least one electrically conducting layer, wherein the substrate includes, between the second face and the electrode layer, at least one layer of vitreous material having an index in the range from 1.7to 2.4and including from 40% to 60% by weight of bismuth oxide Bi2O3 and from 5% to 30% by weight of ZnO.
    Type: Application
    Filed: January 12, 2011
    Publication date: December 13, 2012
    Applicant: SAINT-GOBAIN GLASS FRANCE
    Inventors: François-Julien Vermersch, Sylvie Abensour, Jean-Luc Allano, Marie-Virginie Ehrensperger
  • Publication number: 20120313120
    Abstract: A method for depositing a phosphor layer on a light-emitting diode (“LED”) chip includes coating at least a light-emitting side of the LED chip with a phosphor-adhesive material, and applying phosphor particles to an exposed surface of the material such that the phosphor layer forms of phosphor particles that adhere to the exposed surface. A method for depositing phosphor layers on each of a plurality of LED chips includes mounting the LED chips to a common substrate, coating at least a light-emitting side of the LED chips with a phosphor-adhesive material, and applying phosphor particles to exposed surfaces of the material such that the phosphor layers form of phosphor particles that adhere to the material. A processed LED chip includes an unpackaged LED chip, a phosphor-adhesive material applied to a light-emitting side of the LED chip, and a phosphor layer formed of phosphor particles adhered to the material.
    Type: Application
    Filed: June 8, 2012
    Publication date: December 13, 2012
    Inventor: Jeffrey Bisberg
  • Patent number: 8323997
    Abstract: Disclosed herein is a method of manufacturing a color printed circuit board. The method includes non-consecutively printing a conductive ink on a flexible insulation board in a piezoelectric inkjet manner to form an electrically conductive pattern, applying an electrically conductive bonding agent to a light emitting chip mounting portion of the electrically conductive pattern for mounting a light emitting chip, forming a waterproof layer on an overall surface of a resultant after mounting the light emitting chip on the light emitting chip mounting portion of the electrically conductive pattern to which the electrically conductive bonding agent is applied, and forming a color pattern on an overall surface of the light emitting diode using a color ink.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: December 4, 2012
    Assignee: Digital Graphics Incorporation
    Inventor: Kwan Soo Choi
  • Patent number: 8313962
    Abstract: Hybrid integration of vertical cavity surface emitting lasers (VCSELs) and/or other optical device components with silicon-based integrated circuits. A multitude of individual VCSELs or optical devices are processed on the surface of a compound semiconductor wafer and then transferred to a silicon-based integrated circuit. A specific sacrificial or removable separation layer is employed between the optical components and the mother semiconductor substrate. The transfer of the optical components to a carrier substrate is followed by the elimination of the sacrificial or separation layer and simultaneous removal of the mother substrate. This is followed by the attachment and interconnection of the optical components to the surface of, or embedded within the upper layers of, an integrated circuit, followed by the release of the components from the carrier substrate.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: November 20, 2012
    Assignee: Connector Optics LLC
    Inventors: James A. Lott, Nikolai Ledentsov, Vitaly Shchukin
  • Publication number: 20120268957
    Abstract: Reflow solderable, surface mount LED optic mounting devices are provided. Embodiments that include turnings (e.g., made on a swiss turning machine) and stampings (e.g., made with a progressive die) are provided. The LED optic mounting devices are suitably positioned by the same pick-and-place machine that is used to mount LED on planar surface with circuitry and solder pads and are attached to the solder pads by soldering.
    Type: Application
    Filed: October 16, 2011
    Publication date: October 25, 2012
    Inventor: Philip Premysler
  • Publication number: 20120256200
    Abstract: A light emitting device and method of fabricating the same is disclosed that comprises at least one light emitter comprising an active region which emits light. The device further comprising a submount arranged such that the at least one light emitter is mounted to the submount such that the active region is angled in relation to the submount.
    Type: Application
    Filed: September 30, 2011
    Publication date: October 11, 2012
    Inventor: Zhimin Jamie Yao
  • Patent number: 8283790
    Abstract: An electronic device includes a carrier, a surface mounting device, and solders. The carrier has a plurality of bonding pads, and at least one of the bonding pads has a notch, such that the bonding pad has a necking portion adjacent to the notch. The surface mounting device is disposed on the carrier. Besides, the surface mounting device has a plurality of leads, and each of the leads is connected to the necking portion of one of the bonding pads, respectively. The notch of each of the bonding pads is located under one of the leads. The solders connect the bonding pads and the leads.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: October 9, 2012
    Assignee: Everlight Electronics Co., Ltd.
    Inventor: Wen-Chieh Tsou
  • Publication number: 20120241807
    Abstract: A mounting structure for solid-state light sources, for example of the LED type, comprises a support board; a submount mounted on said support board and having at least one solid-state light radiation source mounted thereon; a drive board carrying drive circuitry for the light radiation source, the aforementioned drive board being mounted on the support board and extending peripherally with respect to the aforementioned submount; electrical interface connections between the submount and the drive board for connecting the light radiation source to the drive circuitry; and mechanical and thermal interface connections between the submount and the support board.
    Type: Application
    Filed: March 26, 2012
    Publication date: September 27, 2012
    Applicant: OSRAM AG
    Inventors: Guenter Hoetzl, Huey Ling Lim, Thomas Preuschl, Peter Sachsenweger, Lorenzo Roberto Trevisanello, Steven Wetzel
  • Patent number: 8273588
    Abstract: A method for producing a luminous device is specified. A number of light emitting diodes each have a radiation-transmissive carrier and at least two semiconductor bodies spatially separated from one another. Each semiconductor body is provided for generating electromagnetic radiation. The semiconductor bodies can be driven separately from one another and the semiconductor bodies are arranged at the top side of the radiation-transmissive carrier on the radiation-transmissive carrier. A chip assemblage is composed of CMOS chips each of which has at least two connection locations at its top side. At least one of the light emitting diodes is connected to one of the CMOS chips. The light emitting diode is arranged, at the top side of the radiation-transmissive carrier, at the top side of the CMOS chip and each semiconductor body of the light emitting diode is connected to a connection location of the CMOS chip.
    Type: Grant
    Filed: July 16, 2010
    Date of Patent: September 25, 2012
    Assignee: OSRAM Opto Semiconductros GmbH
    Inventors: Berthold Hahn, Markus Maute, Siegfried Herrmann
  • Publication number: 20120235167
    Abstract: A wafer-level process for manufacturing solid state lighting (“SSL”) devices using large-diameter preformed metal substrates is disclosed. A light emitting structure is formed on a growth substrate, and a preformed metal substrate is bonded to the light emitting structure opposite the growth substrate. The preformed metal substrate can be bonded to the light emitting structure via a metal-metal bond, such as a copper-copper bond, or with an inter-metallic compound bond.
    Type: Application
    Filed: March 15, 2011
    Publication date: September 20, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Vladimir Odnoblyudov
  • Patent number: 8269248
    Abstract: Apparatus may be provided including a high power light emitting diode (LED) unit, at least one printed circuit board, and an interfacing portion of a heat sink structure. The high power LED unit includes at least one LED die, at least one first lead and at least one second lead, and a heat sink interface. The at least one printed circuit board includes a conductive pattern configured to connect both the at least one first lead and the at least one second lead to a current source. The interfacing portion of the heat sink structure is that portion through which a majority of heat of the heat sink interface is transmitted. The interfacing portion is directly in touching contact with a majority of a heat transfer area of the heat sink interface.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: September 18, 2012
    Inventor: Joseph B. Thompson
  • Patent number: 8269233
    Abstract: This application related to an opto-electrical device, comprising a first ACLED having a first n-type semiconductor layer, a first light emitting layer, a first p-type semiconductor layer, a first p-type electrode and a first n-type electrode; a second ACLED having a second n-type semiconductor layer, a second light emitting layer, a second p-type semiconductor layer, a second p-type electrode and a second n-type electrode, wherein each of the first ACLED and the second ACLED are vertical stack structure and is connected in anti-parallel manner.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: September 18, 2012
    Assignee: Epistar Corporation
    Inventors: Wei-Yo Chen, Yen-Wen Chen, Shu-Ting Hsu, Tsung Xian Lee
  • Publication number: 20120217533
    Abstract: A device includes a semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region. The semiconductor structure includes an n-contact region and a p-contact region. A cross section of the n-contact region comprises a plurality of first regions wherein portions of the light emitting layer and p-type region are removed to expose the n-type region. The plurality of first regions are separated by a plurality of second regions wherein the light emitting layer and p-type region remain in the device. The device further includes a first metal contact formed over the semiconductor structure in the p-contact region and a second metal contact formed over the semiconductor structure in the n-contact region. The second metal contact is in electrical contact with at least one of the second regions in the n-contact region.
    Type: Application
    Filed: May 2, 2012
    Publication date: August 30, 2012
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventor: JOHN E. EPLER
  • Publication number: 20120211785
    Abstract: A Plastic Leaded Chip Carrier (PLCC) package is disclosed. The PLCC package includes a lead frame with an integrated reflector cup. The reflector cup is directly connected to a heat sink, which improves the ability of the PLCC package to distribute heat away from the light source that is provided in the reflector cup.
    Type: Application
    Filed: February 23, 2011
    Publication date: August 23, 2012
    Applicant: AVAGO TECHNOLOGIES ECBU IP (SINGAPORE) PTE. LTD.
    Inventors: Keat Chuan Ng, Kheng Leng Tan, Chiau Jin Lee
  • Patent number: 8247247
    Abstract: A method for manufacturing an LED module, including steps of: providing a heat conductive plate and an LED die, the heat conductive plate defining a concave groove therein; forming an electrode circuit layer on the heat conductive plate around the concave groove; plating one metal layer on a bottom of the concave groove of the heat conductive plate, and plating another metal layer on the LED die; eutectically bonding the metal layer of the heat conducting plate and the metal layer of the LED die together to form into an eutectic layer; forming electrodes on the LED die, and connecting the electrodes with the electrode circuit layer; and encapsulating the LED die in the concave groove.
    Type: Grant
    Filed: August 22, 2010
    Date of Patent: August 21, 2012
    Assignee: Foxsemicon Integrated Technology, Inc.
    Inventors: Chih-Ming Lai, Ying-Chieh Lu
  • Patent number: 8242717
    Abstract: A light output device comprises a substrate arrangement comprising a plurality of light source circuits integrated into the structure of the substrate arrangement. Each light source circuit comprises a light source device arrangement (4) having two terminals and a transistor circuit (7). Each light source circuit is supplied with power from an associated pair the power connections (10,11,14,15,20), and at least two light source circuits (4,7) share the same pair of power connections. A set of control connections (18) are provided for receiving external control signals for controlling the transistor circuits (7). A set of non-overlapping electrodes (10,11,14,15,18,20) provide the internal connections between the power connections, the light source device terminals and the transistor circuits, and each light source device is individually independently controllable.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: August 14, 2012
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Maarten Marinus Johannes Wilhelmus Van Herpen, Petrus Johannes Bremer, Coen Theodorus Hubertus Fransiscus Liedenbaum
  • Publication number: 20120193666
    Abstract: A light-reflective anisotropic conductive adhesive used for anisotropic conductive connection of a light-emitting element to a wiring board includes a thermosetting resin composition, conductive particles, and light-reflective insulating particles. The light-reflective insulating particles are at least one of inorganic particles selected from the group consisting of titanium oxide, boron nitride, zinc oxide, and aluminum oxide, or resin-coated metal particles formed by coating the surface of scale-like or spherical metal particles with an insulating resin.
    Type: Application
    Filed: July 20, 2010
    Publication date: August 2, 2012
    Applicant: SONY CHEMICAL & INFORMATION DEVICE CORPORATION
    Inventors: Hidetsugu Namiki, Shiyuki Kanisawa, Hideaki Umakoshi
  • Publication number: 20120193647
    Abstract: A solid state lighting package is provided. The package comprising at least one LED element positioned on a top surface of a substrate or a submount capable of absorbing light emitted by the at least one LED element; and a reflective layer, the reflective layer covering at least a portion of the top surface of the substrate or the submount, whereby at least of portion of the light emitted by the LED element is reflected by the reflective layer. A method of manufacturing a solid state lighting package comprising the reflective layer, and a method of increasing the luminous flux thereof, is also provided.
    Type: Application
    Filed: January 31, 2011
    Publication date: August 2, 2012
    Inventor: Peter ANDREWS
  • Publication number: 20120187432
    Abstract: An LED package comprises: an LED chip having an optically active layer on a substrate, a platform, including a central membrane of which the LED chip is mounted in close thermal contact to the material of the platform, the thickness of the membrane being less than 3/10 the chip dimension (L) the thickness of the supporting frame being more than twice the membrane thickness, typically 10 times and possibility up to 25 times which is integrally formed with the membrane, is substantially larger than the thickness of the membrane, wherein the membrane is provided with at least an electrically isolated through contact filled with electrically conducting material and connected to one of the electrodes of the LED chip.
    Type: Application
    Filed: April 23, 2007
    Publication date: July 26, 2012
    Applicant: LEXEDIS LIGHTING GMBH
    Inventors: Hiroaki Kawaguchi, Nick Shepherd
  • Patent number: 8227272
    Abstract: Disclosed is a light emitting device having a plurality of light emitting cells and a package having the same mounted thereon. The light emitting device includes a plurality of light emitting cells which are formed on a substrate and each of which has an N-type semiconductor layer and a P-type semiconductor layer located on a portion of the N-type semiconductor layer. The plurality of light emitting cells are bonded to a submount substrate. Accordingly, heat generated from the light emitting cells can be easily dissipated, so that a thermal load on the light emitting device can be reduced. Meanwhile, since the plurality of light emitting cells are electrically connected using connection electrodes or electrode layers formed on the submount substrate, it is possible to provide light emitting cell arrays connected to each other in series.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: July 24, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Chung Hoon Lee, Lacroix Yves, Hyung Soo Yoon, Young Ju Lee
  • Patent number: 8222663
    Abstract: Provided is a light emitting diode (LED) manufactured by using a wafer bonding method and a method of manufacturing a LED by using a wafer bonding method. The wafer bonding method may include interposing a stress relaxation layer formed of a metal between a semiconductor layer and a bonding substrate. When the stress relaxation layer is used, stress between the bonding substrate and a growth substrate may be offset due to the flexibility of metal, and accordingly, bending or warpage of the bonding substrate may be reduced or prevented.
    Type: Grant
    Filed: July 23, 2009
    Date of Patent: July 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-kook Kim, Su-hee Chae, Young-soo Park, Taek Kim, Moon-seung Yang, Hyung-su Jeong, Jae-chul Park, Jun-youn Kim
  • Patent number: 8222653
    Abstract: A light-emitting diode includes a substrate, a light-emitting diode element mounted on an upper surface of the substrate, and a sealing member that covers the light-emitting diode element. At least one pair of lower electrodes electrically connected to the light-emitting diode element and at least one pair of connecting electrodes connected to each other are disposed on the substrate. A connecting wiring pattern for connecting the pair of connecting electrodes is provided between the connecting electrodes.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: July 17, 2012
    Assignee: Citizen Electronics Co., Ltd.
    Inventor: Kosuke Tsuchiya
  • Publication number: 20120175664
    Abstract: The present invention provides a lighting device and method for forming the same. The lighting device comprises a base having a first surface, a conductive wiring layer formed on the first surface, and a light emitting diode module comprising a substrate and at least one light emitting diode disposed on the substrate wherein the substrate of the light emitting diode module is disposed on the conductive wiring layer by a surface mount method. In one embodiment, the base is preferably made of ceramics.
    Type: Application
    Filed: September 9, 2011
    Publication date: July 12, 2012
    Applicant: FITILITE (S) PTE., LTD., TAIWAN BRANCH
    Inventor: Puru LIN
  • Patent number: 8207548
    Abstract: An LED array chip (2), which is one type of a semiconductor light emitting device, includes an array of LEDs (6), a base substrate (4) supporting the array of the LEDs (6), and a phosphor film (48). The array of LEDs (6) is formed by dividing a multilayer epitaxial structure including a light emitting layer into a plurality of portions. The phosphor film (48) covers an upper surface of the array of the LEDs (6) and a part of every side surface of the array of LEDs (6). Here, the part extends from the upper surface to the light emitting layer.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: June 26, 2012
    Assignee: Panasonic Corporation
    Inventor: Hideo Nagai
  • Patent number: 8198107
    Abstract: A method for manufacturing a light emitting diode (LED) assembly comprises the steps of: covering a light-reflection layer onto a substrate layer, covering a light-emitting layer onto the light-reflection layer, and forming a P type electrode and an N type electrode extended from the light-emitting layer, perforating through the light-reflection layer, and exposed from the substrate layer to form an LED chip structure; packaging the LED chip structure with a light-transmissible packaging material and keeping the P type electrode and the N type electrode exposed from the light-transmissible packaging material to form a molded LED chip cell; and electrically connecting the P type electrode and the N type electrode of the molded LED chip cell to a circuit board, so as to manufacture the LED assembly.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: June 12, 2012
    Assignee: Edison Opto Corporation
    Inventors: Chien-Jung Wu, Tsung-Ting Sun
  • Patent number: 8193552
    Abstract: In a semiconductor light emitting device of junction-down type, a semiconductor light emitting element having a stripe part is provided with a bonding part for die bonding in a part of a surface thereof where the stripe part is formed, the bonding part being at a position away from the stripe part, and being junction-down bonded onto an electrode pattern on a holding substrate.
    Type: Grant
    Filed: February 5, 2009
    Date of Patent: June 5, 2012
    Assignee: Rohm Co., Ltd.
    Inventor: Yuji Ishida
  • Patent number: 8193547
    Abstract: A modular package for a light emitting device includes a leadframe having a top surface and including a central region having a bottom surface and having a first thickness between the top surface of the leadframe and the bottom surface of the central region. The leadframe may further include an electrical lead extending away from the central region. The electrical lead has a bottom surface and has a second thickness from the top surface of the leadframe to the bottom surface of the electrical lead. The second thickness may be less than the first thickness. The package further includes a package body on the leadframe surrounding the central region and exposing the bottom surface of the central region. The package body may be at least partially provided beneath the bottom surface of the lead and adjacent the bottom surface of the central region. Methods of forming modular packages and leadframes are also disclosed.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: June 5, 2012
    Assignee: Cree, Inc.
    Inventors: Ban P. Loh, Bernd Keller, Nicholas W. Medendorp, Jr.
  • Patent number: 8183592
    Abstract: A light emitting device includes a plurality of light emitting cells which are formed on a substrate and each of which has an N-type semiconductor layer and a P-type semiconductor layer located on a portion of the N-type semiconductor layer. The plurality of light emitting cells are bonded to a submount substrate. Heat generated from the light emitting cells can be easily dissipated, so that a thermal load on the light emitting device can be reduced. Since the plurality of light emitting cells are electrically connected using connection electrodes or electrode layers formed on the submount substrate, it is possible to provide light emitting cell arrays connected to each other in series. Further, it is possible to provide a light emitting device capable of being directly driven by an AC power source by connecting the serially connected light emitting cell arrays in reverse parallel to each other.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: May 22, 2012
    Assignee: Seoul Opto Device Co., Ltd.
    Inventors: Chung Hoon Lee, Lacroix Yves, Hyung Soo Yoon, Young Ju Lee
  • Publication number: 20120119238
    Abstract: An LED package structure includes an insulation substrate, a heat-sink slug, an LED chip assembly, four diodes, and a lead-frame assembly. The heat-sink slug is inserted on the insulation substrate, and includes a loading surface exposed externally, where the LED chip assembly is fixed on the loading surface. The lead-frame assembly includes two externally-extended lead frames and four loading lead frames which are apart from one another, and which are all inserted on the insulation substrate. The four diodes are correspondingly loaded on, and electrically connected with, the four loading lead frames. The LED chip assembly and the four diodes constitute a bridge circuit, wherein the bridge circuit has its positive electrode and negative electrode located at the two externally-extended lead frames, respectively. Therefore, there is no need for the LED package structure to connect externally a rectifier diode module so as to achieve the purpose of convenient use.
    Type: Application
    Filed: March 2, 2011
    Publication date: May 17, 2012
    Applicant: Forward Electronics Co., Ltd.
    Inventors: I Chih Huang, Chun Yu Chai, Wen-Hsiung Li
  • Patent number: 8178895
    Abstract: A semiconductor light-emitting device can include a submount on which a semiconductor light-emitting element is mounted. The device can have a high light utilization efficiency with high reliability and can achieve a reduction in manufacturing cost as well as a decrease in size. The submount can have a reverse trapezoidal cross section having an upper surface that is larger than a bottom surface of the semiconductor light-emitting element. An adhesive can be used to fix the submount to the base board such that, when the submount is observed from above the semiconductor light-emitting element, the adhesive is not seen from above. In this state, the semiconductor light-emitting element can be connected to the base board via a bonding wire.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: May 15, 2012
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Kaori Namioka
  • Patent number: 8178371
    Abstract: A method for assembling an optically pumped solid-state laser having an extended cavity. The method includes the steps of providing a casing, mounting a TEC and a base plate in the casing, and mounting a plurality of laser components on the base plate using a UV and heat curing adhesive. Once the laser components are correctly positioned and aligned on the base plate, the adhesive is pre-cured using UV radiation. Final curing of the adhesive is obtained by subjecting the entire laser package to an ambient temperature of at least 100° C. The base plate is preferably selected to have a CTE similar to that of the laser components in order to facilitate the high temperature curing. A preferred material for the base plate is AlSiC.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: May 15, 2012
    Assignee: Cobolt AB
    Inventors: Jonas Hellström, Gunnar Elgcrona, Kenneth Joelsson
  • Publication number: 20120112218
    Abstract: An apparatus for emitting polarized light and a method for fabricating such apparatus are provided. The apparatus includes a surface emission light emitting diode (LED), a first electrode, and a sub-wavelength metal grating (SWMG). The surface emission LED includes a first contact surface and a second contact surface. The first electrode is coupled to the first contact surface. The SWMG is formed on a surface of the surface emission LED.
    Type: Application
    Filed: November 4, 2010
    Publication date: May 10, 2012
    Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
    Inventors: Jinghua Teng, Soo-Jin Chua, Liang Zhang, Liyuan Deng
  • Publication number: 20120107973
    Abstract: A method for producing luminous means proposes providing a carrier serving as a heat sink, said carrier comprising a planar chip mounting region. The planar chip mounting region is structured for the purpose of producing a first partial region and at least one second partial region. In this case, the first partial region has a solder-repellent property after structuring. Afterward, a solder is applied to the planar chip mounting region, such that said solder wets the at least one second partial region. At least one optoelectronic body is fixed into the at least one second partial region with the solder at the carrier. Finally, contact-connections are formed for the purpose of feeding electrical energy to the optoelectronic luminous body.
    Type: Application
    Filed: November 27, 2009
    Publication date: May 3, 2012
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Stefan Grötsch, Klaus Müller
  • Patent number: 8168997
    Abstract: Provided is an LED package including a printed circuit board (PCB); a conductive structure that is formed on the PCB and is composed of any one selected from a silicon structure and an aluminum structure; and an LED chip that is mounted on the PCB and is electrically connected to the PCB through the conductive structure.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: May 1, 2012
    Assignee: Samsung LED Co., Ltd.
    Inventors: Seong Ah Joo, Jung Kyu Park, Kun Yoo Ko, Young June Jeong, Seung Hwan Choi
  • Patent number: 8158999
    Abstract: A reinforced chip package structure includes a light emitting element, a base, and a package member. The base has a base deck and a jutting bearing deck on the base deck to hold the light emitting element. The base deck and the bearing deck are interposed by an elevation difference section. On the elevation difference section, there is an annular retaining structure. The package member is located on the base and covers at least the bearing deck and the retaining structure. The package member has an anchor structure corresponding to the retaining structure. The retaining structure and the anchor structure are coupled together to harness the base and the package member from moving against each other. Thus the base and package member form a reinforced bonding between them without separating from each other when subject to external forces, therefore provide improved protection for the light emitting element.
    Type: Grant
    Filed: March 11, 2009
    Date of Patent: April 17, 2012
    Assignee: Sung Jung Minute Industry Co., Ltd.
    Inventor: Wen-Huo Huang
  • Patent number: 8154040
    Abstract: A light-emitting diode arrangement comprising a plurality of semiconductor chips which are provided for emitting electromagnetic radiation from their front side (101) and which are fixed by their rear side (102)—opposite the front side—on a first main face (201) of a common carrier body (2), wherein the semiconductor chips consist of a respective substrateless semiconductor layer stack (1) and are fixed to the common carrier body without an auxiliary carrier, and to a method for producing such a light-emitting diode arrangement.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: April 10, 2012
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Jörg Erich Sorg, Stefan Gruber, Siegfried Herrmann, Berthold Hahn
  • Patent number: 8148745
    Abstract: A light emitting module includes a semiconductor light source, a first lead with a bonding pad to which the light source is attached, and a second lead spaced from the first lead in a first direction contained in the plane of the first die bonding pad. The second lead includes a wire bonding pad connected to the light source via a wire. The module also includes a case formed with a space elongated in the first direction for accommodating the light source. The first lead includes an extension extending from the first die bonding pad, and a mounting terminal connected to the extension. The extension extends in a second direction that is perpendicular to the first direction and contained in the plane of the first die bonding pad. The mounting terminal extends perpendicularly to the second direction. The extension overlaps the light source in the first direction.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: April 3, 2012
    Assignee: Rohm Co., Ltd.
    Inventors: Masahiko Kobayakawa, Shintaro Yasuda
  • Publication number: 20120070922
    Abstract: The invention provides a method for forming a light emitting device. A first substrate is provided. A plurality of patterned masks is formed on the first substrate, or on a semiconductor epitaxial layer grown on the first substrate, or the first substrate is etched to form a plurality of trenches, followed by performing an epitaxial lateral overgrowth process to grow an epitaxy layer over the first substrate. A light emitting structure is formed on the epitaxy layer. A first electrode layer is formed on the light emitting structure. The light emitting structure is wafer bonded to a second substrate. A photoelectrochemical etching process is performed to lift off the first substrate from the epitaxy layer.
    Type: Application
    Filed: March 15, 2011
    Publication date: March 22, 2012
    Applicant: NATIONAL TAIWAN UNIVERSITY
    Inventors: Chih-Chung YANG, Cheng-Hung LIN, Chih-Yen CHEN, Che-Hao LIAO, Chieh HSIEH
  • Patent number: 8138517
    Abstract: An LED package is provided. The LED package includes a leadframe having a pair of first electrodes and a pair of second electrodes, an LED chip disposed on the leadframe, and an encapsulant encapsulating a portion of the leadframe and the LED chip. The pair of first electrodes and the pair of second electrodes are electrically connected with the LED chip. The pair of first electrodes and the pair of second electrodes are located outside the encapsulant. The encapsulant has a top surface, a bottom surface, a first side surface and a second side surface opposite to the first side surface, wherein the pair of first electrodes extend from the first side surface to the bottom surface, and the pair of second electrodes extend from the second side surface to the bottom surface.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: March 20, 2012
    Assignee: Everlight Electronics Co., Ltd.
    Inventors: Yi-Tine Chiu, Chung-Chuan Hsieh
  • Patent number: RE43426
    Abstract: A method for forming a transparent electrode on a visible light-emitting diode is described. A visible light-emitting diode element is provided, and the visible light-emitting diode element has a substrate, an epitaxial structure and a metal electrode. The metal electrode and the epitaxial structure are located on the same side of the substrate, or located respectively on the different sides of the substrate. An ohmic metal layer is formed on a surface of the epitaxial structure. The ohmic metal layer is annealed. The ohmic metal layer is removed to expose the surface of the epitaxial structure. A transparent electrode layer is formed on the exposed surface. A metal pad is formed on the transparent electrode layer.
    Type: Grant
    Filed: June 2, 2011
    Date of Patent: May 29, 2012
    Assignee: Epistar Corporation
    Inventors: Tse-Liang Ying, Shi-Ming Chen